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| author | Jack Rosenthal <jrosenth@chromium.org> | 2020-10-26 16:47:32 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-01-15 03:54:50 +0000 |
| commit | 64710ef3f650490b85858f014d6c0aebe4af07db (patch) | |
| tree | 6669d9a1da79d0b9b7036d1eaf3fd67b67e1d74f | |
| parent | 924999ce857d36c3f1ba575552194369654cb364 (diff) | |
| download | chrome-ec-64710ef3f650490b85858f014d6c0aebe4af07db.tar.gz | |
volteer: add GPIO alises needed for power sequencing to gpio_map.h
These aliases are needed to support power sequencing shim.
BUG=b:171312361
TEST=with EC shim, compiles
Change-Id: Ic149a11eb4f99d7aa006c2bf043cc29816756917
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/zephyr-chrome/+/2503390
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Jett Rink <jettrink@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2630137
Reviewed-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | zephyr/projects/volteer/include/gpio_map.h | 20 |
1 files changed, 18 insertions, 2 deletions
diff --git a/zephyr/projects/volteer/include/gpio_map.h b/zephyr/projects/volteer/include/gpio_map.h index 5c28546540..5b70abbdff 100644 --- a/zephyr/projects/volteer/include/gpio_map.h +++ b/zephyr/projects/volteer/include/gpio_map.h @@ -17,8 +17,24 @@ * Note we only need to create aliases for GPIOs that are referenced in common * platform/ec code. */ -#define GPIO_EN_PP3300_A NAMED_GPIO(en_pp3300_a) -#define GPIO_EN_PP5000_A NAMED_GPIO(en_pp5000_a) +#define GPIO_CPU_PROCHOT NAMED_GPIO(ec_prochot_odl) +#define GPIO_EN_PP3300_A NAMED_GPIO(en_pp3300_a) +#define GPIO_EN_PP5000 NAMED_GPIO(en_pp5000_a) +#define GPIO_EN_PP5000_A NAMED_GPIO(en_pp5000_a) +#define GPIO_PCH_DSW_PWROK NAMED_GPIO(ec_pch_dsw_pwrok) +#define GPIO_PCH_PWRBTN_L NAMED_GPIO(ec_pch_pwr_btn_odl) +#define GPIO_PCH_RSMRST_L NAMED_GPIO(ec_pch_rsmrst_odl) +#define GPIO_PCH_RTCRST NAMED_GPIO(ec_pch_rtcrst) +#define GPIO_PCH_SLP_S0_L NAMED_GPIO(slp_s0_l) +#define GPIO_PCH_SLP_S3_L NAMED_GPIO(slp_s3_l) +#define GPIO_PCH_SLP_SUS_L NAMED_GPIO(slp_sus_l) +#define GPIO_PG_EC_ALL_SYS_PWRGD NAMED_GPIO(pg_ec_all_sys_pwrgd) +#define GPIO_PG_EC_DSW_PWROK NAMED_GPIO(pg_ec_dsw_pwrok) +#define GPIO_PG_EC_RSMRST_ODL NAMED_GPIO(pg_ec_rsmrst_odl) +#define GPIO_POWER_BUTTON_L NAMED_GPIO(h1_ec_pwr_btn_odl) +#define GPIO_RSMRST_L_PGOOD NAMED_GPIO(pg_ec_rsmrst_odl) +#define GPIO_SLP_SUS_L NAMED_GPIO(slp_sus_l) +#define GPIO_SYS_RESET_L NAMED_GPIO(sys_rst_odl) /* * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. |