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authorAyushee Shah <ayushee.shah@intel.com>2021-02-02 13:28:09 -0800
committerCommit Bot <commit-bot@chromium.org>2021-02-03 01:36:02 +0000
commit30de86869c610f51ad20f462c064754f971cd41f (patch)
tree70da66aab73747803cc4536b9c7aa323f2f7196f
parentcdbc16cd010ff66115ddb38faf7356cbfc0395bb (diff)
downloadchrome-ec-30de86869c610f51ad20f462c064754f971cd41f.tar.gz
TCPMv2: Store the cable's PD revision after soft reset SOP'
On soft reset SOP', the cable's PD revision is lost causing Thunderbolt and USB4 devices to downgrade. Hence, this patch retains the cable revision by storing it again after a soft reset SOP'. BUG=b:173725284 BRANCH=None TEST=No downgrade seen with USB4 with 100 continuous hotplugs Signed-off-by: Ayushee Shah <ayushee.shah@intel.com> Change-Id: I4498c6b397503058e5c4c2bce91e7d31960f6395 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2669418 Reviewed-by: Abe Levkoy <alevkoy@chromium.org> Commit-Queue: Abe Levkoy <alevkoy@chromium.org>
-rw-r--r--common/usbc/usb_pe_drp_sm.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/common/usbc/usb_pe_drp_sm.c b/common/usbc/usb_pe_drp_sm.c
index 9bfb51e067..f8f07adf2a 100644
--- a/common/usbc/usb_pe_drp_sm.c
+++ b/common/usbc/usb_pe_drp_sm.c
@@ -6394,6 +6394,17 @@ static void pe_vcs_cbl_send_soft_reset_run(int port)
if (PE_CHK_FLAG(port, PE_FLAGS_MSG_RECEIVED)) {
PE_CLR_FLAG(port, PE_FLAGS_MSG_RECEIVED);
cable_soft_reset_complete = true;
+
+ /*
+ * Note: If port partner runs PD 2.0, we must use PD 2.0 to
+ * communicate with the cable plug when in an explicit contract.
+ *
+ * PD Spec Table 6-2: Revision Interoperability during an
+ * Explicit Contract
+ */
+ if (prl_get_rev(port, TCPC_TX_SOP) != PD_REV20)
+ prl_set_rev(port, TCPC_TX_SOP_PRIME,
+ PD_HEADER_REV(rx_emsg[port].header));
}
/* No GoodCRC received, cable is not present */