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| author | Wealian Liao <whliao@nuvoton.corp-partner.google.com> | 2021-03-15 10:14:36 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-15 19:40:55 +0000 |
| commit | 4b8163ecc6bba97731405786d83e106212136f10 (patch) | |
| tree | 3a63f25ac74daa54ecbedf7fabf077c388182262 | |
| parent | 5edeeaafc0fb1ac282301ce9eed56ee9949de101 (diff) | |
| download | chrome-ec-4b8163ecc6bba97731405786d83e106212136f10.tar.gz | |
zephyr: set the NPCX FW header
For CONFIG_BOARD_RESET_AFTER_POWER_ON feature, the longer
initialization time lets H1 reset EC before EC writes
EC_RESET_FLAG_INITIAL_PWR flag to BBRAM. It causes EC couldn't
recognize the first reset-pin for the current mechanism.
Set the volteer, kohaku, delbin firmware NPCX firmware header to
improve the initialization time:
core clock to SPI clock ratio - 2,
SPI clock - 50MHz,
flash read mode - dual
BUG=None.
BRANCH=None.
TEST=Check output header offset 6 = 0x0c, offset 7 = 0x03.
Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: If9b3cd9a5ed7086a44ec7efa7bb5c7c40d4bcd81
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2759763
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
3 files changed, 15 insertions, 0 deletions
diff --git a/zephyr/projects/delbin/boards/arm/delbin/delbin_defconfig b/zephyr/projects/delbin/boards/arm/delbin/delbin_defconfig index 7691c0dc7e..09409aa4e3 100644 --- a/zephyr/projects/delbin/boards/arm/delbin/delbin_defconfig +++ b/zephyr/projects/delbin/boards/arm/delbin/delbin_defconfig @@ -9,6 +9,11 @@ CONFIG_SOC_SERIES_NPCX7=y CONFIG_SOC_NPCX7M6FB=y # Actually NPCX7M6FC; C just has 512K Flash CONFIG_BOARD_DELBIN=y +# NPCX BootLoader Table Configuration +CONFIG_PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_2=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_MAX_CLOCK_50=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_READ_MODE_DUAL=y + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig index 487ff7a757..03ab175ef8 100644 --- a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig +++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig @@ -9,6 +9,11 @@ CONFIG_SOC_SERIES_NPCX7=y CONFIG_SOC_NPCX7M6FB=y # Actually NPCX7M6FC; C just has 512K Flash CONFIG_BOARD_KOHAKU=y +# NPCX BootLoader Table Configuration +CONFIG_PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_2=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_MAX_CLOCK_50=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_READ_MODE_DUAL=y + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y diff --git a/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig b/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig index 45e31baeeb..9a510308a3 100644 --- a/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig +++ b/zephyr/projects/volteer/boards/arm/volteer/volteer_defconfig @@ -9,6 +9,11 @@ CONFIG_SOC_SERIES_NPCX7=y CONFIG_SOC_NPCX7M6FB=y # Actually NPCX7M6FC; C just has 512K Flash CONFIG_BOARD_VOLTEER=y +# NPCX BootLoader Table Configuration +CONFIG_PLATFORM_EC_RO_HEADER_CORE_CLOCK_SPI_CLOCK_RATIO_2=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_MAX_CLOCK_50=y +CONFIG_PLATFORM_EC_RO_HEADER_SPI_READ_MODE_DUAL=y + # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y |