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| author | Diana Z <dzigterman@chromium.org> | 2021-03-15 14:42:50 -0600 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-03-15 23:08:13 +0000 |
| commit | cee0967637f5bd5455f5c8c734ad73d76a9555ba (patch) | |
| tree | 8055906b9ebfca9f90e1bb6ad4872f6aff5b009a | |
| parent | 00cf3579a0e7fa9944f6b77821e05691ea5b4820 (diff) | |
| download | chrome-ec-cee0967637f5bd5455f5c8c734ad73d76a9555ba.tar.gz | |
Mancomb: Add EN_USM_ODL
Add EN_USM_ODL and set to open drain disabled for now. USM may be
enabled in the future if there are noise issues with the voltage
regulators.
BRANCH=None
BUG=b:182477680
TEST=make -j buildall
Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: I5614f36078f400385f6e9c37f599cd3bbc7f6991
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2762801
Reviewed-by: Rob Barnes <robbarnes@google.com>
Commit-Queue: Rob Barnes <robbarnes@google.com>
| -rw-r--r-- | baseboard/mancomb/base_gpio.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/baseboard/mancomb/base_gpio.inc b/baseboard/mancomb/base_gpio.inc index c2a2dde336..a5143c5b19 100644 --- a/baseboard/mancomb/base_gpio.inc +++ b/baseboard/mancomb/base_gpio.inc @@ -30,6 +30,7 @@ GPIO(EN_PWR_S5, PIN(B, 7), GPIO_OUT_LOW) /* Enable S5 Power */ GPIO(EN_PWR_S0_R, PIN(F, 1), GPIO_OUT_LOW) GPIO(EN_PWR_PCORE_S0_R, PIN(E, 1), GPIO_OUT_LOW) GPIO(EN_PPVAR_BJ_ADP_L, PIN(2, 1), GPIO_OUT_HIGH) /* Enable Barrel Jack Adapter Power */ +GPIO(EN_USM_ODL, PIN(1, 2), GPIO_ODR_HIGH) /* Enable ultrasonic mode */ ALTERNATE(/*MECH_PWR_BTN_ODL*/ PIN_MASK(D, BIT(2)), 0, MODULE_PMU, 0) /* PSL - Mechanical Power Button */ /* SOC Signals */ |