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| author | Jun Lin <CHLin56@nuvoton.com> | 2021-04-01 17:27:10 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-02 17:19:46 +0000 |
| commit | 3e7a2daf2127b2d18b142b307e19560f1a0fa692 (patch) | |
| tree | 133ffd20d31dfb986fc7dbe5f0f99fae9e937890 | |
| parent | 2f109eec78cc895b0ca9195af398610b0d44797a (diff) | |
| download | chrome-ec-3e7a2daf2127b2d18b142b307e19560f1a0fa692.tar.gz | |
zephyr: driver: SHI: remove SHI version control
In NPCX7mnFA, the old SHI module and the new SHI module co-exist in this
chip. We need to set DEVALTF.bit7 to enable the new version of the SHI
module. In the latter npcx7 variants and npcx9 chips, only the new SHI
module is supported. Because NPCX7mnFA chip variants are not included in
the zephyr repo. We can remove the version control setttng.
BUG=b:182600858
BRANCH=none
TEST=Test host command "version" and "Hello" on npcx7_evb and the host
emulator.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I43b2fb5294f39e2bf04a0794c9d54e87c8e0ce33
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2799335
Tested-by: CH Lin <chlin56@nuvoton.com>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
| -rw-r--r-- | zephyr/drivers/cros_shi/cros_shi_npcx.c | 8 | ||||
| -rw-r--r-- | zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml | 4 | ||||
| -rw-r--r-- | zephyr/include/cros/nuvoton/npcx.dtsi | 1 |
3 files changed, 0 insertions, 13 deletions
diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c index ba75eecdae..a65fa734f7 100644 --- a/zephyr/drivers/cros_shi/cros_shi_npcx.c +++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c @@ -803,14 +803,6 @@ static int shi_npcx_init(const struct device *dev) struct shi_reg *const inst = HAL_INSTANCE(dev); const struct device *const clk_dev = device_get_binding(NPCX_CLK_CTRL_NAME); - const struct npcx_alt shi_ver_ctrl[] = { - { .group = SHI_VER_CTRL_ALT_FILED(group), - .bit = SHI_VER_CTRL_ALT_FILED(bit), - .inverted = SHI_VER_CTRL_ALT_FILED(inv) } - }; - - /* Enable the new version of SHI hardware module. */ - npcx_pinctrl_mux_configure(shi_ver_ctrl, 1, 1); /* Turn on shi device clock first */ ret = clock_control_on(clk_dev, diff --git a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml index cf54cde7f8..c13f3e2b5a 100644 --- a/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml +++ b/zephyr/dts/bindings/cros_shi/nuvoton,npcx-cros-shi.yaml @@ -21,10 +21,6 @@ properties: required: true description: configurations of pinmux controllers - ver-ctrl: - type: phandle - required: true - description: configurations of SHI module version shi-cs-wui: type: phandle required: true diff --git a/zephyr/include/cros/nuvoton/npcx.dtsi b/zephyr/include/cros/nuvoton/npcx.dtsi index 9c646423bf..8cacae3e95 100644 --- a/zephyr/include/cros/nuvoton/npcx.dtsi +++ b/zephyr/include/cros/nuvoton/npcx.dtsi @@ -93,7 +93,6 @@ interrupts = <18 2>; clocks = <&pcc NPCX_CLOCK_BUS_APB3 NPCX_PWDWN_CTL5 1>; pinctrl-0 = <&altc_shi_sl>; - ver-ctrl = <&altf_shi_new>; shi-cs-wui =<&wui_io53>; label = "SHI"; }; |