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authorSimon Glass <sjg@chromium.org>2021-03-28 17:33:06 +1300
committerCommit Bot <commit-bot@chromium.org>2021-04-03 03:50:34 +0000
commit67ae6e3f6557d0805504f21ceee8341931eaed22 (patch)
tree558ab8930915fe7a7cefe04d6c22a62b2e875b8c
parent08712103484431b9c4a93d0ccecac68b7a9b84fa (diff)
downloadchrome-ec-67ae6e3f6557d0805504f21ceee8341931eaed22.tar.gz
lazor: Move GPIO_CCD_MODE_ODL to the shared file
Move this init to the shared usbc_config file so that Zephyr can use it. BUG=b:183296099 BRANCH=none TEST=build for lazor Signed-off-by: Simon Glass <sjg@chromium.org> Change-Id: I65b0f835b5005b783b752fe33085002f9689f9cc Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2789805 Reviewed-by: Yuval Peress <peress@chromium.org> Reviewed-by: Keith Short <keithshort@chromium.org> Reviewed-by: Denis Brockus <dbrockus@chromium.org> Reviewed-by: Jack Rosenthal <jrosenth@chromium.org> Reviewed-by: Wai-Hong Tam <waihong@google.com>
-rw-r--r--board/lazor/board.c7
-rw-r--r--board/lazor/usbc_config.c6
2 files changed, 6 insertions, 7 deletions
diff --git a/board/lazor/board.c b/board/lazor/board.c
index bcd59419f8..e9d5f101e3 100644
--- a/board/lazor/board.c
+++ b/board/lazor/board.c
@@ -388,13 +388,6 @@ DECLARE_HOOK(HOOK_INIT, board_update_sensor_config_from_sku,
/* Initialize board. */
static void board_init(void)
{
- /*
- * The H1 SBU line for CCD are behind PPC chip. The PPC internal FETs
- * for SBU may be disconnected after DP alt mode is off. Should enable
- * the CCD_MODE_ODL interrupt to make sure the SBU FETs are connected.
- */
- gpio_enable_interrupt(GPIO_CCD_MODE_ODL);
-
/* Set the backlight duty cycle to 0. AP will override it later. */
pwm_set_duty(PWM_CH_DISPLIGHT, 0);
}
diff --git a/board/lazor/usbc_config.c b/board/lazor/usbc_config.c
index b9ead659b2..475162b4c3 100644
--- a/board/lazor/usbc_config.c
+++ b/board/lazor/usbc_config.c
@@ -193,6 +193,12 @@ static void board_init_usbc(void)
/* Enable USB-A overcurrent interrupt */
gpio_enable_interrupt(GPIO_USB_A0_OC_ODL);
+ /*
+ * The H1 SBU line for CCD are behind PPC chip. The PPC internal FETs
+ * for SBU may be disconnected after DP alt mode is off. Should enable
+ * the CCD_MODE_ODL interrupt to make sure the SBU FETs are connected.
+ */
+ gpio_enable_interrupt(GPIO_CCD_MODE_ODL);
}
DECLARE_HOOK(HOOK_INIT, board_init_usbc, HOOK_PRIO_DEFAULT);