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| author | Tzung-Bi Shih <tzungbi@chromium.org> | 2021-04-08 16:26:57 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-04-09 05:38:41 +0000 |
| commit | 0e30ce3e8d5ca8cca02173a32ad3f5b370153b36 (patch) | |
| tree | 1c43b70dfd66dea2e23b3859a9dfe3e37496bd13 | |
| parent | 337b81f689f2f9a1045725d1a91a19be81b048bc (diff) | |
| download | chrome-ec-0e30ce3e8d5ca8cca02173a32ad3f5b370153b36.tar.gz | |
cherry_scp: change the SRAM size
Cherry's SRAM size is 768KB. Changes the memory layout accordingly.
BRANCH=none
BUG=b:184793035
TEST=make BOARD=cherry_scp
Signed-off-by: Tzung-Bi Shih <tzungbi@chromium.org>
Change-Id: I46de843610942842511d47922bd7d99a84ddeca8
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2813400
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
| -rw-r--r-- | board/cherry_scp/board.c | 4 | ||||
| -rw-r--r-- | board/cherry_scp/board.h | 8 |
2 files changed, 6 insertions, 6 deletions
diff --git a/board/cherry_scp/board.c b/board/cherry_scp/board.c index 31f1f069de..330bc5e06a 100644 --- a/board/cherry_scp/board.c +++ b/board/cherry_scp/board.c @@ -10,9 +10,9 @@ struct mpu_entry mpu_entries[NR_MPU_ENTRIES] = { /* SRAM (for most code, data) */ - {0, 0x0ffc00, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, + {0, 0xbfc00, MPU_ATTR_C | MPU_ATTR_W | MPU_ATTR_R}, /* SRAM (for IPI shared buffer) */ - {0x0ffc00, 0x100000, MPU_ATTR_W | MPU_ATTR_R}, + {0xbfc00, 0xc0000, MPU_ATTR_W | MPU_ATTR_R}, /* For AP domain */ {0x60000000, 0x70000000, MPU_ATTR_W | MPU_ATTR_R}, /* For SCP sys */ diff --git a/board/cherry_scp/board.h b/board/cherry_scp/board.h index 16d9bdf063..eb17d3360e 100644 --- a/board/cherry_scp/board.h +++ b/board/cherry_scp/board.h @@ -16,11 +16,11 @@ * | ROM vectortable, .text, .rodata, .data LMA * +-------------------- 0x58000 * | RAM .bss, .data - * +-------------------- 0x0ffc00 + * +-------------------- 0xbfc00 * | Reserved (padding for 1k-alignment) - * +-------------------- 0x0ffdb0 + * +-------------------- 0xbfdb0 * | IPI shared buffer with AP (288 + 8) * 2 - * +-------------------- 0x100000 + * +-------------------- 0xc0000 */ #define CONFIG_ROM_BASE 0x0 #define CONFIG_RAM_BASE 0x58000 @@ -28,6 +28,6 @@ #define CONFIG_RAM_SIZE ((CONFIG_IPC_SHARED_OBJ_ADDR & (~(0x400 - 1))) - \ CONFIG_RAM_BASE) -#define SCP_FW_END 0x100000 +#define SCP_FW_END 0xc0000 #endif /* __CROS_EC_BOARD_H */ |