zephyr: initial bringup for asurada

EC should boot with UART active

BUG=b:180980668
BRANCH=none
TEST=zmake configure -b $PROJ_HAYATO

Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Idae8453c5803442c2f9853c45462a7eb74d5c268
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2844770
Tested-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>

10 files changed, 206 insertions, 0 deletions

diff --git a/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.board b/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.board
new file mode 100644
index 0000000000..5e246f3d61
--- /dev/null
+++ b/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.board
@@ -0,0 +1,12 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# "BOARD" below refers to a Zephyr board, which does not have a 1:1
+# mapping with the Chrome OS concept of a board.  By Zephyr's
+# conventions, we'll still call it "BOARD_*" to make this more
+# applicable to be upstreamed, even though this code is shared by all
+# projects using Trogdor baseboard.
+config BOARD_ASURADA
+	bool "Google Asurada Baseboard"
+	depends on SOC_IT8XXX2
diff --git a/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.defconfig b/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.defconfig
new file mode 100644
index 0000000000..fc96797349
--- /dev/null
+++ b/zephyr/projects/asurada/boards/riscv/asurada/Kconfig.defconfig
@@ -0,0 +1,10 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+if BOARD_ASURADA
+
+config BOARD
+	default "asurada"
+
+endif # BOARD_ASURADA
diff --git a/zephyr/projects/asurada/boards/riscv/asurada/asurada.dts b/zephyr/projects/asurada/boards/riscv/asurada/asurada.dts
new file mode 100644
index 0000000000..58c3cdcf40
--- /dev/null
+++ b/zephyr/projects/asurada/boards/riscv/asurada/asurada.dts
@@ -0,0 +1,31 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/dts-v1/;
+
+#include <cros/ite/it8xxx2.dtsi>
+#include <dt-bindings/gpio_defines.h>
+#include <it8xxx2.dtsi>
+
+/ {
+	model = "Google Asurada Baseboard";
+
+	chosen {
+		zephyr,sram = &sram0;
+		zephyr,console = &uart1;
+		zephyr,shell-uart = &uart1;
+		zephyr,flash = &flash0;
+	};
+
+	named-i2c-ports {
+		compatible = "named-i2c-ports";
+	};
+};
+
+&uart1 {
+	status = "okay";
+	current-speed = <115200>;
+	clock-frequency = <1804800>;
+};
diff --git a/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig b/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig
new file mode 100644
index 0000000000..3810b05255
--- /dev/null
+++ b/zephyr/projects/asurada/boards/riscv/asurada/asurada_defconfig
@@ -0,0 +1,50 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+# Zephyr Kernel Configuration
+CONFIG_SOC_SERIES_RISCV32_IT8XXX2=y
+
+# Platform Configuration
+CONFIG_SOC_IT8XXX2=y
+CONFIG_BOARD_ASURADA=y
+
+# Serial Drivers
+CONFIG_SERIAL=y
+CONFIG_UART_INTERRUPT_DRIVEN=y
+
+# Enable console
+CONFIG_CONSOLE=y
+CONFIG_UART_CONSOLE=y
+CONFIG_UART_NS16550=y
+
+# Pinmux Driver
+CONFIG_PINMUX=y
+CONFIG_PINMUX_ITE_IT8XXX2=y
+
+# GPIO Controller
+CONFIG_GPIO=n
+CONFIG_GPIO_ITE_IT8XXX2=n
+
+# Clock configuration
+CONFIG_CLOCK_CONTROL=y
+CONFIG_ITE_IT8XXX2_TIMER=y
+
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32768
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# Code RAM base for IT8XXX2
+CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x80000000
+CONFIG_CROS_EC_RAM_BASE=0x80100000
+CONFIG_CROS_EC_DATA_RAM_SIZE=0x00100000
+CONFIG_CROS_EC_RAM_SIZE=0x0000f000
+
+CONFIG_CROS_EC_RO_MEM_OFF=0x0
+CONFIG_CROS_EC_RO_SIZE=0x40000
+CONFIG_CROS_EC_RW_MEM_OFF=0x40000
+CONFIG_CROS_EC_RW_SIZE=0x40000
+
+CONFIG_PLATFORM_EC_PROTECTED_STORAGE_OFF=0x0
+CONFIG_PLATFORM_EC_PROTECTED_STORAGE_SIZE=0x40000
+CONFIG_PLATFORM_EC_WRITABLE_STORAGE_OFF=0x40000
+CONFIG_PLATFORM_EC_WRITABLE_STORAGE_SIZE=0x40000
diff --git a/zephyr/projects/asurada/hayato/CMakeLists.txt b/zephyr/projects/asurada/hayato/CMakeLists.txt
new file mode 100644
index 0000000000..1685dd6812
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/CMakeLists.txt
@@ -0,0 +1,12 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+cmake_minimum_required(VERSION 3.13.1)
+
+set(BOARD_ROOT "${CMAKE_CURRENT_LIST_DIR}/..")
+
+find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
+project(hayato)
+
+zephyr_include_directories(include)
diff --git a/zephyr/projects/asurada/hayato/gpio.dts b/zephyr/projects/asurada/hayato/gpio.dts
new file mode 100644
index 0000000000..5de0a5e422
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/gpio.dts
@@ -0,0 +1,10 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/ {
+	named-gpios {
+		compatible = "named-gpios";
+	};
+};
diff --git a/zephyr/projects/asurada/hayato/include/gpio_map.h b/zephyr/projects/asurada/hayato/include/gpio_map.h
new file mode 100644
index 0000000000..dad1d91ff7
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/include/gpio_map.h
@@ -0,0 +1,32 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_GPIO_MAP_H
+#define __ZEPHYR_GPIO_MAP_H
+
+#include <devicetree.h>
+#include <gpio_signal.h>
+
+#define GPIO_ENTERING_RW		GPIO_UNIMPLEMENTED
+#define GPIO_WP_L			GPIO_UNIMPLEMENTED
+
+/*
+ * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
+ *
+ * Each GPIO_INT requires three parameters:
+ *   gpio_signal - The enum gpio_signal for the interrupt gpio
+ *   interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH)
+ *   handler - The platform/ec interrupt handler.
+ *
+ * Ensure that this files includes all necessary headers to declare all
+ * referenced handler functions.
+ *
+ * For example, one could use the follow definition:
+ * #define EC_CROS_GPIO_INTERRUPTS \
+ *   GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print)
+ */
+#define EC_CROS_GPIO_INTERRUPTS
+
+#endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/asurada/hayato/include/i2c_map.h b/zephyr/projects/asurada/hayato/include/i2c_map.h
new file mode 100644
index 0000000000..898d5c398c
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/include/i2c_map.h
@@ -0,0 +1,13 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef __ZEPHYR_I2C_MAP_H
+#define __ZEPHYR_I2C_MAP_H
+
+#include <devicetree.h>
+
+#include "i2c/i2c.h"
+
+#endif /* __ZEPHYR_I2C_MAP_H */
diff --git a/zephyr/projects/asurada/hayato/prj.conf b/zephyr/projects/asurada/hayato/prj.conf
new file mode 100644
index 0000000000..cb06837f50
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/prj.conf
@@ -0,0 +1,25 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+CONFIG_CROS_EC=y
+CONFIG_PLATFORM_EC=y
+CONFIG_PLATFORM_EC_BRINGUP=y
+CONFIG_SHIMMED_TASKS=y
+
+# Flash
+CONFIG_PLATFORM_EC_FLASH=y
+
+# TODO(b/180980668): bring these features up
+CONFIG_LTO=n
+CONFIG_PLATFORM_EC_ADC=n
+CONFIG_PLATFORM_EC_BACKLIGHT_LID=n
+CONFIG_PLATFORM_EC_BOARD_VERSION=n
+CONFIG_PLATFORM_EC_CONSOLE_CMD_SYSINFO=n
+CONFIG_PLATFORM_EC_HOSTCMD=y
+CONFIG_PLATFORM_EC_I2C=n
+CONFIG_PLATFORM_EC_KEYBOARD=n
+CONFIG_PLATFORM_EC_LID_SWITCH=n
+CONFIG_PLATFORM_EC_SWITCH=n
+CONFIG_PLATFORM_EC_VBOOT=n
+CONFIG_PLATFORM_EC_VBOOT_HASH=n
diff --git a/zephyr/projects/asurada/hayato/zmake.yaml b/zephyr/projects/asurada/hayato/zmake.yaml
new file mode 100644
index 0000000000..cda916c4ea
--- /dev/null
+++ b/zephyr/projects/asurada/hayato/zmake.yaml
@@ -0,0 +1,11 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+board: asurada
+dts-overlays:
+  - gpio.dts
+supported-zephyr-versions:
+  - v2.5
+toolchain: coreboot-sdk
+output-type: raw