zephyr: shim: chip/it8xxx2: add system shim

BUG=b:185202623
BRANCH=none
TEST=none

Signed-off-by: Denis Brockus <dbrockus@google.com>
Change-Id: Ia6e3821bb23b5aa928aa62ebc06abc0b1e9f8618
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2848433
Tested-by: Denis Brockus <dbrockus@chromium.org>
Tested-by: Jack Rosenthal <jrosenth@chromium.org>
Auto-Submit: Denis Brockus <dbrockus@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Commit-Queue: Jack Rosenthal <jrosenth@chromium.org>

3 files changed, 92 insertions, 0 deletions

diff --git a/zephyr/shim/chip/CMakeLists.txt b/zephyr/shim/chip/CMakeLists.txt
index 90cc7fcc46..59b5a6c739 100644
--- a/zephyr/shim/chip/CMakeLists.txt
+++ b/zephyr/shim/chip/CMakeLists.txt
@@ -4,5 +4,7 @@
 
 if (DEFINED CONFIG_SOC_FAMILY_NPCX)
 	add_subdirectory(npcx)
+elseif (DEFINED CONFIG_SOC_FAMILY_RISCV_ITE)
+	add_subdirectory(it8xxx2)
 endif()
 
diff --git a/zephyr/shim/chip/it8xxx2/CMakeLists.txt b/zephyr/shim/chip/it8xxx2/CMakeLists.txt
new file mode 100644
index 0000000000..d9772127d7
--- /dev/null
+++ b/zephyr/shim/chip/it8xxx2/CMakeLists.txt
@@ -0,0 +1,5 @@
+# Copyright 2021 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+zephyr_library_sources_ifdef(CONFIG_CROS_EC           system.c)
diff --git a/zephyr/shim/chip/it8xxx2/system.c b/zephyr/shim/chip/it8xxx2/system.c
new file mode 100644
index 0000000000..bb68a77b38
--- /dev/null
+++ b/zephyr/shim/chip/it8xxx2/system.c
@@ -0,0 +1,85 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include <drivers/cros_bbram.h>
+#include <logging/log.h>
+
+#include "system.h"
+
+#define GET_BBRAM_OFFSET(node) \
+	DT_PROP(DT_PATH(named_bbram_regions, node), offset)
+#define GET_BBRAM_SIZE(node) DT_PROP(DT_PATH(named_bbram_regions, node), size)
+
+LOG_MODULE_REGISTER(shim_ite_system, LOG_LEVEL_ERR);
+
+const struct device *bbram_dev;
+
+void chip_save_reset_flags(uint32_t flags)
+{
+	if (bbram_dev == NULL) {
+		LOG_ERR("bbram_dev doesn't have a binding");
+		return;
+	}
+
+	cros_bbram_write(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags),
+			 GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags);
+}
+
+uint32_t chip_read_reset_flags(void)
+{
+	uint32_t flags = 0;
+
+	if (bbram_dev == NULL) {
+		LOG_ERR("bbram_dev doesn't have a binding");
+		return 0;
+	}
+
+	cros_bbram_read(bbram_dev, GET_BBRAM_OFFSET(saved_reset_flags),
+			GET_BBRAM_SIZE(saved_reset_flags), (uint8_t *)&flags);
+
+	return flags;
+}
+
+int system_set_scratchpad(uint32_t value)
+{
+	if (bbram_dev == NULL) {
+		LOG_ERR("bbram_dev doesn't have a binding");
+		return 0;
+	}
+
+	cros_bbram_write(bbram_dev, GET_BBRAM_OFFSET(scratchpad),
+			 GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value);
+
+	return EC_SUCCESS;
+}
+
+uint32_t system_get_scratchpad(void)
+{
+	uint32_t value = 0;
+
+	if (bbram_dev == NULL) {
+		LOG_ERR("bbram_dev doesn't have a binding");
+		return 0;
+	}
+
+	cros_bbram_read(bbram_dev, GET_BBRAM_OFFSET(scratchpad),
+			GET_BBRAM_SIZE(scratchpad), (uint8_t *)&value);
+
+	return value;
+}
+
+static int chip_system_init(const struct device *unused)
+{
+	ARG_UNUSED(unused);
+
+	bbram_dev = device_get_binding(DT_LABEL(DT_NODELABEL(bbram)));
+	if (!bbram_dev) {
+		LOG_ERR("bbram_dev get binding failed");
+		return -1;
+	}
+
+	return 0;
+}
+SYS_INIT(chip_system_init, PRE_KERNEL_1, 15);