diff options
| author | Ting Shen <phoenixshen@google.com> | 2020-08-27 16:48:28 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-08-28 10:46:55 +0000 |
| commit | 723b0f9adce5ea03af335b9e1e3378682de635c8 (patch) | |
| tree | 96881e7f0e4d85d4ddbd82724a25027010ed4926 | |
| parent | 9a10b3e1d88cfca71fcaadff58e43e911483004a (diff) | |
| download | chrome-ec-723b0f9adce5ea03af335b9e1e3378682de635c8.tar.gz | |
asurada: keep PP5000_A on at G3
In current EC implementation, EC turns off PP5000_A in G3. Since
PPC is powered by PP5000_A, it needs special logic to handle the
re-power and re-initialization.
See b:154775121 for more discussion.
To simplify the logic, change the behavior to turn PP5000_A off
only when hibernate, so we won't need to worry about re-initialize
PPC anymore (resume from hibernate is a reboot, so it's also
covered here).
BUG=b:154775121
TEST=1) Run the test script in CL:2169443
2) Verify PD is functional whenever EC is awake.
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I07c03f9a8c0b77012d1284a283ce489e54b1a058
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2378940
Reviewed-by: Nicolas Boichat <drinkcat@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
| -rw-r--r-- | board/asurada/board.c | 6 | ||||
| -rw-r--r-- | board/asurada/gpio.inc | 1 | ||||
| -rw-r--r-- | power/mt8192.c | 3 |
3 files changed, 6 insertions, 4 deletions
diff --git a/board/asurada/board.c b/board/asurada/board.c index ac56592635..c7abaf6f61 100644 --- a/board/asurada/board.c +++ b/board/asurada/board.c @@ -92,6 +92,12 @@ int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); __override void board_hibernate_late(void) { /* + * Turn off PP5000_A. Required for devices without Z-state. + * Don't care for devices with Z-state. + */ + gpio_set_level(GPIO_EN_PP5000_A, 0); + + /* * GPIO_EN_SLP_Z not implemented in rev0/1, * fallback to usual hibernate process. */ diff --git a/board/asurada/gpio.inc b/board/asurada/gpio.inc index c21324ba86..bc14f66efa 100644 --- a/board/asurada/gpio.inc +++ b/board/asurada/gpio.inc @@ -64,7 +64,6 @@ GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) /* Power Sequencing Signals */ GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) -/* b/154775121: default on, because PPCs need the PP5000 to init in G3. */ GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) diff --git a/power/mt8192.c b/power/mt8192.c index 6f6eecfa20..4c0ca97aa7 100644 --- a/power/mt8192.c +++ b/power/mt8192.c @@ -287,7 +287,6 @@ enum power_state power_handle_state(enum power_state state) case POWER_G3S5: forcing_shutdown = 0; - GPIO_SET_LEVEL(GPIO_EN_PP5000_A, 1); /* Power up to next state */ return POWER_S5; @@ -414,8 +413,6 @@ enum power_state power_handle_state(enum power_state state) if (forcing_shutdown) GPIO_SET_LEVEL(GPIO_EC_PMIC_EN_ODL, 1); - GPIO_SET_LEVEL(GPIO_EN_PP5000_A, 0); - return POWER_G3; } |