diff options
| author | Iurii <cyp4test@gmail.com> | 2021-05-12 15:48:46 +0300 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-06-03 00:37:54 +0000 |
| commit | 4497c92d1cf6eb837718642516163cddd3c24449 (patch) | |
| tree | a62a8321f62980f3e37d99a477aa89c05472fb6d | |
| parent | 080fa7aed2de2916e2ccf0e70e55ac854edbd822 (diff) | |
| download | chrome-ec-4497c92d1cf6eb837718642516163cddd3c24449.tar.gz | |
IOEX_CCGXXF: Add 1.8V level GPIOs support
BUG=none
BRANCH=none
TEST=Tested voltage levels on CCGXX validation platform
Change-Id: Ibc8f0dc05ac4351e96d9479a99227633742ec7bc
Signed-off-by: Iurii Berezhanskyi <iurii.berezhanskyi@infineon.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2891837
Tested-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Aseda Aboagye <aaboagye@chromium.org>
Commit-Queue: Aseda Aboagye <aaboagye@chromium.org>
| -rw-r--r-- | driver/ioexpander/ccgxxf.c | 21 | ||||
| -rw-r--r-- | driver/tcpm/ccgxxf.h | 2 |
2 files changed, 20 insertions, 3 deletions
diff --git a/driver/ioexpander/ccgxxf.c b/driver/ioexpander/ccgxxf.c index afaa6820d5..ac079d7b2f 100644 --- a/driver/ioexpander/ccgxxf.c +++ b/driver/ioexpander/ccgxxf.c @@ -5,12 +5,15 @@ * Cypress CCGXXF I/O Port expander (built inside PD chip) driver source */ +#include "console.h" #include "i2c.h" #include "ioexpander.h" /* Add after all include files */ #include "ccgxxf.h" +#define CPRINTS(format, args...) cprints(CC_GPIO, format, ## args) + static inline int ccgxxf_read8(int ioex, int reg, int *data) { return i2c_read8(ioex_config[ioex].i2c_host_port, @@ -51,15 +54,23 @@ static int ccgxxf_set_level(int ioex, int port, int mask, int val) * - Output pins are supported with open-drain & pull-up * - Input pins are supported with pull-up & pull-down * - Analog pins - * - * TODO: Add support for 1.8V level GPIOs, after implementing it in the - * CCGXXF firmware. + * - 1.8V level GPIOs are supported per port and outputs can only be + * open-drain pins */ static int ccgxxf_set_flags_by_mask(int ioex, int port, int mask, int flags) { uint16_t pin_mode; int rv; + /* Push-pull output can't be configured for 1.8V level */ + if ((flags & GPIO_OUTPUT) && (flags & GPIO_SEL_1P8V) && + !(flags & GPIO_OPEN_DRAIN)) { + CPRINTS("Invalid flags: ioex=%d, port=%d, mask=%d, flags=0x%x", + ioex, port, mask, flags); + + return EC_ERROR_INVAL; + } + if (flags & GPIO_OUTPUT) { if (flags & GPIO_OPEN_DRAIN) { if (flags & GPIO_PULL_UP) @@ -88,6 +99,10 @@ static int ccgxxf_set_flags_by_mask(int ioex, int port, int mask, int flags) pin_mode = port | (pin_mode << CCGXXF_GPIO_PIN_MODE_SHIFT) | (mask << CCGXXF_GPIO_PIN_MASK_SHIFT); + /* Note: once set the 1.8V level affect whole GPIO port */ + if (flags & GPIO_SEL_1P8V) + pin_mode |= CCGXXF_GPIO_1P8V_SEL; + /* * Before setting the GPIO mode, initilaize the pins to default value * to avoid spike on pins. diff --git a/driver/tcpm/ccgxxf.h b/driver/tcpm/ccgxxf.h index 8868e9174c..bc1af263e1 100644 --- a/driver/tcpm/ccgxxf.h +++ b/driver/tcpm/ccgxxf.h @@ -43,6 +43,8 @@ enum ccgxxf_io_pins { #define CCGXXF_REG_GPIO_MODE 0x88 #define CCGXXF_GPIO_PIN_MASK_SHIFT 8 #define CCGXXF_GPIO_PIN_MODE_SHIFT 2 +#define CCGXXF_GPIO_1P8V_SEL BIT(7) + enum ccgxxf_gpio_mode { CCGXXF_GPIO_MODE_HIZ_ANALOG, CCGXXF_GPIO_MODE_HIZ_DIGITAL, |