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authorDino Li <Dino.Li@ite.com.tw>2021-06-08 22:38:23 +0800
committerCommit Bot <commit-bot@chromium.org>2021-06-10 06:12:19 +0000
commitfa451fa44d7f36c0073c795c9969d8e7f03fd1f3 (patch)
treef1013f2c3510b1eb3aee25c56cde7b07182c0717
parentd8e89fc1cc4513a46931724e828efaa8029311fa (diff)
downloadchrome-ec-fa451fa44d7f36c0073c795c9969d8e7f03fd1f3.tar.gz
it8xxx2/spi: re-init spi module after disable emmc boot mode
This CL reset and re-initialize SPI module after AP jumped to BL. So EC will have a good state to start receiving AP's commands. BRANCH=icarus BUG=b:184702635 TEST=on cozmo, confirm that EC doesn't miss the first command from AP after booting. Signed-off-by: Dino Li <Dino.Li@ite.com.tw> Change-Id: Ib7cf0e9cb70a67950d53d3abc7df42969c9b4dc2 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2947422 Tested-by: Eric Yilun Lin <yllin@google.com> Reviewed-by: Eric Yilun Lin <yllin@google.com>
-rw-r--r--baseboard/kukui/emmc_ite.c37
-rw-r--r--chip/it83xx/spi.c17
2 files changed, 17 insertions, 37 deletions
diff --git a/baseboard/kukui/emmc_ite.c b/baseboard/kukui/emmc_ite.c
index 79019164ec..8c3e63064c 100644
--- a/baseboard/kukui/emmc_ite.c
+++ b/baseboard/kukui/emmc_ite.c
@@ -79,34 +79,6 @@ static void emmc_enable_spi(void)
}
DECLARE_HOOK(HOOK_CHIPSET_STARTUP, emmc_enable_spi, HOOK_PRIO_FIRST);
-static void emmc_disable_spi(void)
-{
- /* Set SPI pin mux to AP communication mode */
- IT83XX_GCTRL_PIN_MUX0 &= ~BIT(7);
- /* Disable eMMC Alternative Boot Mode */
- IT83XX_SPI_EMMCBMR &= ~IT83XX_SPI_EMMCABM;
- /* Reset TX and RX FIFO */
- emmc_reset_spi_tx();
- emmc_reset_spi_rx();
- /* Restore setting of SPI slave for communication */
- /* EC responses "ready to receive" while AP clock in bytes. */
- IT83XX_SPI_SPISRDR = EC_SPI_OLD_READY;
- /* FIFO won't be overwritten once it's full */
- IT83XX_SPI_GCR2 = IT83XX_SPI_RXF2OC | IT83XX_SPI_RXF1OC
- | IT83XX_SPI_RXFAR;
- /* Write to clear pending interrupt bits */
- IT83XX_SPI_ISR = 0xff;
- IT83XX_SPI_RX_VLISR = IT83XX_SPI_RVLI;
- /* Enable RX valid length interrupt */
- IT83XX_SPI_IMR = 0xff;
- IT83XX_SPI_RX_VLISMR &= ~IT83XX_SPI_RVLIM;
- /* Disable interrupt of detection of AP's BOOTBLOCK_EN_L */
- gpio_disable_interrupt(GPIO_BOOTBLOCK_EN_L);
-
- enable_sleep(SLEEP_MASK_EMMC);
- CPRINTS("eMMC emulation disabled");
-}
-
static void emmc_init_spi(void)
{
/* Enable alternate function */
@@ -209,15 +181,6 @@ static enum emmc_cmd emmc_parse_command(int index, uint32_t *cmd0)
return EMMC_ERROR;
}
-/* AP has booted */
-void emmc_ap_jump_to_bl(enum gpio_signal signal)
-{
- /* Transmission completed. Set SPI communication mode */
- emmc_disable_spi();
-
- CPRINTS("AP Jumped to BL");
-}
-
void spi_emmc_cmd0_isr(uint32_t *cmd0_payload)
{
enum emmc_cmd cmd;
diff --git a/chip/it83xx/spi.c b/chip/it83xx/spi.c
index d92d98fdf2..a21ba8c10d 100644
--- a/chip/it83xx/spi.c
+++ b/chip/it83xx/spi.c
@@ -363,6 +363,23 @@ static void spi_reset(void)
}
DECLARE_HOOK(HOOK_SYSJUMP, spi_reset, HOOK_PRIO_DEFAULT);
+#if defined(SECTION_IS_RO) && defined(CONFIG_BOOTBLOCK)
+/* AP has booted */
+void emmc_ap_jump_to_bl(enum gpio_signal signal)
+{
+ /* Transmission completed. Set SPI pin mux to AP communication mode */
+ IT83XX_GCTRL_PIN_MUX0 &= ~BIT(7);
+ /* Reset and re-initialize SPI module to communication mode */
+ spi_reset();
+ spi_init();
+ /* Disable interrupt of detection of AP's BOOTBLOCK_EN_L */
+ gpio_disable_interrupt(GPIO_BOOTBLOCK_EN_L);
+ enable_sleep(SLEEP_MASK_EMMC);
+
+ CPRINTS("eMMC emulation disabled. AP Jumped to BL");
+}
+#endif
+
/* Get protocol information */
enum ec_status spi_get_protocol_info(struct host_cmd_handler_args *args)
{