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authorKeith Short <keithshort@chromium.org>2021-06-09 17:28:22 -0600
committerCommit Bot <commit-bot@chromium.org>2021-06-11 22:27:30 +0000
commit13f0d29b93b43dfdfece4ec2991c9869959778d3 (patch)
treebf55e918eddbe0545c215f1eb275b20c15c043c4
parent194a3b2fa981a052a350447124418b89e9aff572 (diff)
downloadchrome-ec-13f0d29b93b43dfdfece4ec2991c9869959778d3.tar.gz
zephyr: kohaku: Delete configs set to NPCX defaults
Delete the Kconfig options that are now setup by default for the NPCX7 chipset. BUG=none BRANCH=none TEST=zmake testall Signed-off-by: Keith Short <keithshort@chromium.org> Change-Id: I7bfca4a85e2b469e0f9e6d59f873851ca081cf29 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2954921 Reviewed-by: Yuval Peress <peress@chromium.org>
-rw-r--r--zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig32
1 files changed, 1 insertions, 31 deletions
diff --git a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig
index a92531faa1..30b80190c8 100644
--- a/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig
+++ b/zephyr/projects/kohaku/boards/arm/kohaku/kohaku_defconfig
@@ -4,9 +4,9 @@
# Zephyr Kernel Configuration
CONFIG_SOC_SERIES_NPCX7=y
+CONFIG_SOC_NPCX7M6FC=y
# Platform Configuration
-CONFIG_SOC_NPCX7M6FC=y
CONFIG_BOARD_KOHAKU=y
# Enable NPCX firmware header generator
@@ -34,33 +34,3 @@ CONFIG_CLOCK_CONTROL=y
# WATCHDOG configuration
CONFIG_WATCHDOG=y
-# Set the delay time for printing panic data.
-# 1 cycle is about 32ms. 500ms is about 16 cycles.
-CONFIG_WDT_NPCX_DELAY_CYCLES=16
-
-# PLL configuration
-CONFIG_CLOCK_NPCX_OSC_CYCLES_PER_SEC=90000000
-CONFIG_CLOCK_NPCX_APB1_PRESCALER=6
-CONFIG_CLOCK_NPCX_APB2_PRESCALER=6
-CONFIG_CLOCK_NPCX_APB3_PRESCALER=6
-
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=15000000
-
-# The following are valid for all:
-# npcx7m6f, npcx7m6fb, npcx7m6fc, npcx7m6g
-CONFIG_CROS_EC_PROGRAM_MEMORY_BASE=0x10090000
-CONFIG_CROS_EC_RAM_BASE=0x200c0000
-CONFIG_CROS_EC_DATA_RAM_SIZE=0x00010000
-CONFIG_CROS_EC_RAM_SIZE=0x0000f800
-
-CONFIG_FLASH_SIZE=512
-CONFIG_CROS_EC_RO_MEM_OFF=0x0
-# (44*1024)
-CONFIG_CROS_EC_RO_SIZE=0x30000
-# (CONFIG_CROS_EC_RO_MEM_OFF + CONFIG_CROS_EC_RO_SIZE)
-CONFIG_CROS_EC_RW_MEM_OFF=0x30000
-# (CONFIG_CROS_EC_FLASH_SIZE - CONFIG_CROS_EC_RW_MEM_OFF -
-# CONFIG_CROS_EC_RO_MEM_OFF)
-CONFIG_CROS_EC_RW_SIZE=0x30000
-
-CONFIG_FLASH_SIZE=512