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authorCaveh Jalali <caveh@chromium.org>2021-07-21 00:20:59 -0700
committerCommit Bot <commit-bot@chromium.org>2021-07-22 06:01:51 +0000
commitd89d526c638fb033bdef1c5ee05fbb5f3a20310a (patch)
tree948c7e264ce1cba1a0fb0eadac42db43ba7a062e
parent1cac4e5adeb5e64dc1e2856561e1dfdc06e7776e (diff)
downloadchrome-ec-d89d526c638fb033bdef1c5ee05fbb5f3a20310a.tar.gz
ppc/nx20p348x: Initialize device control reg
This initializes the Device Control Register (0x0b) to its power-on reset value. This chip is not connected to the system reset signal, so we need to explicitly set registers to their power-on reset value so we start from the same configuration when we reboot as we do on system power on. BRANCH=none BUG=b:193211352 TEST=charging from another chromebook is reliable now Signed-off-by: Caveh Jalali <caveh@chromium.org> Change-Id: I82ce3fd624091b89668a682cb8748af171552d72 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3044412
-rw-r--r--driver/ppc/nx20p348x.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/driver/ppc/nx20p348x.c b/driver/ppc/nx20p348x.c
index bb6236c143..024e0906bd 100644
--- a/driver/ppc/nx20p348x.c
+++ b/driver/ppc/nx20p348x.c
@@ -363,6 +363,11 @@ static int nx20p348x_init(int port)
#endif
nx20p348x_set_vbus_source_current_limit(port, initial_current_limit);
+ /* Restore power-on reset value */
+ rv = write_reg(port, NX20P348X_DEVICE_CONTROL_REG, 0);
+ if (rv)
+ return rv;
+
return EC_SUCCESS;
}