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authorZhuohao Lee <zhuohao@chromium.org>2021-06-07 19:53:48 +0800
committerCommit Bot <commit-bot@chromium.org>2021-06-07 17:44:28 +0000
commit3cd96f783607823625843bc248343b049344785e (patch)
tree30fa21c455261fcf28fa4b9dd861d9c217aac7e0
parent996872aef6a65f03dcebb9f552b1e2485cedaad8 (diff)
downloadchrome-ec-3cd96f783607823625843bc248343b049344785e.tar.gz
flash_fp_mcu: Add a config for the Brya fingerprint MCU
To enable the fingerprint MCU firmware update, we add the config for the Brya. BUG=b:181635081 BRANCH=None TEST=use 'flash_fp_mcu ${BINARY_PATH}', the firmware is programmed correctly. Change-Id: Ic54b9bb25a7b21a871445a7052d605041e1c79d2 Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2944308 Reviewed-by: Alex Levin <levinale@google.com> Commit-Queue: Alex Levin <levinale@google.com>
-rw-r--r--util/flash_fp_mcu21
1 files changed, 21 insertions, 0 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu
index 3f93e613dc..180f238e1a 100644
--- a/util/flash_fp_mcu
+++ b/util/flash_fp_mcu
@@ -494,6 +494,27 @@ config_volteer() {
readonly GPIO_PWREN=237
}
+config_brya() {
+ readonly TRANSPORT="SPI"
+ readonly DEVICE="/dev/spidev0.0"
+
+ # See kernel/v5.10/drivers/pinctrl/intel/pinctrl-tigerlake.c
+ # for pin name and pin number.
+ # Examine `cat /sys/kernel/debug/pinctrl/INTC1055:00/gpio-ranges` on a
+ # brya device to determine gpio number from pin number.
+ # For example: GPP_D1 is ISH_GP_1 which can be queried from EDS
+ # the pin number is 100 from the pinctrl-tigerlake.c.
+ # From the gpio-ranges, the gpio value is 312 + (100-99) = 313
+
+ readonly GPIO_CHIP="gpiochip152"
+ # FPMCU RST_ODL is on GPP_D1 = 312 + (100 - 99) = 313
+ readonly GPIO_NRST=313
+ # FPMCU BOOT0 is on GPP_D0 = 312 + (99 - 99) = 312
+ readonly GPIO_BOOT0=312
+ # FP_PWR_EN is on GPP_D2 = 312 + (101 - 99) = 314
+ readonly GPIO_PWREN=314
+}
+
config_zork() {
readonly TRANSPORT="UART"
readonly DEVICE="/dev/ttyS1"