diff options
| author | Wai-Hong Tam <waihong@google.com> | 2021-07-19 19:51:26 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-12 23:58:23 +0000 |
| commit | 939d53151b40cdf77803f7107140a726ae497d18 (patch) | |
| tree | 4b76318aa7c3cfec8bb3971d6283469ac2b5c1ed | |
| parent | 340de536d276f44ae7acb3394c604376380a001b (diff) | |
| download | chrome-ec-939d53151b40cdf77803f7107140a726ae497d18.tar.gz | |
herobrine_npcx9: Remove AP_RST_L and WARM_RESET_L 1.8V flag
The AP_RST_L and WARM_RESET_L GPIOs are moved to the pins that are
already operate at 1.8V, which are not configurable. The 1.8 flags
are unnecessary.
BRANCH=None
BUG=b:192253134
TEST=Built the herobrine_npcx9 image successfully.
Change-Id: I0c5b64ea18b7eada57aca65374d88037e546a609
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3039385
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
| -rw-r--r-- | board/herobrine_npcx9/gpio.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/board/herobrine_npcx9/gpio.inc b/board/herobrine_npcx9/gpio.inc index 4091c19d18..187426e977 100644 --- a/board/herobrine_npcx9/gpio.inc +++ b/board/herobrine_npcx9/gpio.inc @@ -24,7 +24,7 @@ GPIO_INT(EC_VOLDN_BTN_ODL, PIN(6, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_inte GPIO_INT(EC_VOLUP_BTN_ODL, PIN(C, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* Volume Down button */ GPIO_INT(EC_WP_ODL, PIN(D, 3), GPIO_INT_BOTH, switch_interrupt) /* Write protection */ GPIO_INT(LID_OPEN_EC, PIN(0, 1), GPIO_INT_BOTH, lid_interrupt) /* Lid open */ -GPIO_INT(AP_RST_L, PIN(5, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_ap_rst_interrupt) /* PMIC to signal AP reset */ +GPIO_INT(AP_RST_L, PIN(5, 1), GPIO_INT_BOTH, chipset_ap_rst_interrupt) /* PMIC to signal AP reset */ GPIO_INT(PS_HOLD, PIN(A, 6), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) /* Indicate when AP triggers reset/shutdown */ GPIO_INT(AP_SUSPEND, PIN(5, 7), GPIO_INT_BOTH, power_signal_interrupt) /* Suspend signal from PMIC */ /* @@ -34,7 +34,7 @@ GPIO_INT(AP_SUSPEND, PIN(5, 7), GPIO_INT_BOTH, power_signal_interrupt) / * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD. */ GPIO_INT(MB_POWER_GOOD, PIN(3, 7), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_power_good_interrupt) /* PP1800_L18B from PMIC */ -GPIO_INT(WARM_RESET_L, PIN(B, 0), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* AP warm reset */ +GPIO_INT(WARM_RESET_L, PIN(B, 0), GPIO_INT_BOTH, chipset_warm_reset_interrupt) /* AP warm reset */ GPIO_INT(AP_EC_SPI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN, shi_cs_event) /* EC SPI Chip Select */ /* Sensor interrupts */ |