diff options
| author | Ting Shen <phoenixshen@google.com> | 2021-08-20 16:24:28 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-25 09:40:15 +0000 |
| commit | eacc8beb99351134912cd5c71280abfa3a857111 (patch) | |
| tree | 81d8167374c4216df2c6b78ae99b857692d5ed52 | |
| parent | 5837e32e2dfbbbe50e5ba51eb6464b0c2b6f4103 (diff) | |
| download | chrome-ec-eacc8beb99351134912cd5c71280abfa3a857111.tar.gz | |
cherry: enable FRS
BUG=b:190348051
TEST=Verify FRS workable
BRANCH=none
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: Ie612cb2e5448db4432772f32e2f84ea6a471d4b6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3084323
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
Reviewed-by: Eric Yilun Lin <yllin@google.com>
| -rw-r--r-- | baseboard/cherry/baseboard.c | 39 | ||||
| -rw-r--r-- | baseboard/cherry/baseboard.h | 1 |
2 files changed, 37 insertions, 3 deletions
diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index 72f1a68881..93f898dad0 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -343,7 +343,7 @@ const struct i2c_port_t i2c_ports[] = { {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, - {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, + {"usb1", IT83XX_I2C_CH_E, 1000, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, }; const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); @@ -411,16 +411,25 @@ int rt1718s_gpio_ctrl(enum rt1718s_gpio_state state) __override int board_rt1718s_init(int port) { - /* set GPIO1 is push pull, as output, output low. */ + /* set GPIO 1~3 as push pull, as output, output low. */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_CTRL, RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | RT1718S_GPIOX_CTRL_GPIOX_O, RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); - /* set GPIO2 is push pull, as output, output low. */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_CTRL, RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | RT1718S_GPIOX_CTRL_GPIOX_O, RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO3_CTRL, + RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | + RT1718S_GPIOX_CTRL_GPIOX_O, + RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); + + /* gpio 1/2 output high when receiving frx signal */ + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, + RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL, + RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, 0xFF)); /* Turn on SBU switch */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_RT2_SBU_CTRL_01, @@ -428,6 +437,15 @@ __override int board_rt1718s_init(int port) RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN | RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN, 0xFF)); + /* Trigger GPIO 1/2 change when FRS signal received */ + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3, + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 | + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1, + RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2)); + /* Set FRS signal detect time to 46.875us */ + RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1, + RT1718S_FRS_CTRL1_FRSWAPRX_MASK, + 0xFF)); return EC_SUCCESS; } @@ -597,3 +615,18 @@ static void baseboard_init(void) gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); } DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT - 1); + +__override int board_pd_set_frs_enable(int port, int enable) +{ + int value; + + if (port == 0) + return EC_SUCCESS; + + value = RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE; + if (enable) + value |= RT1718S_GPIOX_CTRL_GPIOX_O; + + /* Use write instead of update to save 1 i2c read in FRS path */ + return rt1718s_write8(port, RT1718S_GPIO3_CTRL, value); +} diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h index 83a3557149..21ad6a5e5c 100644 --- a/baseboard/cherry/baseboard.h +++ b/baseboard/cherry/baseboard.h @@ -135,6 +135,7 @@ #define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM #define CONFIG_USB_PD_DUAL_ROLE #define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE +#define CONFIG_USB_PD_FRS_PPC #define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 1 #define CONFIG_USB_PD_LOGGING #define CONFIG_USB_PD_PORT_MAX_COUNT 2 |