diff options
| author | Vijay Hiremath <vijay.p.hiremath@intel.com> | 2021-08-06 12:56:26 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-09-08 22:55:11 +0000 |
| commit | 3bb1c5b1d1ec340bd9def9fc120c6f01d8835578 (patch) | |
| tree | 8fd2e064cf84c94b633119dabcf8ee0e3c3fb6f2 | |
| parent | 6b1c5a80aa337696c6ceb145e7de00f05b65ec04 (diff) | |
| download | chrome-ec-3bb1c5b1d1ec340bd9def9fc120c6f01d8835578.tar.gz | |
intelrvp: Add MECC1.1 support
MECC1.1 is defined for ADL+ platforms. To simplify the the BOM
stuffing options and also to remove dependency on H1 by MECC vendors,
H1 is added on RVP as AIC.
BUG=b:197659347
BRANCH=none
TEST=make buildall -j
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
Change-Id: I5c3b4b2b2a116ec8dc5a7448c71a6b8654a78bba
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3114218
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Li Feng <li1.feng@intel.com>
Commit-Queue: Keith Short <keithshort@chromium.org>
| -rw-r--r-- | baseboard/intelrvp/README.md | 21 | ||||
| -rw-r--r-- | include/config.h | 8 |
2 files changed, 21 insertions, 8 deletions
diff --git a/baseboard/intelrvp/README.md b/baseboard/intelrvp/README.md index 21e30ee417..39286e130d 100644 --- a/baseboard/intelrvp/README.md +++ b/baseboard/intelrvp/README.md @@ -12,7 +12,7 @@ validated by software by MECC. ## MECC version 0.9 features -1. Power to MECC is provide by RVP (battery + DC Jack + Type C) +1. Power to MECC is provided by RVP (battery + DC Jack + Type C) 2. Power control pins for Intel SOC are added 3. Servo V2 header need to be added by MECC 4. Google H1 chip need to be added by MECC (optional for EC vendors) @@ -24,7 +24,7 @@ validated by software by MECC. ## MECC version 1.0 features -1. Power to MECC is provide by RVP (battery + DC Jack + Type C) +1. Power to MECC is provided by RVP (battery + DC Jack + Type C) 2. Power control pins for Intel SOC are added 3. Servo V2 header need to be added by MECC 4. Google H1 chip need to be added by MECC (optional for EC vendors) @@ -34,3 +34,20 @@ validated by software by MECC. 7. 6 I2C Channels 8. 2 SMLINK Channels 9. 2 I3C channels + +## MECC version 1.1 features + +1. Power to MECC is provided by RVP (battery + DC Jack + Type C) +2. Power control pins for Intel SOC are added +3. Servo V2 header is added on RVP as an AIC +4. Google H1 chip is added on RVP as an AIC +5. 4 Type-C port support (SRC/SNK/MUX/Rerimer) as an (AIC) +6. Optional 2 Type-C port routed to MECC for integrated TCPC support +7. 6 I2C Channels +8. 2 SMLINK Channels +9. 2 I3C channels +10. 1 Fan control +11. 4 ADC based temperature sensors +12. PECI control +13. I2C based Keyboard is added on RVP as an AIC +14. Both Google & Intel CCD support is added on RVP on Type-C port 0 diff --git a/include/config.h b/include/config.h index f157047273..fdc1638d06 100644 --- a/include/config.h +++ b/include/config.h @@ -4757,15 +4757,11 @@ /* * Intel Reference Validation Platform's (RVP) Modular Embedded Control - * Card (MECC) version 0.9 + * Card (MECC) versions */ #undef CONFIG_INTEL_RVP_MECC_VERSION_0_9 - -/* - * Intel Reference Validation Platform's (RVP) Modular Embedded Control - * Card (MECC) version 1.0 - */ #undef CONFIG_INTEL_RVP_MECC_VERSION_1_0 +#undef CONFIG_INTEL_RVP_MECC_VERSION_1_1 /*****************************************************************************/ |