diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2021-09-17 11:28:47 -0600 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-09-17 23:50:52 +0000 |
commit | 11cd21d120edd8281cbdc6ba82dd1a3d6c38f0cc (patch) | |
tree | 0ad2eaf7262e84d5f2a113e4998433488ed42a20 | |
parent | 351e3fe74dbbf8ddd9cd1b21f45de57f7da8a76a (diff) | |
download | chrome-ec-11cd21d120edd8281cbdc6ba82dd1a3d6c38f0cc.tar.gz |
zephyr: Initial port for Guybrush
BUG=b:195137794
BRANCH=none
TEST=uart works
Change-Id: Ib7e177cfd501f78afb6edf943f078466dca455a6
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3168392
Reviewed-by: Diana Z <dzigterman@chromium.org>
-rw-r--r-- | zephyr/boards/arm/npcx9/Kconfig.board | 10 | ||||
-rw-r--r-- | zephyr/boards/arm/npcx9/Kconfig.defconfig | 10 | ||||
-rw-r--r-- | zephyr/boards/arm/npcx9/board.cmake | 5 | ||||
-rw-r--r-- | zephyr/boards/arm/npcx9/npcx9.dts | 167 | ||||
-rw-r--r-- | zephyr/boards/arm/npcx9/npcx9_defconfig | 33 | ||||
-rw-r--r-- | zephyr/projects/guybrush/CMakeLists.txt | 15 | ||||
-rw-r--r-- | zephyr/projects/guybrush/gpio.dts | 4 | ||||
-rw-r--r-- | zephyr/projects/guybrush/include/gpio_map.h | 32 | ||||
-rw-r--r-- | zephyr/projects/guybrush/prj.conf | 30 | ||||
-rw-r--r-- | zephyr/projects/guybrush/zmake.yaml | 13 |
10 files changed, 319 insertions, 0 deletions
diff --git a/zephyr/boards/arm/npcx9/Kconfig.board b/zephyr/boards/arm/npcx9/Kconfig.board new file mode 100644 index 0000000000..e4b184d83e --- /dev/null +++ b/zephyr/boards/arm/npcx9/Kconfig.board @@ -0,0 +1,10 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +config BOARD_NPCX9 + bool "NPCX9 Zephyr Board" + depends on SOC_NPCX9M3F + # NPCX doesn't actually have enough ram for coverage, but this will + # allow generating initial 0 line coverage. + select HAS_COVERAGE_SUPPORT diff --git a/zephyr/boards/arm/npcx9/Kconfig.defconfig b/zephyr/boards/arm/npcx9/Kconfig.defconfig new file mode 100644 index 0000000000..9b83915f04 --- /dev/null +++ b/zephyr/boards/arm/npcx9/Kconfig.defconfig @@ -0,0 +1,10 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +if BOARD_NPCX9 + +config BOARD + default "npcx9" + +endif # BOARD_TROGDOR diff --git a/zephyr/boards/arm/npcx9/board.cmake b/zephyr/boards/arm/npcx9/board.cmake new file mode 100644 index 0000000000..a204305534 --- /dev/null +++ b/zephyr/boards/arm/npcx9/board.cmake @@ -0,0 +1,5 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +set(NPCX_IMAGE_FILE ${PROJECT_BINARY_DIR}/zephyr.npcx.bin) diff --git a/zephyr/boards/arm/npcx9/npcx9.dts b/zephyr/boards/arm/npcx9/npcx9.dts new file mode 100644 index 0000000000..e6acb22ede --- /dev/null +++ b/zephyr/boards/arm/npcx9/npcx9.dts @@ -0,0 +1,167 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/dts-v1/; + +#include <cros/nuvoton/npcx9.dtsi> +#include <dt-bindings/adc/adc.h> +#include <dt-bindings/gpio_defines.h> +#include <dt-bindings/wake_mask_event_defines.h> +#include <nuvoton/npcx9m3f.dtsi> + +/ { + model = "NPCX9"; + + aliases { + i2c-0 = &i2c0_0; + i2c-1 = &i2c1_0; + i2c-2 = &i2c2_0; + i2c-3 = &i2c3_0; + i2c-5 = &i2c5_0; + i2c-7 = &i2c7_0; + }; + + chosen { + zephyr,sram = &sram0; + zephyr,console = &uart1; + zephyr,shell-uart = &uart1; + zephyr,flash = &flash0; + }; + + named-i2c-ports { + compatible = "named-i2c-ports"; + i2c_sensor: sensor { + i2c-port = <&i2c0_0>; + enum-name = "I2C_PORT_SENSOR"; + label = "SENSOR"; + }; + tcpc0_2 { + i2c-port = <&i2c1_0>; + enum-name = "I2C_PORT_USB_C0_C2_TCPC"; + label = "TCPC0,2"; + }; + tcpc1 { + i2c-port = <&i2c4_1>; + enum-name = "I2C_PORT_USB_C1_TCPC"; + label = "TCPC1"; + }; + ppc0_2 { + i2c-port = <&i2c2_0>; + enum-name = "I2C_PORT_USB_C0_C2_PPC"; + label = "PPC0,2"; + }; + ppc1 { + i2c-port = <&i2c6_1>; + enum-name = "I2C_PORT_USB_C1_PPC"; + label = "PPC1"; + }; + retimer0_2 { + i2c-port = <&i2c3_0>; + enum-name = "I2C_PORT_USB_C0_C2_MUX"; + label = "RETIMER0,2"; + }; + battery { + i2c-port = <&i2c5_0>; + enum-name = "I2C_PORT_BATTERY"; + label = "BATTERY"; + }; + eeprom { + i2c-port = <&i2c7_0>; + enum-name = "I2C_PORT_EEPROM"; + label = "EEPROM"; + }; + charger { + i2c-port = <&i2c7_0>; + enum-name = "I2C_PORT_CHARGER"; + label = "EEPROM"; + }; + }; + + named-pwms { + compatible = "named-pwms"; + }; + + named-adc-channels { + compatible = "named-adc-channels"; + }; + + def-lvol-io-list { + compatible = "nuvoton,npcx-lvolctrl-def"; + }; +}; + +&uart1 { + status = "okay"; + current-speed = <115200>; + pinctrl-0 = <&altj_cr_sin1_sl2 &altj_cr_sout1_sl2>; +}; + +&i2c0_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c1_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; +}; + +&i2c2_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; +}; + +&i2c3_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST_PLUS>; +}; + +&i2c4_1 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c5_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_STANDARD>; +}; + +&i2c6_1 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&i2c7_0 { + status = "okay"; + clock-frequency = <I2C_BITRATE_FAST>; +}; + +&cros_kb_raw { + status = "okay"; + /* No KSO2 (it's inverted and implemented by GPIO) */ + pinctrl-0 = <&alt7_no_ksi0_sl + &alt7_no_ksi1_sl + &alt7_no_ksi2_sl + &alt7_no_ksi3_sl + &alt7_no_ksi4_sl + &alt7_no_ksi5_sl + &alt7_no_ksi6_sl + &alt7_no_ksi7_sl + &alt8_no_kso00_sl + &alt8_no_kso01_sl + &alt8_no_kso03_sl + &alt8_no_kso04_sl + &alt8_no_kso05_sl + &alt8_no_kso06_sl + &alt8_no_kso07_sl + &alt9_no_kso08_sl + &alt9_no_kso09_sl + &alt9_no_kso10_sl + &alt9_no_kso11_sl + &alt9_no_kso12_sl + &alt9_no_kso13_sl + &alt9_no_kso14_sl + >; +}; diff --git a/zephyr/boards/arm/npcx9/npcx9_defconfig b/zephyr/boards/arm/npcx9/npcx9_defconfig new file mode 100644 index 0000000000..d20fd87f3a --- /dev/null +++ b/zephyr/boards/arm/npcx9/npcx9_defconfig @@ -0,0 +1,33 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +# Zephyr Kernel Configuration +CONFIG_SOC_SERIES_NPCX9=y +CONFIG_SOC_NPCX9M3F=y + +# Platform Configuration +CONFIG_BOARD_NPCX9=y + +# Serial Drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Enable console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Pinmux Driver +CONFIG_PINMUX=y + +# GPIO Controller +CONFIG_GPIO=y + +# Clock configuration +CONFIG_CLOCK_CONTROL=y + +# WATCHDOG configuration +CONFIG_WATCHDOG=y + +CONFIG_BBRAM=y +CONFIG_BBRAM_NPCX=y diff --git a/zephyr/projects/guybrush/CMakeLists.txt b/zephyr/projects/guybrush/CMakeLists.txt new file mode 100644 index 0000000000..8bec336ebb --- /dev/null +++ b/zephyr/projects/guybrush/CMakeLists.txt @@ -0,0 +1,15 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +cmake_minimum_required(VERSION 3.13.1) + +find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE}) +project(guybrush) + +zephyr_library_include_directories(include) + +set(PLATFORM_EC_BASEBOARD "${PLATFORM_EC}/baseboard/guybrush" CACHE PATH + "Path to the platform/ec baseboard directory") +set(PLATFORM_EC_BOARD "${PLATFORM_EC}/board/guybrush" CACHE PATH + "Path to the platform/ec board directory") diff --git a/zephyr/projects/guybrush/gpio.dts b/zephyr/projects/guybrush/gpio.dts new file mode 100644 index 0000000000..9bec5c6d30 --- /dev/null +++ b/zephyr/projects/guybrush/gpio.dts @@ -0,0 +1,4 @@ +/ { + named-gpios { + }; +}; diff --git a/zephyr/projects/guybrush/include/gpio_map.h b/zephyr/projects/guybrush/include/gpio_map.h new file mode 100644 index 0000000000..8a9ab06286 --- /dev/null +++ b/zephyr/projects/guybrush/include/gpio_map.h @@ -0,0 +1,32 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __ZEPHYR_GPIO_MAP_H +#define __ZEPHYR_GPIO_MAP_H + +#include <devicetree.h> +#include <gpio_signal.h> + +#define GPIO_WP_L GPIO_UNIMPLEMENTED +#define GPIO_ENTERING_RW GPIO_UNIMPLEMENTED + +/* + * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items. + * + * Each GPIO_INT requires three parameters: + * gpio_signal - The enum gpio_signal for the interrupt gpio + * interrupt_flags - The interrupt-related flags (e.g. GPIO_INT_EDGE_BOTH) + * handler - The platform/ec interrupt handler. + * + * Ensure that this files includes all necessary headers to declare all + * referenced handler functions. + * + * For example, one could use the follow definition: + * #define EC_CROS_GPIO_INTERRUPTS \ + * GPIO_INT(NAMED_GPIO(h1_ec_pwr_btn_odl), GPIO_INT_EDGE_BOTH, button_print) + */ +#define EC_CROS_GPIO_INTERRUPTS + +#endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/projects/guybrush/prj.conf b/zephyr/projects/guybrush/prj.conf new file mode 100644 index 0000000000..85f93189b1 --- /dev/null +++ b/zephyr/projects/guybrush/prj.conf @@ -0,0 +1,30 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +CONFIG_CROS_EC=y +CONFIG_PLATFORM_EC=y +CONFIG_SHIMMED_TASKS=y + +CONFIG_PLATFORM_EC_VBOOT_EFS2=n + +# Power sequencing +CONFIG_AP=n + +# Power button +CONFIG_PLATFORM_EC_POWER_BUTTON=n +CONFIG_HAS_TASK_POWERBTN=n + +# External power +CONFIG_PLATFORM_EC_EXTPOWER_GPIO=n + +# Lid switch +CONFIG_PLATFORM_EC_LID_SWITCH=n + +CONFIG_PLATFORM_EC_KEYBOARD=n +CONFIG_CROS_KB_RAW_NPCX=n + +# This is not yet supported +CONFIG_PLATFORM_EC_ADC=n +CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=n +CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n diff --git a/zephyr/projects/guybrush/zmake.yaml b/zephyr/projects/guybrush/zmake.yaml new file mode 100644 index 0000000000..386ff315bf --- /dev/null +++ b/zephyr/projects/guybrush/zmake.yaml @@ -0,0 +1,13 @@ +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. + +board: npcx9 +dts-overlays: + - gpio.dts +supported-toolchains: + - coreboot-sdk + - zephyr +supported-zephyr-versions: + - v2.6 +output-type: npcx |