diff options
| author | Sam Hurst <shurst@google.com> | 2017-10-27 10:15:37 -0700 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-11-14 16:03:23 -0800 |
| commit | ee208a57b7db9075d6279e66360c6cc1b0f5114b (patch) | |
| tree | eccc876b5c78ca5771f772183931827488988868 | |
| parent | 6d4674fd0520ae6f1210b1a8b1cc654119344795 (diff) | |
| download | chrome-ec-ee208a57b7db9075d6279e66360c6cc1b0f5114b.tar.gz | |
PS8751 and PS8805 does not generate BIST Carrier Mode 2
On Nasher, sending TCPC_TX_BIST_MODE_2 to register 0x50 on the
PS8751 TCPC does not generate BIST Carrier Mode 2.
BUG=b:68337231
BRANCH=None
TEST=`make -j buildall`
Generated an eye diagram for Nasher on the GRL USB-PD test station
Signed-off-by: Sam Hurst <shurst@chromium.org>
Change-Id: Ia6e5df54a183c989a68d12be3a46896e3daea738
Reviewed-on: https://chromium-review.googlesource.com/741090
Commit-Ready: Sam Hurst <shurst@google.com>
Tested-by: Sam Hurst <shurst@google.com>
Reviewed-by: Vincent Palatin <vpalatin@chromium.org>
| -rw-r--r-- | driver/tcpm/ps8xxx.c | 32 | ||||
| -rw-r--r-- | driver/tcpm/ps8xxx.h | 16 |
2 files changed, 47 insertions, 1 deletions
diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c index bbabb854ab..09e4a404b9 100644 --- a/driver/tcpm/ps8xxx.c +++ b/driver/tcpm/ps8xxx.c @@ -92,6 +92,36 @@ int ps8xxx_tcpc_get_fw_version(int port, int *version) return tcpc_read(port, FW_VER_REG, version); } +static int ps8xxx_tcpc_bist_mode_2(int port) +{ + int rv; + + /* Generate BIST for 50ms. */ + rv = tcpc_write(port, + PS8XXX_REG_BIST_CONT_MODE_BYTE0, PS8751_BIST_COUNTER_BYTE0); + rv |= tcpc_write(port, + PS8XXX_REG_BIST_CONT_MODE_BYTE1, PS8751_BIST_COUNTER_BYTE1); + rv |= tcpc_write(port, + PS8XXX_REG_BIST_CONT_MODE_BYTE2, PS8751_BIST_COUNTER_BYTE2); + + /* Auto stop */ + rv |= tcpc_write(port, PS8XXX_REG_BIST_CONT_MODE_CTR, 0); + + /* Start BIST MODE 2 */ + rv |= tcpc_write(port, TCPC_REG_TRANSMIT, TCPC_TX_BIST_MODE_2); + + return rv; +} + +static int ps8xxx_tcpm_transmit(int port, enum tcpm_transmit_type type, + uint16_t header, const uint32_t *data) +{ + if (type == TCPC_TX_BIST_MODE_2) + return ps8xxx_tcpc_bist_mode_2(port); + else + return tcpci_tcpm_transmit(port, type, header, data); +} + static int ps8xxx_tcpm_release(int port) { int version; @@ -120,7 +150,7 @@ const struct tcpm_drv ps8xxx_tcpm_drv = { .set_msg_header = &tcpci_tcpm_set_msg_header, .set_rx_enable = &tcpci_tcpm_set_rx_enable, .get_message = &tcpci_tcpm_get_message, - .transmit = &tcpci_tcpm_transmit, + .transmit = &ps8xxx_tcpm_transmit, .tcpc_alert = &tcpci_tcpc_alert, #ifdef CONFIG_USB_PD_DISCHARGE_TCPC .tcpc_discharge_vbus = &tcpci_tcpc_discharge_vbus, diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h index 1035af8077..5789cb733c 100644 --- a/driver/tcpm/ps8xxx.h +++ b/driver/tcpm/ps8xxx.h @@ -8,7 +8,23 @@ #ifndef __CROS_EC_USB_PD_TCPM_PS8XXX_H #define __CROS_EC_USB_PD_TCPM_PS8XXX_H +#define PS8751_BIST_TIMER_FREQ 15000000 +#define PS8751_BIST_DELAY_MS 50 + +#define PS8751_BIST_COUNTER (PS8751_BIST_TIMER_FREQ / MSEC \ + * PS8751_BIST_DELAY_MS) + +#define PS8751_BIST_COUNTER_BYTE0 (PS8751_BIST_COUNTER & 0xff) +#define PS8751_BIST_COUNTER_BYTE1 ((PS8751_BIST_COUNTER >> 8) & 0xff) +#define PS8751_BIST_COUNTER_BYTE2 ((PS8751_BIST_COUNTER >> 16) & 0xff) + #define PS8XXX_VENDOR_ID 0x1DA0 +#define PS8XXX_REG_I2C_DEBUGGING_ENABLE 0xA0 +#define PS8XXX_REG_BIST_CONT_MODE_BYTE0 0xBC +#define PS8XXX_REG_BIST_CONT_MODE_BYTE1 0xBD +#define PS8XXX_REG_BIST_CONT_MODE_BYTE2 0xBE +#define PS8XXX_REG_BIST_CONT_MODE_CTR 0XBF +#define PS8XXX_REG_DET_CTRL0 0x08 #if defined(CONFIG_USB_PD_TCPM_PS8751) /* Vendor defined registers */ |