diff options
author | Ting Shen <phoenixshen@google.com> | 2021-09-13 17:44:22 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-09-14 07:37:22 +0000 |
commit | 3d1b834b57d4710a48d61c794a38b28be56a67ce (patch) | |
tree | be6806476760624ecf38d53ac83857c5eedce430 | |
parent | 8b8de17aa9f124072f891d71e7d1731454771ce1 (diff) | |
download | chrome-ec-3d1b834b57d4710a48d61c794a38b28be56a67ce.tar.gz |
rt1718s: refactor: move gpio control to driver module
This CL moves RT1718S gpio control from board file to common driver
codebase, and implements the set flag and get/set level functions.
Note that this CL does not fully implement IOEX interface because TCPC
has different init process than usual ioexpanders.
BUG=none
TEST=1) pass faft_pd
2) manually test pd source/sink/frs on port 1
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: If2a0bca2b13ad4748eea54b4c8004da7dc6fc6a5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3159643
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
-rw-r--r-- | baseboard/cherry/baseboard.c | 57 | ||||
-rw-r--r-- | driver/tcpm/rt1718s.c | 33 | ||||
-rw-r--r-- | driver/tcpm/rt1718s.h | 47 |
3 files changed, 92 insertions, 45 deletions
diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c index cf471ecd84..1195169bc9 100644 --- a/baseboard/cherry/baseboard.c +++ b/baseboard/cherry/baseboard.c @@ -388,32 +388,22 @@ const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { }, }; -/* TODO: implement IOEX interface */ int rt1718s_gpio_ctrl(enum rt1718s_gpio_state state) { const int port = 1; switch (state) { case RT1718S_GPIO_DISABLED: - /* gpio1 high, gpio2 low */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0xFF)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0x00)); + rt1718s_gpio_set_level(port, RT1718S_GPIO1, 1); + rt1718s_gpio_set_level(port, RT1718S_GPIO2, 0); break; case RT1718S_GPIO_ENABLE_SINK: - /* gpio1/2 low */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0x00)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0x00)); + rt1718s_gpio_set_level(port, RT1718S_GPIO1, 0); + rt1718s_gpio_set_level(port, RT1718S_GPIO2, 0); break; case RT1718S_GPIO_ENABLE_SOURCE: - /* gpio1/2 high */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0xFF)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_CTRL, - RT1718S_GPIOX_CTRL_GPIOX_O, 0xFF)); + rt1718s_gpio_set_level(port, RT1718S_GPIO1, 1); + rt1718s_gpio_set_level(port, RT1718S_GPIO2, 1); break; } @@ -423,18 +413,9 @@ int rt1718s_gpio_ctrl(enum rt1718s_gpio_state state) __override int board_rt1718s_init(int port) { /* set GPIO 1~3 as push pull, as output, output low. */ - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_CTRL, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | - RT1718S_GPIOX_CTRL_GPIOX_O, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_CTRL, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | - RT1718S_GPIOX_CTRL_GPIOX_O, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); - RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO3_CTRL, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE | - RT1718S_GPIOX_CTRL_GPIOX_O, - RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE)); + rt1718s_gpio_set_flags(port, RT1718S_GPIO1, GPIO_OUT_LOW); + rt1718s_gpio_set_flags(port, RT1718S_GPIO2, GPIO_OUT_LOW); + rt1718s_gpio_set_flags(port, RT1718S_GPIO3, GPIO_OUT_LOW); /* gpio 1/2 output high when receiving frx signal */ RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL, @@ -630,17 +611,15 @@ DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT - 1); __override int board_pd_set_frs_enable(int port, int enable) { - int value; - - if (port == 0) - return EC_SUCCESS; - - value = RT1718S_GPIOX_OD_N | RT1718S_GPIOX_OE; - if (enable) - value |= RT1718S_GPIOX_CTRL_GPIOX_O; - - /* Use write instead of update to save 1 i2c read in FRS path */ - return rt1718s_write8(port, RT1718S_GPIO3_CTRL, value); + if (port == 1) + /* + * Use set_flags (implemented by a single i2c write) instead + * of set_level (= i2c_update) to save one read operation in + * FRS path. + */ + rt1718s_gpio_set_flags(port, RT1718S_GPIO3, + enable ? GPIO_OUT_HIGH : GPIO_OUT_LOW); + return EC_SUCCESS; } __override int board_get_vbus_voltage(int port) diff --git a/driver/tcpm/rt1718s.c b/driver/tcpm/rt1718s.c index 9a2f6319c7..9d5a8895ad 100644 --- a/driver/tcpm/rt1718s.c +++ b/driver/tcpm/rt1718s.c @@ -487,6 +487,39 @@ out: return rv; } +void rt1718s_gpio_set_flags(int port, enum rt1718s_gpio signal, uint32_t flags) +{ + int val = 0; + + if (!(flags & GPIO_OPEN_DRAIN)) + val |= RT1718S_GPIO_CTRL_OD_N; + if (flags & GPIO_PULL_UP) + val |= RT1718S_GPIO_CTRL_PU; + if (flags & GPIO_PULL_DOWN) + val |= RT1718S_GPIO_CTRL_PD; + if (flags & GPIO_HIGH) + val |= RT1718S_GPIO_CTRL_O; + if (flags & GPIO_OUTPUT) + val |= RT1718S_GPIO_CTRL_OE; + + rt1718s_write8(port, RT1718S_GPIO_CTRL(signal), val); +} + +void rt1718s_gpio_set_level(int port, enum rt1718s_gpio signal, int value) +{ + rt1718s_update_bits8(port, RT1718S_GPIO_CTRL(signal), + RT1718S_GPIO_CTRL_O, + value ? 0xFF : 0); +} + +int rt1718s_gpio_get_level(int port, enum rt1718s_gpio signal) +{ + int val; + + rt1718s_read8(port, RT1718S_GPIO_CTRL(signal), &val); + return !!(val & RT1718S_GPIO_CTRL_I); +} + /* RT1718S is a TCPCI compatible port controller */ const struct tcpm_drv rt1718s_tcpm_drv = { .init = &rt1718s_init, diff --git a/driver/tcpm/rt1718s.h b/driver/tcpm/rt1718s.h index 3bc5696fd7..07c3ed3f82 100644 --- a/driver/tcpm/rt1718s.h +++ b/driver/tcpm/rt1718s.h @@ -103,12 +103,14 @@ #define RT1718S_VBUS_CTRL_EN 0xEC #define RT1718S_VBUS_CTRL_EN_GPIO2_VBUS_PATH_EN BIT(7) #define RT1718S_VBUS_CTRL_EN_GPIO1_VBUS_PATH_EN BIT(6) -#define RT1718S_GPIO1_CTRL 0xED -#define RT1718S_GPIO2_CTRL 0xEE -#define RT1718S_GPIO3_CTRL 0xEF -#define RT1718S_GPIOX_OD_N BIT(3) -#define RT1718S_GPIOX_OE BIT(2) -#define RT1718S_GPIOX_CTRL_GPIOX_O BIT(1) + +#define RT1718S_GPIO_CTRL(n) (0xED + (n)) +#define RT1718S_GPIO_CTRL_PU BIT(5) +#define RT1718S_GPIO_CTRL_PD BIT(4) +#define RT1718S_GPIO_CTRL_OD_N BIT(3) +#define RT1718S_GPIO_CTRL_OE BIT(2) +#define RT1718S_GPIO_CTRL_O BIT(1) +#define RT1718S_GPIO_CTRL_I BIT(0) #define RT1718S_UNLOCK_PW_2 0xF0 #define RT1718S_UNLOCK_PW_1 0xF1 @@ -207,4 +209,37 @@ enum rt1718s_adc_channel { int rt1718s_get_adc(int port, enum rt1718s_adc_channel channel, int *adc_val); +enum rt1718s_gpio { + RT1718S_GPIO1 = 0, + RT1718S_GPIO2, + RT1718S_GPIO3, +}; + +/** + * Set flags for GPIO + * + * @param port rt1718s I2C port + * @param signal gpio pin name in enum rt1718s_gpio + * @param flags GPIO_* flags defined in include/gpio.h + */ +void rt1718s_gpio_set_flags(int port, enum rt1718s_gpio signal, uint32_t flags); + +/** + * Set the value of a signal + * + * @param port rt1718s I2C port + * @param signal gpio pin name in enum rt1718s_gpio + * @param value New value for signal (0 = low, non-zero = high) + */ +void rt1718s_gpio_set_level(int port, enum rt1718s_gpio signal, int value); + +/** + * Get the current value of a signal. + * + * @param port rt1718s I2C port + * @param signal gpio pin name in enum rt1718s_gpio + * @return 0 if low, 1 if high. + */ +int rt1718s_gpio_get_level(int port, enum rt1718s_gpio signal); + #endif /* __CROS_EC_USB_PD_TCPM_MT6370_H */ |