npcx: flash: Refactor flash_get_status()

NPCX internal flash status register 1/2 always read the same time. This
CL merges flash_get_status1() flash_get_status2() into 1 function. This
improves the performance by eliminating duplicate
mutex/tri-state/function call operations.

BUG=none
BRANCH=none
TEST=Set status register & check it by 'flashchip' console command

Signed-off-by: Wealian Liao <whliao@nuvoton.corp-partner.google.com>
Change-Id: I0efe3d0c9461b5e9daae8e29115c511d5dbf90ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3247742
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Commit-Queue: caveh jalali <caveh@chromium.org>

1 files changed, 24 insertions, 50 deletions

diff --git a/chip/npcx/flash.c b/chip/npcx/flash.c
index 0d024ba8d7..768c2ced29 100644
--- a/chip/npcx/flash.c
+++ b/chip/npcx/flash.c
@@ -144,12 +144,13 @@ static void flash_set_address(uint32_t dest_addr)
 	NPCX_UMA_AB0 = addr[0];
 }
 
-static uint8_t flash_get_status1(void)
+static void flash_get_status(uint8_t *sr1, uint8_t *sr2)
 {
-	uint8_t ret;
-
-	if (all_protected)
-		return saved_sr1;
+	if (all_protected) {
+		*sr1 = saved_sr1;
+		*sr2 = saved_sr2;
+		return;
+	}
 
 	/* Lock physical flash operations */
 	crec_flash_lock_mapped_storage(1);
@@ -158,43 +159,18 @@ static uint8_t flash_get_status1(void)
 	TRISTATE_FLASH(0);
 	/* Read status register1 */
 	flash_execute_cmd(CMD_READ_STATUS_REG, MASK_CMD_RD_1BYTE);
-	/* Enable tri-state */
-	TRISTATE_FLASH(1);
-
-	ret = NPCX_UMA_DB0;
-
-	/* Unlock physical flash operations */
-	crec_flash_lock_mapped_storage(0);
-
-	return ret;
-}
-
-static uint8_t flash_get_status2(void)
-{
-	uint8_t ret;
-
-	if (all_protected)
-		return saved_sr2;
-
-	/* Lock physical flash operations */
-	crec_flash_lock_mapped_storage(1);
-
-	/* Disable tri-state */
-	TRISTATE_FLASH(0);
+	*sr1 = NPCX_UMA_DB0;
 	/* Read status register2 */
 	flash_execute_cmd(CMD_READ_STATUS_REG2, MASK_CMD_RD_1BYTE);
+	*sr2 = NPCX_UMA_DB0;
 	/* Enable tri-state */
 	TRISTATE_FLASH(1);
 
-	ret = NPCX_UMA_DB0;
-
 	/* Unlock physical flash operations */
 	crec_flash_lock_mapped_storage(0);
-
-	return ret;
 }
 
-static void flash_set_status(int reg1, int reg2)
+static void flash_set_status(uint8_t sr1, uint8_t sr2)
 {
 	/* Lock physical flash operations */
 	crec_flash_lock_mapped_storage(1);
@@ -204,8 +180,8 @@ static void flash_set_status(int reg1, int reg2)
 	/* Enable write */
 	flash_write_enable();
 
-	NPCX_UMA_DB0 = reg1;
-	NPCX_UMA_DB1 = reg2;
+	NPCX_UMA_DB0 = sr1;
+	NPCX_UMA_DB1 = sr2;
 
 	/* Write status register 1/2 */
 	flash_execute_cmd(CMD_WRITE_STATUS_REG, MASK_CMD_WR_2BYTE);
@@ -218,8 +194,9 @@ static void flash_set_status(int reg1, int reg2)
 
 static void flash_set_quad_enable(int enable)
 {
-	uint8_t sr1 = flash_get_status1();
-	uint8_t sr2 = flash_get_status2();
+	uint8_t sr1, sr2;
+
+	flash_get_status(&sr1, &sr2);
 
 	/* If QE is the same value, return directly. */
 	if (!!(sr2 & SPI_FLASH_SR2_QE) == enable)
@@ -302,8 +279,7 @@ static void flash_uma_lock(int enable)
 		 * Store SR1 / SR2 for later use since we're about to lock
 		 * out all access (including read access) to these regs.
 		 */
-		saved_sr1 = flash_get_status1();
-		saved_sr2 = flash_get_status2();
+		flash_get_status(&saved_sr1, &saved_sr2);
 	}
 
 	all_protected = enable;
@@ -378,14 +354,12 @@ static int flash_check_prot_reg(unsigned int offset, unsigned int bytes)
 #endif /* CONFIG_WP_ACTIVE_HIGH */
 #endif
 
-	sr1 = flash_get_status1();
-	sr2 = flash_get_status2();
-
 	/* Invalid value */
 	if (offset + bytes > CONFIG_FLASH_SIZE_BYTES)
 		return EC_ERROR_INVAL;
 
 	/* Compute current protect range */
+	flash_get_status(&sr1, &sr2);
 	rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len);
 	if (rv)
 		return rv;
@@ -402,14 +376,14 @@ static int flash_write_prot_reg(unsigned int offset, unsigned int bytes,
 				int hw_protect)
 {
 	int rv;
-	uint8_t sr1 = flash_get_status1();
-	uint8_t sr2 = flash_get_status2();
+	uint8_t sr1, sr2;
 
 	/* Invalid values */
 	if (offset + bytes > CONFIG_FLASH_SIZE_BYTES)
 		return EC_ERROR_INVAL;
 
 	/* Compute desired protect range */
+	flash_get_status(&sr1, &sr2);
 	rv = spi_flash_protect_to_reg(offset, bytes, &sr1, &sr2);
 	if (rv)
 		return rv;
@@ -626,8 +600,7 @@ int crec_flash_physical_get_protect(int bank)
 uint32_t crec_flash_physical_get_protect_flags(void)
 {
 	uint32_t flags = 0;
-	uint8_t sr1 = flash_get_status1();
-	uint8_t sr2 = flash_get_status2();
+	uint8_t sr1, sr2;
 	unsigned int start, len;
 	int rv;
 
@@ -643,6 +616,7 @@ uint32_t crec_flash_physical_get_protect_flags(void)
 	 * If the status register protects a range, but SRP0 is not set, or QE
 	 * is set, flags should indicate EC_FLASH_PROTECT_ERROR_INCONSISTENT.
 	 */
+	flash_get_status(&sr1, &sr2);
 	rv = spi_flash_reg_to_protect(sr1, sr2, &start, &len);
 	if (rv)
 		return EC_FLASH_PROTECT_ERROR_UNKNOWN;
@@ -780,8 +754,7 @@ static enum ec_status flash_command_spi_info(struct host_cmd_handler_args *args)
 	flash_get_jedec_id(r->jedec);
 	r->reserved0 = 0;
 	flash_get_mfr_dev_id(r->mfr_dev_id);
-	r->sr1 = flash_get_status1();
-	r->sr2 = flash_get_status2();
+	flash_get_status(&r->sr1, &r->sr2);
 
 	args->response_size = sizeof(*r);
 	return EC_RES_SUCCESS;
@@ -852,9 +825,10 @@ DECLARE_CONSOLE_COMMAND(flash_tristate, command_flash_tristate,
 static int command_flash_chip(int argc, char **argv)
 {
 	uint8_t jedec_id[3];
+	uint8_t sr1, sr2;
 
-	ccprintf("Status 1: 0x%02x, Status 2: 0x%02x\n", flash_get_status1(),
-			flash_get_status2());
+	flash_get_status(&sr1, &sr2);
+	ccprintf("Status 1: 0x%02x, Status 2: 0x%02x\n", sr1, sr2);
 
 	flash_get_jedec_id(jedec_id);
 	ccprintf("Manufacturer: 0x%02x, DID: 0x%02x%02x\n", jedec_id[0],