Trogdor: Initial board commit

This is an initial commit for Trogdor. Use Cheza as a baseline.

Make the change according to the schematic, e.g.
 * Reflect the GPIO change
 * Reflect the TCPC/PPC part change
 * Update the USB topology, e.g. no device mode support
 * Remove the detachable related code
 * Add keyboard support
 * Support keyboard backlight
 * Update the battery characteristic
 * Add initial support of muxing DP path
 * Support a single USB-A port
 * Change sensors from lid to base
 * Minor code style improvement

BRANCH=None
BUG=b:143616352
TEST=BOARD=trogdor make

Change-Id: Ia9bb0adfcb8d347e6335fd3ae1e565b0f9d1a025
Signed-off-by: Wai-Hong Tam <waihong@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1847204
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Alexandru M Stan <amstan@chromium.org>

11 files changed, 2530 insertions, 0 deletions

diff --git a/board/trogdor/battery.c b/board/trogdor/battery.c
new file mode 100644
index 0000000000..0548a6e6d0
--- /dev/null
+++ b/board/trogdor/battery.c
@@ -0,0 +1,45 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Battery pack vendor provided charging profile
+ */
+
+#include "battery.h"
+#include "battery_smart.h"
+
+/* Shutdown mode parameter to write to manufacturer access register */
+#define SB_SHIP_MODE_REG	SB_MANUFACTURER_ACCESS
+#define SB_SHUTDOWN_DATA	0x0010
+
+/* Battery info */
+static const struct battery_info info = {
+	.voltage_max = 8800,
+	.voltage_normal = 7700,
+	.voltage_min = 6000,
+	.precharge_current = 256, /* mA */
+	.start_charging_min_c = 0,
+	.start_charging_max_c = 50,
+	.charging_min_c = 0,
+	.charging_max_c = 60,
+	.discharging_min_c = -20,
+	.discharging_max_c = 75,
+};
+
+const struct battery_info *battery_get_info(void)
+{
+	return &info;
+}
+
+int board_cut_off_battery(void)
+{
+	int rv;
+
+	/* Ship mode command must be sent twice to take effect */
+	rv = sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA);
+
+	if (rv != EC_SUCCESS)
+		return rv;
+
+	return sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA);
+}
diff --git a/board/trogdor/board.c b/board/trogdor/board.c
new file mode 100644
index 0000000000..edbdf53740
--- /dev/null
+++ b/board/trogdor/board.c
@@ -0,0 +1,547 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Trogdor board-specific configuration */
+
+#include "adc_chip.h"
+#include "button.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "chipset.h"
+#include "extpower.h"
+#include "driver/accelgyro_bmi160.h"
+#include "driver/ppc/sn5s330.h"
+#include "driver/tcpm/ps8xxx.h"
+#include "driver/tcpm/tcpci.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "lid_switch.h"
+#include "pi3usb9281.h"
+#include "power.h"
+#include "power_button.h"
+#include "pwm.h"
+#include "pwm_chip.h"
+#include "system.h"
+#include "shi_chip.h"
+#include "switch.h"
+#include "task.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+/* Forward declaration */
+static void tcpc_alert_event(enum gpio_signal signal);
+static void vbus0_evt(enum gpio_signal signal);
+static void vbus1_evt(enum gpio_signal signal);
+static void usb0_evt(enum gpio_signal signal);
+static void usb1_evt(enum gpio_signal signal);
+static void ppc_interrupt(enum gpio_signal signal);
+
+#include "gpio_list.h"
+
+/* GPIO Interrupt Handlers */
+static void tcpc_alert_event(enum gpio_signal signal)
+{
+	int port = -1;
+
+	switch (signal) {
+	case GPIO_USB_C0_PD_INT_ODL:
+		port = 0;
+		break;
+	case GPIO_USB_C1_PD_INT_ODL:
+		port = 1;
+		break;
+	default:
+		return;
+	}
+
+	schedule_deferred_pd_interrupt(port);
+}
+
+static void vbus0_evt(enum gpio_signal signal)
+{
+	/* VBUS present GPIO is inverted */
+	usb_charger_vbus_change(0, !gpio_get_level(GPIO_USB_C0_VBUS_DET_L));
+	task_wake(TASK_ID_PD_C0);
+}
+
+static void vbus1_evt(enum gpio_signal signal)
+{
+	/* VBUS present GPIO is inverted */
+	usb_charger_vbus_change(1, !gpio_get_level(GPIO_USB_C1_VBUS_DET_L));
+	task_wake(TASK_ID_PD_C1);
+}
+
+static void usb0_evt(enum gpio_signal signal)
+{
+	task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0);
+}
+
+static void usb1_evt(enum gpio_signal signal)
+{
+	task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0);
+}
+
+static void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_SWCTL_INT_ODL:
+		sn5s330_interrupt(0);
+		break;
+	case GPIO_USB_C1_SWCTL_INT_ODL:
+		sn5s330_interrupt(1);
+		break;
+	default:
+		break;
+	}
+}
+
+/* Wake-up pins for hibernate */
+const enum gpio_signal hibernate_wake_pins[] = {
+	GPIO_LID_OPEN,
+	GPIO_AC_PRESENT,
+	GPIO_POWER_BUTTON_L,
+	GPIO_EC_RST_ODL,
+};
+const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins);
+
+/* ADC channels */
+const struct adc_t adc_channels[] = {
+	/* Measure VBUS through a 1/10 voltage divider */
+	[ADC_VBUS] = {
+		"VBUS",
+		NPCX_ADC_CH1,
+		ADC_MAX_VOLT * 10,
+		ADC_READ_MAX + 1,
+		0
+	},
+	/*
+	 * Adapter current output or battery charging/discharging current (uV)
+	 * 18x amplification on charger side.
+	 */
+	[ADC_AMON_BMON] = {
+		"AMON_BMON",
+		NPCX_ADC_CH2,
+		ADC_MAX_VOLT * 1000 / 18,
+		ADC_READ_MAX + 1,
+		0
+	},
+	/*
+	 * ISL9238 PSYS output is 1.44 uA/W over 5.6K resistor, to read
+	 * 0.8V @ 99 W, i.e. 124000 uW/mV. Using ADC_MAX_VOLT*124000 and
+	 * ADC_READ_MAX+1 as multiplier/divider leads to overflows, so we
+	 * only divide by 2 (enough to avoid precision issues).
+	 */
+	[ADC_PSYS] = {
+		"PSYS",
+		NPCX_ADC_CH3,
+		ADC_MAX_VOLT * 124000 * 2 / (ADC_READ_MAX + 1),
+		2,
+		0
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT);
+
+const struct pwm_t pwm_channels[] = {
+	[PWM_CH_KBLIGHT] = { .channel = 3, .flags = 0, .freq = 10000 },
+	/* TODO(waihong): Assign a proper frequency. */
+	[PWM_CH_DISPLIGHT] = { .channel = 5, .flags = 0, .freq = 4800 },
+};
+BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT);
+
+
+/* Power signal list. Must match order of enum power_signal. */
+const struct power_signal_info power_signal_list[] = {
+	[SC7180_AP_RST_ASSERTED] = {
+		GPIO_AP_RST_L,
+		POWER_SIGNAL_ACTIVE_LOW | POWER_SIGNAL_DISABLE_AT_BOOT,
+		"AP_RST_ASSERTED"},
+	[SC7180_PS_HOLD] = {
+		GPIO_PS_HOLD,
+		POWER_SIGNAL_ACTIVE_HIGH,
+		"PS_HOLD"},
+	[SC7180_PMIC_FAULT_L] = {
+		GPIO_PMIC_FAULT_L,
+		POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
+		"PMIC_FAULT_L"},
+	[SC7180_POWER_GOOD] = {
+		GPIO_POWER_GOOD,
+		POWER_SIGNAL_ACTIVE_HIGH,
+		"POWER_GOOD"},
+	[SC7180_WARM_RESET] = {
+		GPIO_WARM_RESET_L,
+		POWER_SIGNAL_ACTIVE_HIGH,
+		"WARM_RESET_L"},
+};
+BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
+
+/* I2C port map */
+const struct i2c_port_t i2c_ports[] = {
+	{"power",   I2C_PORT_POWER,  100, GPIO_EC_I2C_POWER_SCL,
+					  GPIO_EC_I2C_POWER_SDA},
+	{"tcpc0",   I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL,
+					  GPIO_EC_I2C_USB_C0_PD_SDA},
+	{"tcpc1",   I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL,
+					  GPIO_EC_I2C_USB_C1_PD_SDA},
+	{"eeprom",  I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL,
+					  GPIO_EC_I2C_EEPROM_SDA},
+	{"sensor",  I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL,
+					  GPIO_EC_I2C_SENSOR_SDA},
+};
+
+const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports);
+
+/* Power Path Controller */
+struct ppc_config_t ppc_chips[] = {
+	{
+		.i2c_port = I2C_PORT_TCPC0,
+		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+		.drv = &sn5s330_drv
+	},
+	{
+		.i2c_port = I2C_PORT_TCPC1,
+		.i2c_addr_flags = SN5S330_ADDR0_FLAGS,
+		.drv = &sn5s330_drv
+	},
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+/* TCPC mux configuration */
+const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC0,
+			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
+		},
+		.drv = &ps8xxx_tcpm_drv,
+	},
+	{
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_TCPC1,
+			.addr_flags = PS8751_I2C_ADDR1_FLAGS,
+		},
+		.drv = &ps8xxx_tcpm_drv,
+	},
+};
+
+/*
+ * Port-0/1 USB mux driver.
+ *
+ * The USB mux is handled by TCPC chip and the HPD is handled by AP.
+ * Redirect to tcpci_tcpm_usb_mux_driver but override the get() function
+ * to check the HPD_IRQ mask from virtual_usb_mux_driver.
+ *
+ * Both port 0 and 1 use the same TCPC part.
+ */
+
+static int port_usb_mux_init(int port)
+{
+	return tcpci_tcpm_usb_mux_driver.init(port);
+}
+
+static int port_usb_mux_set(int i2c_addr, mux_state_t mux_state)
+{
+	return tcpci_tcpm_usb_mux_driver.set(i2c_addr, mux_state);
+}
+
+static int port_usb_mux_get(int port, mux_state_t *mux_state)
+{
+	int rv;
+	mux_state_t virtual_mux_state;
+
+	rv = tcpci_tcpm_usb_mux_driver.get(port, mux_state);
+	rv |= virtual_usb_mux_driver.get(port, &virtual_mux_state);
+
+	if (virtual_mux_state & USB_PD_MUX_HPD_IRQ)
+		*mux_state |= USB_PD_MUX_HPD_IRQ;
+	return rv;
+}
+
+static int port_usb_mux_enter_low_power(int port)
+{
+	return tcpci_tcpm_usb_mux_driver.enter_low_power_mode(port);
+}
+
+const struct usb_mux_driver port_usb_mux_driver = {
+	.init = &port_usb_mux_init,
+	.set = &port_usb_mux_set,
+	.get = &port_usb_mux_get,
+	.enter_low_power_mode = &port_usb_mux_enter_low_power,
+};
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	{
+		.driver = &port_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+	},
+	{
+		.driver = &port_usb_mux_driver,
+		.hpd_update = &virtual_hpd_update,
+	}
+};
+
+const int usb_port_enable[USB_PORT_COUNT] = {
+	GPIO_EN_USB_A_5V,
+};
+
+/* BC1.2 */
+struct pi3usb9281_config pi3usb9281_chips[] = {
+	{
+		.i2c_port = I2C_PORT_POWER,
+	},
+	{
+		.i2c_port = I2C_PORT_EEPROM,
+	},
+};
+BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) ==
+	     CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT);
+
+/* Initialize board. */
+static void board_init(void)
+{
+	/* Enable BC1.2 VBUS detection */
+	gpio_enable_interrupt(GPIO_USB_C0_VBUS_DET_L);
+	gpio_enable_interrupt(GPIO_USB_C1_VBUS_DET_L);
+
+	/* Enable BC1.2 interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L);
+	gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L);
+
+	/* Enable interrupt for BMI160 sensor */
+	gpio_enable_interrupt(GPIO_ACCEL_GYRO_INT_L);
+}
+DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
+
+void board_tcpc_init(void)
+{
+	int port;
+
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_to_this_image()) {
+		/* TODO(crosbug.com/p/61098): How long do we need to wait? */
+		board_reset_pd_mcu();
+	}
+
+	/* Enable PPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_SWCTL_INT_ODL);
+
+	/* Enable TCPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL);
+	gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL);
+
+	/*
+	 * Initialize HPD to low; after sysjump SOC needs to see
+	 * HPD pulse to enable video path
+	 */
+	for (port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; port++) {
+		const struct usb_mux *mux = &usb_muxes[port];
+
+		mux->hpd_update(port, 0, 0);
+	}
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1);
+
+/* Called on AP S0 -> S3 transition */
+static void board_chipset_suspend(void)
+{
+	/*
+	 * Turn off display backlight in S3. AP has its own control. The EC's
+	 * and the AP's will be AND'ed together in hardware.
+	 */
+	gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0);
+	pwm_enable(PWM_CH_DISPLIGHT, 0);
+
+	/* Disable the keyboard backlight */
+	pwm_enable(PWM_CH_KBLIGHT, 0);
+}
+DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT);
+
+/* Called on AP S3 -> S0 transition */
+static void board_chipset_resume(void)
+{
+	/* Turn on display and keyboard backlight in S0. */
+	gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1);
+	pwm_enable(PWM_CH_DISPLIGHT, 1);
+	pwm_enable(PWM_CH_KBLIGHT, 1);
+}
+DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT);
+
+void board_reset_pd_mcu(void)
+{
+	/* Assert reset */
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 0);
+	gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 0);
+	msleep(PS8XXX_RESET_DELAY_MS);
+	gpio_set_level(GPIO_USB_C0_PD_RST_L, 1);
+	gpio_set_level(GPIO_USB_C1_PD_RST_ODL, 1);
+}
+
+int board_vbus_sink_enable(int port, int enable)
+{
+	/* Both ports are controlled by PPC SN5S330 */
+	return ppc_vbus_sink_enable(port, enable);
+}
+
+int board_is_sourcing_vbus(int port)
+{
+	/* Both ports are controlled by PPC SN5S330 */
+	return ppc_is_sourcing_vbus(port);
+}
+
+void board_overcurrent_event(int port, int is_overcurrented)
+{
+	/* TODO(b/120231371): Notify AP */
+	CPRINTS("p%d: overcurrent!", port);
+}
+
+int board_set_active_charge_port(int port)
+{
+	int is_real_port = (port >= 0 &&
+			    port < CONFIG_USB_PD_PORT_MAX_COUNT);
+	int i;
+	int rv;
+
+	if (!is_real_port && port != CHARGE_PORT_NONE)
+		return EC_ERROR_INVAL;
+
+	CPRINTS("New chg p%d", port);
+
+	if (port == CHARGE_PORT_NONE) {
+		/* Disable all ports. */
+		for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+			rv = board_vbus_sink_enable(i, 0);
+			if (rv) {
+				CPRINTS("Disabling p%d sink path failed.", i);
+				return rv;
+			}
+		}
+
+		return EC_SUCCESS;
+	}
+
+	/* Check if the port is sourcing VBUS. */
+	if (board_is_sourcing_vbus(port)) {
+		CPRINTF("Skip enable p%d", port);
+		return EC_ERROR_INVAL;
+	}
+
+	/*
+	 * Turn off the other ports' sink path FETs, before enabling the
+	 * requested charge port.
+	 */
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) {
+		if (i == port)
+			continue;
+
+		if (board_vbus_sink_enable(i, 0))
+			CPRINTS("p%d: sink path disable failed.", i);
+	}
+
+	/* Enable requested charge port. */
+	if (board_vbus_sink_enable(port, 1)) {
+		CPRINTS("p%d: sink path enable failed.", port);
+		return EC_ERROR_UNKNOWN;
+	}
+
+	return EC_SUCCESS;
+}
+
+void board_set_charge_limit(int port, int supplier, int charge_ma,
+			    int max_ma, int charge_mv)
+{
+	/*
+	 * Ignore lower charge ceiling on PD transition if our battery is
+	 * critical, as we may brownout.
+	 */
+	if (supplier == CHARGE_SUPPLIER_PD &&
+	    charge_ma < 1500 &&
+	    charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) {
+		CPRINTS("Using max ilim %d", max_ma);
+		charge_ma = max_ma;
+	}
+
+	charge_set_input_current_limit(MAX(charge_ma,
+					   CONFIG_CHARGER_INPUT_CURRENT),
+				       charge_mv);
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL))
+		if (gpio_get_level(GPIO_USB_C0_PD_RST_L))
+			status |= PD_STATUS_TCPC_ALERT_0;
+	if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL))
+		if (gpio_get_level(GPIO_USB_C1_PD_RST_ODL))
+			status |= PD_STATUS_TCPC_ALERT_1;
+
+	return status;
+}
+
+/* Mutexes */
+static struct mutex g_base_mutex;
+
+static struct bmi160_drv_data_t g_bmi160_data;
+
+/* Matrix to rotate accelerometer into standard reference frame */
+const mat33_fp_t base_standard_ref = {
+	{ FLOAT_TO_FP(-1), 0,  0},
+	{ 0,  FLOAT_TO_FP(-1),  0},
+	{ 0,  0, FLOAT_TO_FP(1)}
+};
+
+struct motion_sensor_t motion_sensors[] = {
+	/*
+	 * Note: bmi160: supports accelerometer and gyro sensor
+	 * Requirement: accelerometer sensor must init before gyro sensor
+	 * DO NOT change the order of the following table.
+	 */
+	[BASE_ACCEL] = {
+	 .name = "Base Accel",
+	 .active_mask = SENSOR_ACTIVE_S0_S3_S5,
+	 .chip = MOTIONSENSE_CHIP_BMI160,
+	 .type = MOTIONSENSE_TYPE_ACCEL,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &bmi160_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = &g_bmi160_data,
+	 .port = I2C_PORT_SENSOR,
+	 .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
+	 .rot_standard_ref = &base_standard_ref,
+	 .default_range = 4,  /* g */
+	 .min_frequency = BMI160_ACCEL_MIN_FREQ,
+	 .max_frequency = BMI160_ACCEL_MAX_FREQ,
+	 .config = {
+		 [SENSOR_CONFIG_EC_S0] = {
+			 .odr = 10000 | ROUND_UP_FLAG,
+		 },
+	 },
+	},
+	[BASE_GYRO] = {
+	 .name = "Gyro",
+	 .active_mask = SENSOR_ACTIVE_S0_S3_S5,
+	 .chip = MOTIONSENSE_CHIP_BMI160,
+	 .type = MOTIONSENSE_TYPE_GYRO,
+	 .location = MOTIONSENSE_LOC_LID,
+	 .drv = &bmi160_drv,
+	 .mutex = &g_base_mutex,
+	 .drv_data = &g_bmi160_data,
+	 .port = I2C_PORT_SENSOR,
+	 .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS,
+	 .default_range = 1000, /* dps */
+	 .rot_standard_ref = &base_standard_ref,
+	 .min_frequency = BMI160_GYRO_MIN_FREQ,
+	 .max_frequency = BMI160_GYRO_MAX_FREQ,
+	},
+};
+const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors);
diff --git a/board/trogdor/board.h b/board/trogdor/board.h
new file mode 100644
index 0000000000..e848c11811
--- /dev/null
+++ b/board/trogdor/board.h
@@ -0,0 +1,237 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Trogdor board configuration */
+
+#ifndef __CROS_EC_BOARD_H
+#define __CROS_EC_BOARD_H
+
+/* TODO(waihong): Remove the following bringup features */
+#define CONFIG_BRINGUP
+#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands. */
+#define CONFIG_USB_PD_DEBUG_LEVEL 3
+#define CONFIG_CMD_AP_RESET_LOG
+#define CONFIG_HOSTCMD_AP_RESET
+
+/*
+ * By default, enable all console messages excepted event and HC:
+ * The sensor stack is generating a lot of activity.
+ * They can be enabled through the console command 'chan'.
+ */
+#define CC_DEFAULT     (CC_ALL & ~(CC_MASK(CC_EVENTS) | CC_MASK(CC_HOSTCMD)))
+
+/* NPCX7 config */
+#define NPCX_UART_MODULE2 1  /* GPIO64/65 are used as UART pins. */
+#define NPCX_TACH_SEL2    0  /* No tach. */
+#define NPCX7_PWM1_SEL    0  /* GPIO C2 is not used as PWM1. */
+
+/* Internal SPI flash on NPCX7 */
+#define CONFIG_FLASH_SIZE (1024 * 1024)  /* 1MB internal spi flash */
+#define CONFIG_SPI_FLASH_REGS
+#define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */
+#define CONFIG_HOSTCMD_FLASH_SPI_INFO
+
+/* EC Modules */
+#define CONFIG_I2C
+#define CONFIG_I2C_MASTER
+#define CONFIG_LED_COMMON
+#define CONFIG_LOW_POWER_IDLE
+#define CONFIG_ADC
+#define CONFIG_BACKLIGHT_LID
+#define CONFIG_FPU
+#define CONFIG_PWM
+#define CONFIG_PWM_DISPLIGHT
+#define CONFIG_PWM_KBLIGHT
+
+#define CONFIG_VBOOT_HASH
+
+#undef CONFIG_PECI
+
+#define CONFIG_HOSTCMD_SPS
+#define CONFIG_HOST_COMMAND_STATUS
+#define CONFIG_HOSTCMD_SECTION_SORTED
+#define CONFIG_MKBP_EVENT
+#define CONFIG_KEYBOARD_PROTOCOL_MKBP
+#define CONFIG_KEYBOARD_COL2_INVERTED
+#define CONFIG_MKBP_USE_GPIO
+
+#define CONFIG_BOARD_VERSION_GPIO
+#define CONFIG_POWER_BUTTON
+#define CONFIG_VOLUME_BUTTONS
+#define CONFIG_EMULATED_SYSRQ
+#define CONFIG_CMD_BUTTON
+#define CONFIG_SWITCH
+#define CONFIG_LID_SWITCH
+#define CONFIG_EXTPOWER_GPIO
+
+/* Battery */
+#define CONFIG_BATTERY_CUT_OFF
+#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BATT_PRES_ODL
+#define CONFIG_BATTERY_SMART
+
+/* Charger */
+#define CONFIG_CHARGER
+#define CONFIG_CHARGE_MANAGER
+#define CONFIG_CHARGER_ISL9238
+#define CONFIG_CHARGE_RAMP_HW
+#define CONFIG_USB_CHARGER
+#define CONFIG_CMD_CHARGER_ADC_AMON_BMON
+#define CONFIG_CHARGER_PSYS
+#define CONFIG_CHARGER_PSYS_READ
+#define CONFIG_CHARGER_DISCHARGE_ON_AC
+
+#define CONFIG_CHARGER_INPUT_CURRENT 512
+#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 2
+#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 7500
+#define CONFIG_CHARGER_SENSE_RESISTOR 10
+#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20
+
+/* BC 1.2 Charger */
+#define CONFIG_BC12_DETECT_PI3USB9281
+#define CONFIG_BC12_DETECT_PI3USB9281_CHIP_COUNT 2
+
+/* USB */
+#define CONFIG_USB_POWER_DELIVERY
+#define CONFIG_CMD_PD_CONTROL
+#define CONFIG_USB_PD_ALT_MODE
+#define CONFIG_USB_PD_ALT_MODE_DFP
+#define CONFIG_USB_PD_DISCHARGE_PPC
+#define CONFIG_USB_PD_DUAL_ROLE
+#define CONFIG_USB_PD_DUAL_ROLE_AUTO_TOGGLE
+#define CONFIG_USB_PD_LOGGING
+#define CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT TYPEC_RP_3A0
+#define CONFIG_USB_PD_PORT_MAX_COUNT 2
+#define CONFIG_USB_PD_TCPC_LOW_POWER
+#define CONFIG_USB_PD_TCPM_PS8805
+#define CONFIG_USB_PD_TCPM_MUX
+#define CONFIG_USB_PD_TCPM_TCPCI
+#define CONFIG_USB_PD_TRY_SRC
+#define CONFIG_USB_PD_VBUS_DETECT_CHARGER
+#define CONFIG_USB_PD_5V_EN_CUSTOM
+#define CONFIG_USB_MUX_VIRTUAL
+#define CONFIG_USBC_PPC_SN5S330
+#define CONFIG_USBC_SS_MUX
+#define CONFIG_USBC_VCONN
+#define CONFIG_USBC_VCONN_SWAP
+
+/* USB-A */
+#define USB_PORT_COUNT 1
+#define CONFIG_USB_PORT_POWER_DUMB
+
+/* RTC */
+#define CONFIG_CMD_RTC
+#define CONFIG_HOSTCMD_RTC
+
+/* Sensors */
+#define CONFIG_ACCELGYRO_BMI160
+#define CONFIG_ACCEL_INTERRUPTS
+#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \
+	TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL)
+/* Enable sensor fifo, must also define the _SIZE and _THRES */
+#define CONFIG_ACCEL_FIFO
+/* FIFO size is a power of 2. */
+#define CONFIG_ACCEL_FIFO_SIZE 256
+/* Depends on how fast the AP boots and typical ODRs. */
+#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3)
+#define CONFIG_CMD_ACCELS
+#define CONFIG_CMD_ACCEL_INFO
+#define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS
+
+/* PD */
+#define PD_POWER_SUPPLY_TURN_ON_DELAY   30000  /* us */
+#define PD_POWER_SUPPLY_TURN_OFF_DELAY  250000 /* us */
+#define PD_VCONN_SWAP_DELAY             5000 /* us */
+
+#define PD_OPERATING_POWER_MW   15000
+#define PD_MAX_POWER_MW         ((PD_MAX_VOLTAGE_MV * PD_MAX_CURRENT_MA) / 1000)
+#define PD_MAX_CURRENT_MA       3000
+#define PD_MAX_VOLTAGE_MV       20000
+
+/* Chipset */
+#define CONFIG_CHIPSET_SC7180
+#define CONFIG_CHIPSET_RESET_HOOK
+#define CONFIG_POWER_COMMON
+#define CONFIG_POWER_PP5000_CONTROL
+
+/* NPCX Features */
+#define CONFIG_HIBERNATE_PSL
+
+/*
+ * Macros for GPIO signals used in common code that don't match the
+ * schematic names. Signal names in gpio.inc match the schematic and are
+ * then redefined here to so it's more clear which signal is being used for
+ * which purpose.
+ */
+#define GPIO_AC_PRESENT		GPIO_ACOK_OD
+#define GPIO_POWER_BUTTON_L	GPIO_EC_PWR_BTN_ODL
+#define GPIO_VOLUME_DOWN_L	GPIO_EC_VOLDN_BTN_ODL
+#define GPIO_VOLUME_UP_L	GPIO_EC_VOLUP_BTN_ODL
+#define GPIO_WP_L		GPIO_EC_WP_ODL
+#define GPIO_LID_OPEN		GPIO_LID_OPEN_EC
+#define GPIO_SHI_CS_L		GPIO_AP_EC_SPI_CS_L
+#define GPIO_ENTERING_RW	GPIO_EC_ENTERING_RW
+#define GPIO_BATT_PRES_ODL	GPIO_EC_BATT_PRES_ODL
+#define GPIO_EN_PP5000		GPIO_EN_PP5000_A
+#define GPIO_ENABLE_BACKLIGHT	GPIO_EC_BL_DISABLE_L
+#define GPIO_BOARD_VERSION1	GPIO_BRD_ID0
+#define GPIO_BOARD_VERSION2	GPIO_BRD_ID1
+#define GPIO_BOARD_VERSION3	GPIO_BRD_ID2
+#define GPIO_KBD_KSO2           GPIO_EC_KSO_02_INV
+
+/* I2C Ports */
+#define I2C_PORT_BATTERY I2C_PORT_POWER
+#define I2C_PORT_CHARGER I2C_PORT_POWER
+#define I2C_PORT_ACCEL   I2C_PORT_SENSOR
+#define I2C_PORT_POWER   NPCX_I2C_PORT0_0
+#define I2C_PORT_TCPC0   NPCX_I2C_PORT1_0
+#define I2C_PORT_TCPC1   NPCX_I2C_PORT2_0
+#define I2C_PORT_EEPROM  NPCX_I2C_PORT5_0
+#define I2C_PORT_SENSOR  NPCX_I2C_PORT7_0
+
+#ifndef __ASSEMBLER__
+
+#include "gpio_signal.h"
+#include "registers.h"
+
+enum power_signal {
+	SC7180_AP_RST_ASSERTED = 0,
+	SC7180_PS_HOLD,
+	SC7180_PMIC_FAULT_L,
+	SC7180_POWER_GOOD,
+	SC7180_WARM_RESET,
+	/* Number of power signals */
+	POWER_SIGNAL_COUNT
+};
+
+enum adc_channel {
+	ADC_VBUS,
+	ADC_AMON_BMON,
+	ADC_PSYS,
+	ADC_CH_COUNT
+};
+
+/* Motion sensors */
+enum sensor_id {
+	BASE_ACCEL = 0,
+	BASE_GYRO,
+	SENSOR_COUNT,
+};
+
+enum pwm_channel {
+	PWM_CH_KBLIGHT = 0,
+	PWM_CH_DISPLIGHT,
+	PWM_CH_COUNT
+};
+
+/* Custom function to indicate if sourcing VBUS */
+int board_is_sourcing_vbus(int port);
+/* Enable VBUS sink for a given port */
+int board_vbus_sink_enable(int port, int enable);
+/* Reset all TCPCs. */
+void board_reset_pd_mcu(void);
+
+#endif /* !defined(__ASSEMBLER__) */
+
+#endif /* __CROS_EC_BOARD_H */
diff --git a/board/trogdor/build.mk b/board/trogdor/build.mk
new file mode 100644
index 0000000000..634ba08c67
--- /dev/null
+++ b/board/trogdor/build.mk
@@ -0,0 +1,13 @@
+# -*- makefile -*-
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+#
+# Board specific files build
+#
+
+CHIP:=npcx
+CHIP_FAMILY:=npcx7
+CHIP_VARIANT:=npcx7m7wb
+
+board-y=battery.o board.o led.o usb_pd_policy.o
diff --git a/board/trogdor/ec.tasklist b/board/trogdor/ec.tasklist
new file mode 100644
index 0000000000..7861acd7e6
--- /dev/null
+++ b/board/trogdor/ec.tasklist
@@ -0,0 +1,24 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * See CONFIG_TASK_LIST in config.h for details.
+ */
+
+#define CONFIG_TASK_LIST \
+	TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \
+	TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \
+	TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(HOSTCMD, host_command_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, TASK_STACK_SIZE) \
+	TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, TASK_STACK_SIZE)
diff --git a/board/trogdor/gpio.inc b/board/trogdor/gpio.inc
new file mode 100644
index 0000000000..c12b7be6e9
--- /dev/null
+++ b/board/trogdor/gpio.inc
@@ -0,0 +1,169 @@
+/* -*- mode:c -*-
+ *
+ * Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Declare symbolic names for all the GPIOs that we care about.
+ * Note: Those with interrupt handlers must be declared first. */
+
+/* USB-C interrupts */
+GPIO_INT(USB_C0_PD_INT_ODL,    PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event)  /* Interrupt from port-0 TCPC */
+GPIO_INT(USB_C1_PD_INT_ODL,    PIN(F, 5), GPIO_INT_FALLING, tcpc_alert_event)  /* Interrupt from port-1 TCPC */
+GPIO_INT(USB_C0_SWCTL_INT_ODL, PIN(0, 3), GPIO_INT_FALLING, ppc_interrupt)  /* Interrupt from port-0 PPC */
+GPIO_INT(USB_C1_SWCTL_INT_ODL, PIN(4, 0), GPIO_INT_FALLING, ppc_interrupt)  /* Interrupt from port-1 PPC */
+GPIO_INT(USB_C0_BC12_INT_L,    PIN(6, 1), GPIO_INT_FALLING, usb0_evt)  /* Interrupt from port-0 BC1.2 */
+GPIO_INT(USB_C1_BC12_INT_L,    PIN(8, 2), GPIO_INT_FALLING, usb1_evt)  /* Interrupt from port-1 BC1.2 */
+GPIO_INT(USB_C0_VBUS_DET_L,    PIN(6, 2), GPIO_INT_BOTH | GPIO_PULL_UP, vbus0_evt)  /* BC1.2 VBUS detection on port-0 */
+GPIO_INT(USB_C1_VBUS_DET_L,    PIN(8, 3), GPIO_INT_BOTH | GPIO_PULL_UP, vbus1_evt)  /* BC1.2 VBUS detection on port-1 */
+
+/* System interrupts */
+GPIO_INT(ACOK_OD,           PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)  /* AC OK? */
+GPIO_INT(EC_PWR_BTN_ODL,    PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt)  /* Power button */
+GPIO_INT(EC_VOLDN_BTN_ODL,  PIN(7, 0), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)  /* Volume Up button */
+GPIO_INT(EC_VOLUP_BTN_ODL,  PIN(F, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt)  /* Volume Down button */
+GPIO_INT(EC_WP_ODL,         PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)  /* Write protection */
+GPIO_INT(LID_OPEN_EC,       PIN(D, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, lid_interrupt)  /* Lid open? */
+GPIO_INT(AP_RST_REQ,        PIN(C, 2), GPIO_INT_RISING | GPIO_PULL_DOWN | GPIO_SEL_1P8V, chipset_reset_request_interrupt)  /* Reset request from AP */
+GPIO_INT(AP_RST_L,          PIN(C, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt)  /* PMIC to signal AP reset */
+GPIO_INT(PS_HOLD,           PIN(A, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt)  /* Indicate when AP triggers reset/shutdown */
+GPIO_INT(PMIC_FAULT_L,      PIN(A, 3), GPIO_INT_BOTH | GPIO_SEL_1P8V, power_signal_interrupt)  /* Any PMIC fault? */
+/*
+ * When switch-cap is off, the POWER_GOOD signal is floating. Need a pull-down
+ * to make it low. Overload the interrupt function chipset_warm_reset_interrupt
+ * for not only signalling power_signal_interrupt but also handling the logic
+ * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD.
+ */
+GPIO_INT(POWER_GOOD,        PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_warm_reset_interrupt)  /* SRC_PP1800_S10A from PMIC */
+GPIO_INT(WARM_RESET_L,      PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt)  /* AP warm reset */
+GPIO_INT(AP_EC_SPI_CS_L,    PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN, shi_cs_event)  /* EC SPI Chip Select */
+
+/* Sensor interrupts */
+GPIO_INT(ACCEL_GYRO_INT_L,  PIN(A, 0), GPIO_INT_FALLING | GPIO_SEL_1P8V, bmi160_interrupt)  /* Accelerometer/gyro interrupt */
+
+/*
+ * EC_RST_ODL acts as a wake source from PSL hibernate mode. However, it does
+ * not need to be an interrupt for normal EC operations. Thus, configure it as
+ * GPIO_INT_BOTH with wake on low-to-high edge using GPIO_HIB_WAKE_HIGH so that
+ * PSL common code can configure PSL_IN correctly.
+ *
+ * Use the rising edge to wake EC up. If we chose the falling edge, it would
+ * still wake EC up, but EC is in an intermediate state until the signal goes
+ * back to high.
+ */
+GPIO(EC_RST_ODL,            PIN(0, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH)  /* Wake source: EC reset */
+GPIO(EC_ENTERING_RW,        PIN(E, 1), GPIO_OUT_LOW)   /* Indicate when EC is entering RW code */
+GPIO(CCD_MODE_ODL,          PIN(E, 3), GPIO_INPUT)     /* Case Closed Debug Mode */
+GPIO(EC_BATT_PRES_ODL,      PIN(E, 5), GPIO_INPUT)     /* Battery Present */
+
+/* PMIC/AP 1.8V */
+GPIO(PM845_RESIN_L,         PIN(3, 2), GPIO_ODR_HIGH | GPIO_SEL_1P8V)  /* PMIC reset trigger */
+GPIO(PMIC_KPD_PWR_ODL,      PIN(D, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V)  /* PMIC power button */
+GPIO(EC_INT_L,              PIN(A, 2), GPIO_ODR_HIGH)  /* Interrupt line between AP and EC */
+GPIO(AP_SUSPEND_L,          PIN(5, 7), GPIO_INPUT)     /* Suspend signal from AP/PMIC */
+
+/* Power enables */
+GPIO(SWITCHCAP_ON,          PIN(D, 5), GPIO_OUT_LOW)   /* Enable switch cap */
+/* TODO(waihong): Remove it. The VBOB switch is for backup. */
+GPIO(VBOB_EN,               PIN(D, 3), GPIO_OUT_LOW)   /* Enable VBOB */
+GPIO(EN_PP3300_A,           PIN(A, 6), GPIO_OUT_LOW)   /* Enable PP3300 */
+GPIO(EN_PP5000_A,           PIN(6, 7), GPIO_OUT_LOW)   /* Enable PP5000 */
+GPIO(EC_BL_DISABLE_L,       PIN(B, 6), GPIO_OUT_LOW)   /* Backlight disable signal from EC */
+
+/* Sensors */
+GPIO(LID_ACCEL_INT_L,       PIN(5, 6), GPIO_INPUT)     /* Lid accel sensor interrupt */
+/* Control the gate for trackpad IRQ. High closes the gate.
+ * This is always set low so that the OS can manage the trackpad. */
+GPIO(TRACKPAD_INT_GATE,     PIN(7, 4), GPIO_OUT_LOW)
+
+/* USB-C */
+GPIO(USB_C0_PD_RST_L,       PIN(F, 1), GPIO_OUT_HIGH)  /* Port-0 TCPC chip reset */
+GPIO(USB_C1_PD_RST_ODL,     PIN(E, 4), GPIO_ODR_HIGH)  /* Port-1 TCPC chip reset */
+GPIO(DP_MUX_OE_L,           PIN(9, 6), GPIO_OUT_HIGH)  /* DP mux enable */
+GPIO(DP_MUX_SEL,            PIN(4, 5), GPIO_OUT_HIGH)  /* DP mux selection: L:C0, H:C1 */
+/*
+ * TODO(waihong): Implement regenerating HPD through this GPIO to signal AP, if
+ * the virtual USB mux (over EC host event) not work.
+ */
+GPIO(DP_HOT_PLUG_DET,       PIN(9, 5), GPIO_INPUT)     /* DP HPD to AP */
+/* TODO(waihong): Remove it from schematic. No use. */
+GPIO(USBC_MUX_CONF0,        PIN(5, 1), GPIO_INPUT)
+
+/* USB-A */
+GPIO(EN_USB_A_5V,           PIN(8, 6), GPIO_OUT_LOW)
+GPIO(USB_A_CDP_ILIM_EN_L,   PIN(7, 5), GPIO_OUT_LOW)   /* Only one USB-A port, always CDP */
+GPIO(USB_A0_OC_ODL,         PIN(D, 1), GPIO_ODR_HIGH)
+
+/* LEDs */
+GPIO(EC_CHG_LED_Y_C0,       PIN(C, 3), GPIO_OUT_LOW)
+GPIO(EC_CHG_LED_W_C0,       PIN(C, 4), GPIO_OUT_LOW)
+/* TODO(waihong): NC in the schematic. The C1 subboard doesn't have any LED. */
+GPIO(EC_CHG_LED_Y_C1,       PIN(6, 0), GPIO_OUT_LOW)
+GPIO(EC_CHG_LED_W_C1,       PIN(C, 0), GPIO_OUT_LOW)
+
+/* PWM */
+GPIO(KB_BL_PWM,             PIN(8, 0), GPIO_INPUT)     /* PWM3 */
+GPIO(EDP_BKLTCTL,           PIN(B, 7), GPIO_INPUT)     /* PWM5 */
+
+/* ADC */
+GPIO(PPVAR_BOOSTIN_SENSE,   PIN(4, 4), GPIO_INPUT)     /* ADC1 */
+GPIO(CHARGER_IADP,          PIN(4, 3), GPIO_INPUT)     /* ADC2 */
+GPIO(CHARGER_PMON,          PIN(4, 2), GPIO_INPUT)     /* ADC3 */
+
+/* I2C */
+GPIO(EC_I2C_POWER_SCL,      PIN(B, 5), GPIO_INPUT)
+GPIO(EC_I2C_POWER_SDA,      PIN(B, 4), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_PD_SCL,  PIN(9, 0), GPIO_INPUT)
+GPIO(EC_I2C_USB_C0_PD_SDA,  PIN(8, 7), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_PD_SCL,  PIN(9, 2), GPIO_INPUT)
+GPIO(EC_I2C_USB_C1_PD_SDA,  PIN(9, 1), GPIO_INPUT)
+GPIO(EC_I2C_EEPROM_SCL,     PIN(3, 3), GPIO_INPUT)
+GPIO(EC_I2C_EEPROM_SDA,     PIN(3, 6), GPIO_INPUT)
+GPIO(EC_I2C_SENSOR_SCL,     PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V)
+GPIO(EC_I2C_SENSOR_SDA,     PIN(B, 2), GPIO_INPUT | GPIO_SEL_1P8V)
+
+/* Board/SKU IDs */
+GPIO(BRD_ID0,               PIN(C, 7), GPIO_INPUT)
+GPIO(BRD_ID1,               PIN(9, 3), GPIO_INPUT)
+GPIO(BRD_ID2,               PIN(6, 3), GPIO_INPUT)
+GPIO(SKU_ID0,               PIN(F, 0), GPIO_INPUT)
+GPIO(SKU_ID1,               PIN(4, 1), GPIO_INPUT)
+GPIO(SKU_ID2,               PIN(D, 4), GPIO_INPUT)
+
+/* Switchcap */
+/*
+ * GPIO0 is configured as PVC_PG. When the chip in power down mode, it outputs
+ * high-Z. Set pull-down to avoid floating.
+ */
+GPIO(DA9313_GPIO0,          PIN(E, 2), GPIO_INPUT | GPIO_PULL_DOWN) /* Switchcap GPIO0 */
+
+/* Alternate functions GPIO definitions */
+ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0)            /* UART (GPIO64/65) */
+ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0)             /* I2C0 (GPIOB4/B5) */
+ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0)             /* I2C1 SDA (GPIO90), I2C2 (GPIO91/92) */
+ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0)             /* I2C1 SCL (GPIO87) */
+ALTERNATE(PIN_MASK(3, 0x48), 1, MODULE_I2C, 0)             /* I2C5 (GPIO33/36) */
+ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 (GPIOB2/B3) - 1.8V */
+ALTERNATE(PIN_MASK(4, 0x1C), 0, MODULE_ADC, 0)             /* ADC1 (GPIO44), ADC2 (GPIO43), ADC3 (GPIO42) */
+ALTERNATE(PIN_MASK(4, 0xC0), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SDO (GPIO47), SHI_SDI (GPIO46) */
+ALTERNATE(PIN_MASK(5, 0x28), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SCLK (GPIO55), SHI_CS# (GPIO53) */
+ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0)             /* PWM3 (GPIO80) - KB_BL_PWM */
+ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0)             /* PWM5 (GPIOB7) - EDP_BKLTCTL */
+ALTERNATE(PIN_MASK(D, 0x04), 1, MODULE_PMU, 0)             /* PSL_IN1 (GPIOD2) - LID_OPEN_EC */
+ALTERNATE(PIN_MASK(0, 0x01), 1, MODULE_PMU, 0)             /* PSL_IN2 (GPIO00) - ACOK_OD */
+ALTERNATE(PIN_MASK(0, 0x02), 1, MODULE_PMU, 0)             /* PSL_IN3 (GPIO01) - EC_PWR_BTN_ODL */
+ALTERNATE(PIN_MASK(0, 0x04), 1, MODULE_PMU, 0)             /* PSL_IN4 (GPIO02) - EC_RST_ODL */
+
+/* Keyboard */
+#define GPIO_KB_INPUT           (GPIO_INPUT | GPIO_PULL_UP)
+#define GPIO_KB_OUTPUT          (GPIO_ODR_HIGH)
+#define GPIO_KB_OUTPUT_COL2     (GPIO_OUT_LOW)
+
+/* Keyboard alternate functions */
+ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)  /* KSO10 (GPIO07), KSO11 (GPIO06), KSO12 (GPIO05) */
+ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)  /* KSO03 (GPIO16), KSO04 (GPIO15), KSO05 (GPIO14), KSO06 (GPIO13), KSO07 (GPIO12), KSO08 (GPIO11), KSO09 (GPIO10) */
+ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT)  /* KSO00 (GPIO21), KSO01 (GPIO20) */
+ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)   /* KSI2 (GPIO27), KSI3 (GPIO26), KSI4 (GPIO25), KSI5 (GPIO24), KSI6 (GPIO23), KSI7 (GPIO22) */
+ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT)   /* KSI0 (GPIO31), KSI1 (GPIO30) */
+GPIO(EC_KSO_02_INV,       PIN(1, 7), GPIO_KB_OUTPUT_COL2)              /* KSO02 (GPIO17) */
diff --git a/board/trogdor/led.c b/board/trogdor/led.c
new file mode 100644
index 0000000000..3af5776e12
--- /dev/null
+++ b/board/trogdor/led.c
@@ -0,0 +1,163 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ *
+ * Power and battery LED control.
+ */
+
+#include "battery.h"
+#include "charge_manager.h"
+#include "charge_state.h"
+#include "chipset.h"
+#include "ec_commands.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "host_command.h"
+#include "led_common.h"
+#include "system.h"
+#include "util.h"
+
+#define BAT_LED_ON 1
+#define BAT_LED_OFF 0
+
+const enum ec_led_id supported_led_ids[] = {
+	EC_LED_ID_RIGHT_LED,
+	EC_LED_ID_LEFT_LED,
+};
+
+const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids);
+
+enum led_color {
+	LED_OFF = 0,
+	LED_AMBER,
+	LED_WHITE,
+	LED_COLOR_COUNT  /* Number of colors, not a color itself */
+};
+
+static void side_led_set_color(int port, enum led_color color)
+{
+	gpio_set_level(port ? GPIO_EC_CHG_LED_Y_C1 : GPIO_EC_CHG_LED_Y_C0,
+		(color == LED_AMBER) ? BAT_LED_ON : BAT_LED_OFF);
+	gpio_set_level(port ? GPIO_EC_CHG_LED_W_C1 : GPIO_EC_CHG_LED_W_C0,
+		(color == LED_WHITE) ? BAT_LED_ON : BAT_LED_OFF);
+}
+
+void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range)
+{
+	brightness_range[EC_LED_COLOR_AMBER] = 1;
+	brightness_range[EC_LED_COLOR_WHITE] = 1;
+}
+
+int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness)
+{
+	int port;
+
+	switch (led_id) {
+	case EC_LED_ID_RIGHT_LED:
+		port = 0;
+		break;
+	case EC_LED_ID_LEFT_LED:
+		port = 1;
+		break;
+	default:
+		return EC_ERROR_PARAM1;
+	}
+
+	if (brightness[EC_LED_COLOR_WHITE] != 0)
+		side_led_set_color(port, LED_WHITE);
+	else if (brightness[EC_LED_COLOR_AMBER] != 0)
+		side_led_set_color(port, LED_AMBER);
+	else
+		side_led_set_color(port, LED_OFF);
+
+	return EC_SUCCESS;
+}
+
+/*
+ * Set active charge port color to the parameter, turn off all others.
+ * If no port is active (-1), turn off all LEDs.
+ */
+static void set_active_port_color(enum led_color color)
+{
+	int port = charge_manager_get_active_charge_port();
+
+	if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED))
+		side_led_set_color(0, (port == 0) ? color : LED_OFF);
+	if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
+		side_led_set_color(1, (port == 1) ? color : LED_OFF);
+}
+
+static void board_led_set_battery(void)
+{
+	static int battery_ticks;
+	uint32_t chflags = charge_get_flags();
+
+	battery_ticks++;
+
+	switch (charge_get_state()) {
+	case PWR_STATE_CHARGE:
+		/* Always indicate when charging, even in suspend. */
+		set_active_port_color(LED_AMBER);
+		break;
+	case PWR_STATE_DISCHARGE:
+		if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) {
+			if (charge_get_percent() <= 10)
+				side_led_set_color(0,
+				   (battery_ticks & 0x4) ? LED_WHITE : LED_OFF);
+			else
+				side_led_set_color(0, LED_OFF);
+		}
+
+		if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED))
+			side_led_set_color(1, LED_OFF);
+		break;
+	case PWR_STATE_ERROR:
+		set_active_port_color((battery_ticks & 0x2) ?
+				LED_WHITE : LED_OFF);
+		break;
+	case PWR_STATE_CHARGE_NEAR_FULL:
+		set_active_port_color(LED_WHITE);
+		break;
+	case PWR_STATE_IDLE: /* External power connected in IDLE */
+		if (chflags & CHARGE_FLAG_FORCE_IDLE)
+			set_active_port_color((battery_ticks & 0x4) ?
+					LED_AMBER : LED_OFF);
+		else
+			set_active_port_color(LED_WHITE);
+		break;
+	default:
+		/* Other states don't alter LED behavior */
+		break;
+	}
+}
+
+/* Called by hook task every TICK */
+static void led_tick(void)
+{
+	board_led_set_battery();
+}
+DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT);
+
+void led_control(enum ec_led_id led_id, enum ec_led_state state)
+{
+	enum led_color color;
+
+	if ((led_id != EC_LED_ID_RECOVERY_HW_REINIT_LED) &&
+	    (led_id != EC_LED_ID_SYSRQ_DEBUG_LED))
+		return;
+
+	if (state == LED_STATE_RESET) {
+		led_auto_control(EC_LED_ID_LEFT_LED, 1);
+		led_auto_control(EC_LED_ID_RIGHT_LED, 1);
+		board_led_set_battery();
+		return;
+	}
+
+	color = state ? LED_WHITE : LED_OFF;
+
+	led_auto_control(EC_LED_ID_LEFT_LED, 0);
+	led_auto_control(EC_LED_ID_RIGHT_LED, 0);
+
+	side_led_set_color(0, color);
+	side_led_set_color(1, color);
+}
diff --git a/board/trogdor/usb_pd_policy.c b/board/trogdor/usb_pd_policy.c
new file mode 100644
index 0000000000..dec48ded41
--- /dev/null
+++ b/board/trogdor/usb_pd_policy.c
@@ -0,0 +1,450 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "charge_manager.h"
+#include "console.h"
+#include "gpio.h"
+#include "pi3usb9281.h"
+#include "system.h"
+#include "usb_mux.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP |\
+			 PDO_FIXED_COMM_CAP)
+
+const uint32_t pd_src_pdo[] = {
+	PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo);
+const uint32_t pd_src_pdo_max[] = {
+		PDO_FIXED(5000, 3000, PDO_FIXED_FLAGS),
+};
+const int pd_src_pdo_max_cnt = ARRAY_SIZE(pd_src_pdo_max);
+
+const uint32_t pd_snk_pdo[] = {
+	PDO_FIXED(5000, 500, PDO_FIXED_FLAGS),
+	PDO_BATT(4750, 21000, 15000),
+	PDO_VAR(4750, 21000, 3000),
+};
+const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo);
+
+int pd_board_checks(void)
+{
+	return EC_SUCCESS;
+}
+
+int pd_check_data_swap(int port, int data_role)
+{
+	/*
+	 * Allow data swap if we are a UFP, otherwise don't allow.
+	 *
+	 * When we are still in the Read-Only firmware, avoid swapping roles
+	 * so we don't jump in RW as a SNK/DFP and potentially confuse the
+	 * power supply by sending a soft-reset with wrong data role.
+	 */
+
+	return (data_role == PD_ROLE_UFP) &&
+	       (system_get_image_copy() != SYSTEM_IMAGE_RO) ? 1 : 0;
+}
+
+void pd_check_dr_role(int port, int dr_role, int flags)
+{
+	/* If UFP, try to switch to DFP */
+	if ((flags & PD_FLAGS_PARTNER_DR_DATA) &&
+			dr_role == PD_ROLE_UFP &&
+			system_get_image_copy() != SYSTEM_IMAGE_RO)
+		pd_request_data_swap(port);
+}
+
+int pd_check_power_swap(int port)
+{
+	/*
+	 * Allow power swap as long as we are acting as a dual role device,
+	 * otherwise assume our role is fixed (not in S0 or console command
+	 * to fix our role).
+	 */
+	return pd_get_dual_role(port) == PD_DRP_TOGGLE_ON ? 1 : 0;
+}
+
+void pd_check_pr_role(int port, int pr_role, int flags)
+{
+	/*
+	 * If partner is dual-role power and dualrole toggling is on, consider
+	 * if a power swap is necessary.
+	 */
+	if ((flags & PD_FLAGS_PARTNER_DR_POWER) &&
+	    pd_get_dual_role(port) == PD_DRP_TOGGLE_ON) {
+		/*
+		 * If we are a sink and partner is not externally powered, then
+		 * swap to become a source. If we are source and partner is
+		 * externally powered, swap to become a sink.
+		 */
+		int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER;
+
+		if ((!partner_extpower && pr_role == PD_ROLE_SINK) ||
+		     (partner_extpower && pr_role == PD_ROLE_SOURCE))
+			pd_request_power_swap(port);
+	}
+}
+
+int pd_check_vconn_swap(int port)
+{
+	/* In G3, do not allow vconn swap since PP5000 rail is off */
+	return gpio_get_level(GPIO_EN_PP5000);
+}
+
+void pd_execute_data_swap(int port, int data_role)
+{
+	/* Both ports don't support device mode. Should not reach here. */
+}
+
+int pd_is_valid_input_voltage(int mv)
+{
+	return 1;
+}
+
+static uint8_t vbus_en[CONFIG_USB_PD_PORT_MAX_COUNT];
+static uint8_t vbus_rp[CONFIG_USB_PD_PORT_MAX_COUNT] = {TYPEC_RP_1A5,
+							TYPEC_RP_1A5};
+
+static void board_vbus_update_source_current(int port)
+{
+	/* Both port are controlled by PPC SN5S330. */
+	ppc_set_vbus_source_current_limit(port, vbus_rp[port]);
+	ppc_vbus_source_enable(port, vbus_en[port]);
+}
+
+void pd_power_supply_reset(int port)
+{
+	int prev_en;
+
+	prev_en = vbus_en[port];
+
+	/* Disable VBUS */
+	vbus_en[port] = 0;
+	board_vbus_update_source_current(port);
+
+	/* Enable discharge if we were previously sourcing 5V */
+	if (prev_en)
+		pd_set_vbus_discharge(port, 1);
+
+#ifdef CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT
+	/* Give back the current quota we are no longer using */
+	charge_manager_source_port(port, 0);
+#endif /* defined(CONFIG_USB_PD_MAX_SINGLE_SOURCE_CURRENT) */
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+int pd_set_power_supply_ready(int port)
+{
+	/* Disable charging */
+	board_vbus_sink_enable(port, 0);
+
+	pd_set_vbus_discharge(port, 0);
+
+	/* Provide VBUS */
+	vbus_en[port] = 1;
+	board_vbus_update_source_current(port);
+
+	/* Ensure we advertise the proper available current quota */
+	charge_manager_source_port(port, 1);
+
+	/* notify host of power info change */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS; /* we are ready */
+}
+
+void pd_transition_voltage(int idx)
+{
+	/* No-operation: we are always 5V */
+}
+
+int board_vbus_source_enabled(int port)
+{
+	return vbus_en[port];
+}
+
+void typec_set_source_current_limit(int port, enum tcpc_rp_value rp)
+{
+	vbus_rp[port] = rp;
+	board_vbus_update_source_current(port);
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	return !gpio_get_level(port ? GPIO_USB_C1_VBUS_DET_L :
+				      GPIO_USB_C0_VBUS_DET_L);
+}
+
+/* ----------------- Vendor Defined Messages ------------------ */
+const struct svdm_response svdm_rsp = {
+	.identity = NULL,
+	.svids = NULL,
+	.modes = NULL,
+};
+
+int pd_custom_vdm(int port, int cnt, uint32_t *payload,
+		  uint32_t **rpayload)
+{
+	int cmd = PD_VDO_CMD(payload[0]);
+	uint16_t dev_id = 0;
+	int is_rw, is_latest;
+
+	/* make sure we have some payload */
+	if (cnt == 0)
+		return 0;
+
+	switch (cmd) {
+	case VDO_CMD_VERSION:
+		/* guarantee last byte of payload is null character */
+		*(payload + cnt - 1) = 0;
+		CPRINTF("version: %s\n", (char *)(payload+1));
+		break;
+	case VDO_CMD_READ_INFO:
+	case VDO_CMD_SEND_INFO:
+		/* copy hash */
+		if (cnt == 7) {
+			dev_id = VDO_INFO_HW_DEV_ID(payload[6]);
+			is_rw = VDO_INFO_IS_RW(payload[6]);
+
+			is_latest = pd_dev_store_rw_hash(port,
+							 dev_id,
+							 payload + 1,
+							  is_rw ?
+							 SYSTEM_IMAGE_RW :
+							 SYSTEM_IMAGE_RO);
+			/*
+			 * Send update host event unless our RW hash is
+			 * already known to be the latest update RW.
+			 */
+			if (!is_rw || !is_latest)
+				pd_send_host_event(PD_EVENT_UPDATE_DEVICE);
+
+			CPRINTF("DevId:%d.%d SW:%d RW:%d\n",
+				HW_DEV_ID_MAJ(dev_id),
+				HW_DEV_ID_MIN(dev_id),
+				VDO_INFO_SW_DBG_VER(payload[6]),
+				is_rw);
+		} else if (cnt == 6) {
+			/* really old devices don't have last byte */
+			pd_dev_store_rw_hash(port, dev_id, payload + 1,
+					     SYSTEM_IMAGE_UNKNOWN);
+		}
+		break;
+	case VDO_CMD_CURRENT:
+		CPRINTF("Current: %dmA\n", payload[1]);
+		break;
+	case VDO_CMD_FLIP:
+		usb_mux_flip(port);
+		break;
+#ifdef CONFIG_USB_PD_LOGGING
+	case VDO_CMD_GET_LOG:
+		pd_log_recv_vdm(port, cnt, payload);
+		break;
+#endif /* CONFIG_USB_PD_LOGGING */
+	}
+
+	return 0;
+}
+
+#ifdef CONFIG_USB_PD_ALT_MODE_DFP
+static int dp_flags[CONFIG_USB_PD_PORT_MAX_COUNT];
+static uint32_t dp_status[CONFIG_USB_PD_PORT_MAX_COUNT];
+
+static void svdm_safe_dp_mode(int port)
+{
+	/* make DP interface safe until configure */
+	dp_flags[port] = 0;
+	dp_status[port] = 0;
+	usb_mux_set(port, TYPEC_MUX_NONE,
+		    USB_SWITCH_CONNECT, pd_get_polarity(port));
+}
+
+static int svdm_enter_dp_mode(int port, uint32_t mode_caps)
+{
+	/* Only enter mode if device is DFP_D capable */
+	if (mode_caps & MODE_DP_SNK) {
+		svdm_safe_dp_mode(port);
+		return 0;
+	}
+
+	return -1;
+}
+
+static int svdm_dp_status(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_STATUS | VDO_OPOS(opos));
+	payload[1] = VDO_DP_STATUS(0, /* HPD IRQ  ... not applicable */
+				   0, /* HPD level ... not applicable */
+				   0, /* exit DP? ... no */
+				   0, /* usb mode? ... no */
+				   0, /* multi-function ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)),
+				   0, /* power low? ... no */
+				   (!!(dp_flags[port] & DP_FLAGS_DP_ON)));
+	return 2;
+};
+
+static int svdm_dp_config(int port, uint32_t *payload)
+{
+	int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT);
+	int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]);
+
+	if (!pin_mode)
+		return 0;
+
+	payload[0] = VDO(USB_SID_DISPLAYPORT, 1,
+			 CMD_DP_CONFIG | VDO_OPOS(opos));
+	payload[1] = VDO_DP_CFG(pin_mode,      /* pin mode */
+				1,             /* DPv1.3 signaling */
+				2);            /* UFP connected */
+	return 2;
+};
+
+static void svdm_dp_post_config(int port)
+{
+	dp_flags[port] |= DP_FLAGS_DP_ON;
+}
+
+/**
+ * Is the port fine to be muxed its DisplayPort lines?
+ *
+ * Only one port can be muxed to DisplayPort at a time.
+ *
+ * @param port	Port number of TCPC.
+ * @return	1 is fine; 0 is bad as other port is already muxed;
+ */
+static int is_dp_muxable(int port)
+{
+	int i;
+	const char *dp_str, *usb_str;
+
+	for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++)
+		if (i != port) {
+			usb_mux_get(i, &dp_str, &usb_str);
+			if (dp_str)
+				return 0;
+		}
+
+	return 1;
+}
+
+static int svdm_dp_attention(int port, uint32_t *payload)
+{
+	int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]);
+	int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]);
+	const struct usb_mux *mux = &usb_muxes[port];
+
+	dp_status[port] = payload[1];
+
+	/*
+	 * Initial implementation to handle HPD. Only the first-plugged port
+	 * works, i.e. sending HPD signal to AP. The second-plugged port
+	 * will be ignored.
+	 *
+	 * TODO(waihong): Continue the above case, if the first-plugged port
+	 * is then unplugged, switch to the second-plugged port and signal AP?
+	 */
+	if (lvl) {
+		if (is_dp_muxable(port)) {
+			/*
+			 * TODO(waihong): Better to move switching DP mux to
+			 * the usb_mux abstraction.
+			 */
+			gpio_set_level(GPIO_DP_MUX_SEL, port == 1);
+			gpio_set_level(GPIO_DP_MUX_OE_L, 0);
+
+			/*
+			 * When mf_pref not true, still use the dock muxing
+			 * because of the board USB-C topology.
+			 */
+			usb_mux_set(port, TYPEC_MUX_DOCK,
+				    USB_SWITCH_CONNECT, pd_get_polarity(port));
+		} else {
+			/* TODO(waihong): Info user? */
+			CPRINTS("p%d: The other port is already muxed.", port);
+			return 0;  /* Nack */
+		}
+	} else {
+		gpio_set_level(GPIO_DP_MUX_OE_L, 1);
+		usb_mux_set(port, TYPEC_MUX_USB,
+			    USB_SWITCH_CONNECT, pd_get_polarity(port));
+	}
+
+	/* Signal AP for the HPD event */
+	mux->hpd_update(port, lvl, irq);
+
+	return 1;  /* Ack */
+}
+
+static void svdm_exit_dp_mode(int port)
+{
+	const struct usb_mux *mux = &usb_muxes[port];
+
+	svdm_safe_dp_mode(port);
+	mux->hpd_update(port, 0, 0);
+}
+
+static int svdm_enter_gfu_mode(int port, uint32_t mode_caps)
+{
+	/* Always enter GFU mode */
+	return 0;
+}
+
+static void svdm_exit_gfu_mode(int port)
+{
+}
+
+static int svdm_gfu_status(int port, uint32_t *payload)
+{
+	/*
+	 * This is called after enter mode is successful, send unstructured
+	 * VDM to read info.
+	 */
+	pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0);
+	return 0;
+}
+
+static int svdm_gfu_config(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+static int svdm_gfu_attention(int port, uint32_t *payload)
+{
+	return 0;
+}
+
+const struct svdm_amode_fx supported_modes[] = {
+	{
+		.svid = USB_SID_DISPLAYPORT,
+		.enter = &svdm_enter_dp_mode,
+		.status = &svdm_dp_status,
+		.config = &svdm_dp_config,
+		.post_config = &svdm_dp_post_config,
+		.attention = &svdm_dp_attention,
+		.exit = &svdm_exit_dp_mode,
+	},
+	{
+		.svid = USB_VID_GOOGLE,
+		.enter = &svdm_enter_gfu_mode,
+		.status = &svdm_gfu_status,
+		.config = &svdm_gfu_config,
+		.attention = &svdm_gfu_attention,
+		.exit = &svdm_exit_gfu_mode,
+	}
+};
+const int supported_modes_cnt = ARRAY_SIZE(supported_modes);
+#endif /* CONFIG_USB_PD_ALT_MODE_DFP */
diff --git a/include/config.h b/include/config.h
index ae331f7fa5..dcfc3b175f 100644
--- a/include/config.h
+++ b/include/config.h
@@ -1094,6 +1094,7 @@
 #undef CONFIG_CHIPSET_RK3288		/* Rockchip rk3288 */
 #undef CONFIG_CHIPSET_RK3399		/* Rockchip rk3399 */
 #undef CONFIG_CHIPSET_SKYLAKE		/* Intel Skylake (x86) */
+#undef CONFIG_CHIPSET_SC7180            /* Qualcomm SC7180 */
 #undef CONFIG_CHIPSET_SDM845            /* Qualcomm SDM845 */
 #undef CONFIG_CHIPSET_STONEY		/* AMD Stoney (x86)*/
 #undef CONFIG_CHIPSET_TIGERLAKE		/* Intel Tigerlake (x86) */
diff --git a/power/build.mk b/power/build.mk
index 4dfa240a99..2a22057982 100644
--- a/power/build.mk
+++ b/power/build.mk
@@ -17,6 +17,7 @@ power-$(CONFIG_CHIPSET_MT817X)+=mt817x.o
 power-$(CONFIG_CHIPSET_MT8183)+=mt8183.o
 power-$(CONFIG_CHIPSET_RK3288)+=rk3288.o
 power-$(CONFIG_CHIPSET_RK3399)+=rk3399.o
+power-$(CONFIG_CHIPSET_SC7180)+=sc7180.o
 power-$(CONFIG_CHIPSET_SDM845)+=sdm845.o
 power-$(CONFIG_CHIPSET_SKYLAKE)+=skylake.o intel_x86.o
 power-$(CONFIG_CHIPSET_STONEY)+=stoney.o
diff --git a/power/sc7180.c b/power/sc7180.c
new file mode 100644
index 0000000000..21be404e2c
--- /dev/null
+++ b/power/sc7180.c
@@ -0,0 +1,880 @@
+/* Copyright 2019 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/*
+ * SC7180 SoC power sequencing module for Chrome EC
+ *
+ * This implements the following features:
+ *
+ * - Cold reset powers on the AP
+ *
+ *  When powered off:
+ *  - Press power button turns on the AP
+ *  - Hold power button turns on the AP, and then 8s later turns it off and
+ *    leaves it off until pwron is released and pressed again
+ *  - Lid open turns on the AP
+ *
+ *  When powered on:
+ *  - Holding power button for 8s powers off the AP
+ *  - Pressing and releasing pwron within that 8s is ignored
+ *  - If POWER_GOOD is dropped by the AP, then we power the AP off
+ */
+
+#include "charge_state.h"
+#include "chipset.h"
+#include "common.h"
+#include "gpio.h"
+#include "hooks.h"
+#include "lid_switch.h"
+#include "power.h"
+#include "power_button.h"
+#include "system.h"
+#include "task.h"
+#include "util.h"
+
+#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
+
+/* Masks for power signals */
+#define IN_POWER_GOOD		POWER_SIGNAL_MASK(SC7180_POWER_GOOD)
+#define IN_AP_RST_ASSERTED	POWER_SIGNAL_MASK(SC7180_AP_RST_ASSERTED)
+
+
+/* Long power key press to force shutdown */
+#define DELAY_FORCE_SHUTDOWN		(8 * SECOND)
+
+/*
+ * If the power button is pressed to turn on, then held for this long, we
+ * power off.
+ *
+ * Normal case: User releases power button and chipset_task() goes
+ *    into the inner loop, waiting for next event to occur (power button
+ *    press or POWER_GOOD == 0).
+ */
+#define DELAY_SHUTDOWN_ON_POWER_HOLD	(8 * SECOND)
+
+/*
+ * After trigger PMIC power sequence, how long it triggers AP to turn on
+ * or off. Observed that the worst case is ~150ms. Pick a safe vale.
+ */
+#define PMIC_POWER_AP_RESPONSE_TIMEOUT	(350 * MSEC)
+
+/*
+ * After force off the switch cap, how long the PMIC/AP totally off.
+ * Observed that the worst case is 2s. Pick a safe vale.
+ */
+#define FORCE_OFF_RESPONSE_TIMEOUT	(4 * SECOND)
+
+/* Wait for polling the AP on signal */
+#define PMIC_POWER_AP_WAIT		(1 * MSEC)
+
+/* The length of an issued low pulse to the PM845_RESIN_L signal */
+#define PMIC_RESIN_PULSE_LENGTH		(20 * MSEC)
+
+/* The timeout of the check if the system can boot AP */
+#define CAN_BOOT_AP_CHECK_TIMEOUT	(500 * MSEC)
+
+/* Wait for polling if the system can boot AP */
+#define CAN_BOOT_AP_CHECK_WAIT		(100 * MSEC)
+
+/* The timeout of the check if the switchcap outputs good voltage */
+#define SWITCHCAP_PG_CHECK_TIMEOUT	(50 * MSEC)
+
+/* Wait for polling if the switchcap outputs good voltage */
+#define SWITCHCAP_PG_CHECK_WAIT		(5 * MSEC)
+
+/* Delay between power-on the system and power-on the PMIC */
+#define SYSTEM_POWER_ON_DELAY		(10 * MSEC)
+
+/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
+/* 1 if the power button was pressed last time we checked */
+static char power_button_was_pressed;
+
+/* 1 if lid-open event has been detected */
+static char lid_opened;
+
+/* 1 if AP_RST_L and PS_HOLD is overdriven by EC */
+static char ap_rst_overdriven;
+
+/* Time where we will power off, if power button still held down */
+static timestamp_t power_off_deadline;
+
+/* Force AP power on (used for recovery keypress) */
+static int auto_power_on;
+
+enum power_request_t {
+	POWER_REQ_NONE,
+	POWER_REQ_OFF,
+	POWER_REQ_ON,
+	POWER_REQ_RESET,
+
+	POWER_REQ_COUNT,
+};
+
+static enum power_request_t power_request;
+
+/**
+ * Return values for check_for_power_off_event().
+ */
+enum power_off_event_t {
+	POWER_OFF_CANCEL,
+	POWER_OFF_BY_POWER_BUTTON_PRESSED,
+	POWER_OFF_BY_LONG_PRESS,
+	POWER_OFF_BY_POWER_GOOD_LOST,
+	POWER_OFF_BY_POWER_REQ_OFF,
+	POWER_OFF_BY_POWER_REQ_RESET,
+
+	POWER_OFF_EVENT_COUNT,
+};
+
+/**
+ * Return values for check_for_power_on_event().
+ */
+enum power_on_event_t {
+	POWER_ON_CANCEL,
+	POWER_ON_BY_IN_POWER_GOOD,
+	POWER_ON_BY_AUTO_POWER_ON,
+	POWER_ON_BY_LID_OPEN,
+	POWER_ON_BY_POWER_BUTTON_PRESSED,
+	POWER_ON_BY_POWER_REQ_ON,
+	POWER_ON_BY_POWER_REQ_RESET,
+
+	POWER_ON_EVENT_COUNT,
+};
+
+/* Issue a request to initiate a reset sequence */
+static void request_cold_reset(void)
+{
+	power_request = POWER_REQ_RESET;
+	task_wake(TASK_ID_CHIPSET);
+}
+
+/* AP-requested reset GPIO interrupt handlers */
+static void chipset_reset_request_handler(void)
+{
+	CPRINTS("AP wants reset");
+	chipset_reset(CHIPSET_RESET_AP_REQ);
+}
+DECLARE_DEFERRED(chipset_reset_request_handler);
+
+void chipset_reset_request_interrupt(enum gpio_signal signal)
+{
+	hook_call_deferred(&chipset_reset_request_handler_data, 0);
+}
+
+void chipset_warm_reset_interrupt(enum gpio_signal signal)
+{
+	/*
+	 * The warm_reset signal is pulled-up by a rail from PMIC. If the
+	 * warm_reset drops, it means:
+	 *  * Servo or Cr50 holds the signal, or
+	 *  * its pull-up rail POWER_GOOD drops.
+	 */
+	if (!gpio_get_level(GPIO_WARM_RESET_L)) {
+		if (gpio_get_level(GPIO_POWER_GOOD)) {
+			/*
+			 * Servo or Cr50 holds the WARM_RESET_L signal.
+			 *
+			 * Overdrive AP_RST_L to hold AP. Overdrive PS_HOLD to
+			 * emulate AP being up to trick the PMIC into thinking
+			 * there’s nothing weird going on.
+			 */
+			ap_rst_overdriven = 1;
+			gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
+				       GPIO_SEL_1P8V | GPIO_OUT_HIGH);
+			gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
+				       GPIO_SEL_1P8V | GPIO_OUT_LOW);
+		} else {
+			/*
+			 * The pull-up rail POWER_GOOD drops.
+			 *
+			 * High-Z both AP_RST_L and PS_HOLD to restore their
+			 * states.
+			 */
+			gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
+				       GPIO_SEL_1P8V);
+			gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
+				       GPIO_SEL_1P8V);
+			ap_rst_overdriven = 0;
+		}
+	} else {
+		if (ap_rst_overdriven) {
+			/*
+			 * Servo or Cr50 releases the WARM_RESET_L signal.
+			 *
+			 * Cold reset the PMIC, doing S0->S5->S0 transition,
+			 * by issuing a request to initiate a reset sequence,
+			 * to recover the system. The transition to S5 makes
+			 * POWER_GOOD drop that triggers an interrupt to
+			 * high-Z both AP_RST_L and PS_HOLD.
+			 */
+			request_cold_reset();
+		}
+		/* If not overdriven, just a normal power-up, do nothing. */
+	}
+
+	power_signal_interrupt(signal);
+}
+
+static void sc7180_lid_event(void)
+{
+	/* Power task only cares about lid-open events */
+	if (!lid_is_open())
+		return;
+
+	lid_opened = 1;
+	task_wake(TASK_ID_CHIPSET);
+}
+DECLARE_HOOK(HOOK_LID_CHANGE, sc7180_lid_event, HOOK_PRIO_DEFAULT);
+
+static void sc7180_powerbtn_changed(void)
+{
+	task_wake(TASK_ID_CHIPSET);
+}
+DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, sc7180_powerbtn_changed,
+	     HOOK_PRIO_DEFAULT);
+
+/**
+ * Wait the switchcap GPIO0 PVC_PG signal asserted.
+ *
+ * When the output voltage is over the threshold PVC_PG_ADJ,
+ * the PVC_PG is asserted.
+ *
+ * PVG_PG_ADJ is configured to 3.0V.
+ * GPIO0 is configured as PVC_PG.
+ *
+ * @param enable	1 to wait the PMIC/AP on.
+			0 to wait the PMIC/AP off.
+ */
+static void wait_switchcap_power_good(int enable)
+{
+	timestamp_t poll_deadline;
+
+	poll_deadline = get_time();
+	poll_deadline.val += SWITCHCAP_PG_CHECK_TIMEOUT;
+	while (enable != gpio_get_level(GPIO_DA9313_GPIO0) &&
+	       get_time().val < poll_deadline.val) {
+		usleep(SWITCHCAP_PG_CHECK_WAIT);
+	}
+
+	/*
+	 * Check the timeout case. Just show a message. More check later
+	 * will switch the power state.
+	 */
+	if (enable != gpio_get_level(GPIO_DA9313_GPIO0)) {
+		if (enable)
+			CPRINTS("SWITCHCAP NO POWER GOOD!");
+		else
+			CPRINTS("SWITCHCAP STILL POWER GOOD!");
+	}
+
+}
+
+/**
+ * Get the state of the system power signals.
+ *
+ * @return 1 if the system is powered, 0 if not
+ */
+static int is_system_powered(void)
+{
+	return gpio_get_level(GPIO_SWITCHCAP_ON);
+}
+
+/**
+ * Get the PMIC/AP power signal.
+ *
+ * We treat the PMIC chips and the AP as a whole here. Don't deal with
+ * the individual chip.
+ *
+ * @return 1 if the PMIC/AP is powered, 0 if not
+ */
+static int is_pmic_pwron(void)
+{
+	/* Use POWER_GOOD to indicate PMIC/AP is on/off */
+	return gpio_get_level(GPIO_POWER_GOOD);
+}
+
+/**
+ * Wait the PMIC/AP power-on state.
+ *
+ * @param enable	1 to wait the PMIC/AP on.
+			0 to wait the PMIC/AP off.
+ * @param timeout	Number of microsecond of timeout.
+ */
+static void wait_pmic_pwron(int enable, unsigned int timeout)
+{
+	timestamp_t poll_deadline;
+
+	/* Check the AP power status */
+	if (enable == is_pmic_pwron())
+		return;
+
+	poll_deadline = get_time();
+	poll_deadline.val += timeout;
+	while (enable != is_pmic_pwron() &&
+	       get_time().val < poll_deadline.val) {
+		usleep(PMIC_POWER_AP_WAIT);
+	}
+
+	/* Check the timeout case */
+	if (enable != is_pmic_pwron()) {
+		if (enable)
+			CPRINTS("AP POWER NOT READY!");
+		else
+			CPRINTS("AP POWER STILL UP!");
+	}
+}
+
+/**
+ * Set the state of the system power signals.
+ *
+ * The system power signals are the enable pins of SwitchCap and VBOB.
+ * They control the power of the set of PMIC chips and the AP.
+ *
+ * @param enable	1 to enable or 0 to disable
+ */
+static void set_system_power(int enable)
+{
+	CPRINTS("%s(%d)", __func__, enable);
+	gpio_set_level(GPIO_SWITCHCAP_ON, enable);
+	wait_switchcap_power_good(enable);
+	/* TODO: VBOB_EN GPIO is NC, just a backup. Remove it later. */
+	gpio_set_level(GPIO_VBOB_EN, enable);
+	if (enable) {
+		usleep(SYSTEM_POWER_ON_DELAY);
+	} else {
+		/* Ensure POWER_GOOD drop to low if it is a forced shutdown */
+		wait_pmic_pwron(0, FORCE_OFF_RESPONSE_TIMEOUT);
+	}
+}
+
+/**
+ * Set the PMIC/AP power-on state.
+ *
+ * It triggers the PMIC/AP power-on and power-off sequence.
+ *
+ * @param enable	1 to power the PMIC/AP on.
+			0 to power the PMIC/AP off.
+ */
+static void set_pmic_pwron(int enable)
+{
+	CPRINTS("%s(%d)", __func__, enable);
+
+	/* Check the PMIC/AP power state */
+	if (enable == is_pmic_pwron())
+		return;
+
+	/*
+	 * Power-on sequence:
+	 * 1. Hold down PMIC_KPD_PWR_ODL, which is a power-on trigger
+	 * 2. PMIC supplies power to POWER_GOOD
+	 * 3. Release PMIC_KPD_PWR_ODL
+	 *
+	 * Power-off sequence:
+	 * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off
+	 *    trigger (requiring reprogramming PMIC registers to make
+	 *    PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger)
+	 * 2. PMIC stops supplying power to POWER_GOOD (requiring
+	 *    reprogramming PMIC to set the stage-1 and stage-2 reset timers to
+	 *    0 such that the pull down happens just after the deboucing time
+	 *    of the trigger, like 2ms)
+	 * 3. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L
+	 *
+	 * If the above PMIC registers not programmed or programmed wrong, it
+	 * falls back to the next functions, which cuts off the system power.
+	 */
+
+	gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0);
+	if (!enable)
+		gpio_set_level(GPIO_PM845_RESIN_L, 0);
+	wait_pmic_pwron(enable, PMIC_POWER_AP_RESPONSE_TIMEOUT);
+	gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1);
+	if (!enable)
+		gpio_set_level(GPIO_PM845_RESIN_L, 1);
+}
+
+enum power_state power_chipset_init(void)
+{
+	int init_power_state;
+	uint32_t reset_flags = system_get_reset_flags();
+
+	/* Enable interrupts */
+	gpio_enable_interrupt(GPIO_AP_RST_REQ);
+	gpio_enable_interrupt(GPIO_WARM_RESET_L);
+	gpio_enable_interrupt(GPIO_POWER_GOOD);
+
+	/*
+	 * Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
+	 * the AP could stay in strange state.
+	 */
+	if (!(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
+		CPRINTS("not sysjump; forcing system shutdown");
+		set_system_power(0);
+		init_power_state = POWER_G3;
+	} else {
+		/* In the SYSJUMP case, we check if the AP is on */
+		if (power_get_signals() & IN_POWER_GOOD) {
+			CPRINTS("SOC ON");
+			init_power_state = POWER_S0;
+		} else {
+			CPRINTS("SOC OFF");
+			init_power_state = POWER_G3;
+		}
+	}
+
+	/* Leave power off only if requested by reset flags */
+	if (!(reset_flags & EC_RESET_FLAG_AP_OFF) &&
+	    !(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
+		CPRINTS("auto_power_on set due to reset_flag 0x%x",
+			system_get_reset_flags());
+		auto_power_on = 1;
+	}
+
+	if (battery_is_present() == BP_YES) {
+		/*
+		 * (crosbug.com/p/28289): Wait battery stable.
+		 * Some batteries use clock stretching feature, which requires
+		 * more time to be stable.
+		 */
+		battery_wait_for_stable();
+	}
+
+	return init_power_state;
+}
+
+/*****************************************************************************/
+
+/**
+ * Power off the AP
+ */
+static void power_off(void)
+{
+	/* Check the power off status */
+	if (!is_system_powered())
+		return;
+
+	/* Call hooks before we drop power rails */
+	hook_notify(HOOK_CHIPSET_SHUTDOWN);
+
+	/* Do a graceful way to shutdown PMIC/AP first */
+	set_pmic_pwron(0);
+
+	/* Disable signal interrupts, as they are floating when switchcap off */
+	power_signal_disable_interrupt(GPIO_AP_RST_L);
+	power_signal_disable_interrupt(GPIO_PMIC_FAULT_L);
+
+	/* Force to switch off all rails */
+	set_system_power(0);
+
+	/* Turn off the 3.3V and 5V rails. */
+	gpio_set_level(GPIO_EN_PP3300_A, 0);
+#ifdef CONFIG_POWER_PP5000_CONTROL
+	power_5v_enable(task_get_current(), 0);
+#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
+	gpio_set_level(GPIO_EN_PP5000, 0);
+#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
+
+	lid_opened = 0;
+	enable_sleep(SLEEP_MASK_AP_RUN);
+	CPRINTS("power shutdown complete");
+}
+
+/**
+ * Check if the power is enough to boot the AP.
+ */
+static int power_is_enough(void)
+{
+	timestamp_t poll_deadline;
+
+	/* If powered by adapter only, wait a while for PD negoiation. */
+	poll_deadline = get_time();
+	poll_deadline.val += CAN_BOOT_AP_CHECK_TIMEOUT;
+
+	/*
+	 * Wait for PD negotiation. If a system with drained battery, don't
+	 * waste the time and exit the loop.
+	 */
+	while (!system_can_boot_ap() && !charge_want_shutdown() &&
+		get_time().val < poll_deadline.val) {
+		usleep(CAN_BOOT_AP_CHECK_WAIT);
+	}
+
+	return system_can_boot_ap() && !charge_want_shutdown();
+}
+
+/**
+ * Power on the AP
+ */
+static void power_on(void)
+{
+	/*
+	 * If no enough power, return and the state machine will transition
+	 * back to S5.
+	 */
+	if (!power_is_enough())
+		return;
+
+	/*
+	 * When power_on() is called, we are at S5S3. Initialize components
+	 * to ready state before AP is up.
+	 */
+	hook_notify(HOOK_CHIPSET_PRE_INIT);
+
+	/* Enable the 3.3V and 5V rail. */
+	gpio_set_level(GPIO_EN_PP3300_A, 1);
+#ifdef CONFIG_POWER_PP5000_CONTROL
+	power_5v_enable(task_get_current(), 1);
+#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
+	gpio_set_level(GPIO_EN_PP5000, 1);
+#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
+
+	set_system_power(1);
+
+	/* Enable signal interrupts */
+	power_signal_enable_interrupt(GPIO_AP_RST_L);
+	power_signal_enable_interrupt(GPIO_PMIC_FAULT_L);
+
+	set_pmic_pwron(1);
+
+	disable_sleep(SLEEP_MASK_AP_RUN);
+
+	CPRINTS("AP running ...");
+}
+
+/**
+ * Check if there has been a power-on event
+ *
+ * This checks all power-on event signals and returns non-zero if any have been
+ * triggered (with debounce taken into account).
+ *
+ * @return non-zero if there has been a power-on event, 0 if not.
+ */
+static uint8_t check_for_power_on_event(void)
+{
+	int ap_off_flag;
+
+	ap_off_flag = system_get_reset_flags() & EC_RESET_FLAG_AP_OFF;
+	system_clear_reset_flags(EC_RESET_FLAG_AP_OFF);
+	/* check if system is already ON */
+	if (power_get_signals() & IN_POWER_GOOD) {
+		if (ap_off_flag) {
+			CPRINTS("system is on, but EC_RESET_FLAG_AP_OFF is on");
+			return POWER_ON_CANCEL;
+		}
+		CPRINTS("system is on, thus clear auto_power_on");
+		/* no need to arrange another power on */
+		auto_power_on = 0;
+		return POWER_ON_BY_IN_POWER_GOOD;
+	}
+	if (ap_off_flag) {
+		CPRINTS("EC_RESET_FLAG_AP_OFF is on");
+		power_off();
+		return POWER_ON_CANCEL;
+	}
+
+	CPRINTS("POWER_GOOD is not asserted");
+
+	/* power on requested at EC startup for recovery */
+	if (auto_power_on) {
+		auto_power_on = 0;
+		return POWER_ON_BY_AUTO_POWER_ON;
+	}
+
+	/* Check lid open */
+	if (lid_opened) {
+		lid_opened = 0;
+		return POWER_ON_BY_LID_OPEN;
+	}
+
+	/* check for power button press */
+	if (power_button_is_pressed())
+		return POWER_ON_BY_POWER_BUTTON_PRESSED;
+
+	if (power_request == POWER_REQ_ON) {
+		power_request = POWER_REQ_NONE;
+		return POWER_ON_BY_POWER_REQ_ON;
+	}
+
+	if (power_request == POWER_REQ_RESET) {
+		power_request = POWER_REQ_NONE;
+		return POWER_ON_BY_POWER_REQ_RESET;
+	}
+
+	return POWER_OFF_CANCEL;
+}
+
+/**
+ * Check for some event triggering the shutdown.
+ *
+ * It can be either a long power button press or a shutdown triggered from the
+ * AP and detected by reading POWER_GOOD.
+ *
+ * @return non-zero if a shutdown should happen, 0 if not
+ */
+static uint8_t check_for_power_off_event(void)
+{
+	timestamp_t now;
+	int pressed = 0;
+
+	/*
+	 * Check for power button press.
+	 */
+	if (power_button_is_pressed()) {
+		pressed = POWER_OFF_BY_POWER_BUTTON_PRESSED;
+	} else if (power_request == POWER_REQ_OFF) {
+		power_request = POWER_REQ_NONE;
+		return POWER_OFF_BY_POWER_REQ_OFF;
+	} else if (power_request == POWER_REQ_RESET) {
+		/*
+		 * The power_request flag will be cleared later
+		 * in check_for_power_on_event() in S5.
+		 */
+		return POWER_OFF_BY_POWER_REQ_RESET;
+	}
+
+	now = get_time();
+	if (pressed) {
+		if (!power_button_was_pressed) {
+			power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
+			CPRINTS("power waiting for long press %u",
+				power_off_deadline.le.lo);
+			/* Ensure we will wake up to check the power key */
+			timer_arm(power_off_deadline, TASK_ID_CHIPSET);
+		} else if (timestamp_expired(power_off_deadline, &now)) {
+			power_off_deadline.val = 0;
+			CPRINTS("power off after long press now=%u, %u",
+				now.le.lo, power_off_deadline.le.lo);
+			return POWER_OFF_BY_LONG_PRESS;
+		}
+	} else if (power_button_was_pressed) {
+		CPRINTS("power off cancel");
+		timer_cancel(TASK_ID_CHIPSET);
+	}
+
+	power_button_was_pressed = pressed;
+
+	/* POWER_GOOD released by AP : shutdown immediately */
+	if (!power_has_signals(IN_POWER_GOOD)) {
+		if (power_button_was_pressed)
+			timer_cancel(TASK_ID_CHIPSET);
+
+		CPRINTS("POWER_GOOD is lost");
+		return POWER_OFF_BY_POWER_GOOD_LOST;
+	}
+
+	return POWER_OFF_CANCEL;
+}
+
+/*****************************************************************************/
+/* Chipset interface */
+
+void chipset_force_shutdown(enum chipset_shutdown_reason reason)
+{
+	CPRINTS("%s(%d)", __func__, reason);
+	report_ap_reset(reason);
+
+	/* Issue a request to initiate a power-off sequence */
+	power_request = POWER_REQ_OFF;
+	task_wake(TASK_ID_CHIPSET);
+}
+
+void chipset_reset(enum chipset_reset_reason reason)
+{
+	int rv;
+
+	CPRINTS("%s(%d)", __func__, reason);
+	report_ap_reset(reason);
+
+	/* The host command is used to hard reset AP. Check b/119261783 */
+	if (reason == CHIPSET_RESET_HOST_CMD) {
+		request_cold_reset();
+		return;
+	}
+
+	/*
+	 * Warm reset sequence:
+	 * 1. Issue a low pulse to PM845_RESIN_L, which triggers PMIC
+	 *    to do a warm reset (requiring reprogramming PMIC registers
+	 *    to make PM845_RESIN_L as a warm reset trigger).
+	 * 2. PMIC then issues a low pulse to AP_RST_L to reset AP.
+	 *    EC monitors the signal to see any low pulse.
+	 *    2.1. If a low pulse found, done.
+	 *    2.2. If a low pulse not found (the above PMIC registers
+	 *         not programmed or programmed wrong), issue a request
+	 *         to initiate a cold reset power sequence.
+	 */
+
+	gpio_set_level(GPIO_PM845_RESIN_L, 0);
+	usleep(PMIC_RESIN_PULSE_LENGTH);
+	gpio_set_level(GPIO_PM845_RESIN_L, 1);
+
+	rv = power_wait_signals_timeout(IN_AP_RST_ASSERTED,
+					PMIC_POWER_AP_RESPONSE_TIMEOUT);
+	/* Exception case: PMIC not work as expected, request a cold reset */
+	if (rv != EC_SUCCESS)
+		request_cold_reset();
+}
+
+/**
+ * Power handler for steady states
+ *
+ * @param state		Current power state
+ * @return Updated power state
+ */
+enum power_state power_handle_state(enum power_state state)
+{
+	uint8_t value;
+	static uint8_t boot_from_g3, shutdown_from_s0;
+
+	switch (state) {
+	case POWER_G3:
+		boot_from_g3 = check_for_power_on_event();
+		if (boot_from_g3)
+			return POWER_G3S5;
+		break;
+
+	case POWER_G3S5:
+		return POWER_S5;
+
+	case POWER_S5:
+		if (boot_from_g3) {
+			value = boot_from_g3;
+			boot_from_g3 = 0;
+		} else {
+			value = check_for_power_on_event();
+		}
+
+		if (value) {
+			CPRINTS("power on %d", value);
+			return POWER_S5S3;
+		}
+		break;
+
+	case POWER_S5S3:
+		/*
+		 * Wait for power button release before actually boot AP.
+		 * It may be a long-hold power button with volume buttons
+		 * to trigger the recovery button. We don't want AP up
+		 * during the long-hold.
+		 */
+		power_button_wait_for_release(-1);
+
+		power_on();
+		if (power_wait_signals(IN_POWER_GOOD) != EC_SUCCESS) {
+			CPRINTS("POWER_GOOD not seen in time");
+			set_system_power(0);
+			return POWER_S5;
+		}
+
+		CPRINTS("POWER_GOOD seen");
+		/* Call hooks now that AP is running */
+		hook_notify(HOOK_CHIPSET_STARTUP);
+		return POWER_S3;
+
+	case POWER_S3:
+		if (shutdown_from_s0) {
+			value = shutdown_from_s0;
+			shutdown_from_s0 = 0;
+		} else {
+			value = check_for_power_off_event();
+		}
+
+		if (value) {
+			CPRINTS("power off %d", value);
+			return POWER_S3S5;
+		}
+		/* Go to S3S0 directly, as don't know if it is in suspend */
+		return POWER_S3S0;
+
+	case POWER_S3S0:
+		hook_notify(HOOK_CHIPSET_RESUME);
+		return POWER_S0;
+
+	case POWER_S0:
+		shutdown_from_s0 = check_for_power_off_event();
+		if (shutdown_from_s0)
+			return POWER_S0S3;
+		break;
+
+	case POWER_S0S3:
+		/*
+		 * If the power button is pressing, we need cancel the long
+		 * press timer, otherwise EC will crash.
+		 */
+		if (power_button_was_pressed)
+			timer_cancel(TASK_ID_CHIPSET);
+
+		/* Call hooks here since we don't know it prior to AP suspend */
+		hook_notify(HOOK_CHIPSET_SUSPEND);
+		return POWER_S3;
+
+	case POWER_S3S5:
+		power_off();
+		/*
+		 * Wait forever for the release of the power button; otherwise,
+		 * this power button press will then trigger a power-on in S5.
+		 */
+		power_button_wait_for_release(-1);
+		power_button_was_pressed = 0;
+		return POWER_S5;
+
+	case POWER_S5G3:
+		return POWER_G3;
+	}
+
+	return state;
+}
+
+/*****************************************************************************/
+/* Console debug command */
+
+static const char *power_req_name[POWER_REQ_COUNT] = {
+	"none",
+	"off",
+	"on",
+};
+
+/* Power states that we can report */
+enum power_state_t {
+	PSTATE_UNKNOWN,
+	PSTATE_OFF,
+	PSTATE_ON,
+	PSTATE_COUNT,
+};
+
+static const char * const state_name[] = {
+	"unknown",
+	"off",
+	"on",
+};
+
+static int command_power(int argc, char **argv)
+{
+	int v;
+
+	if (argc < 2) {
+		enum power_state_t state;
+
+		state = PSTATE_UNKNOWN;
+		if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
+			state = PSTATE_OFF;
+		if (chipset_in_state(CHIPSET_STATE_ON))
+			state = PSTATE_ON;
+		ccprintf("%s\n", state_name[state]);
+
+		return EC_SUCCESS;
+	}
+
+	if (!parse_bool(argv[1], &v))
+		return EC_ERROR_PARAM1;
+
+	power_request = v ? POWER_REQ_ON : POWER_REQ_OFF;
+	ccprintf("Requesting power %s\n", power_req_name[power_request]);
+	task_wake(TASK_ID_CHIPSET);
+
+	return EC_SUCCESS;
+}
+DECLARE_CONSOLE_COMMAND(power, command_power,
+			"on/off",
+			"Turn AP power on/off");