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author | Tinghan Shen <tinghan.shen@mediatek.com> | 2021-10-29 14:53:47 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-10-29 09:48:50 +0000 |
commit | 09775c3cd86a459104bbe3c8ad3f1839629739a6 (patch) | |
tree | 07be71a1b0626bdaab68a953d34e70fd3e055901 | |
parent | 5a2dfeeb7fee92b4d6e2b931ac38dd364b5ae9ae (diff) | |
download | chrome-ec-09775c3cd86a459104bbe3c8ad3f1839629739a6.tar.gz |
chip/mt_scp: support disable/enable WDT
Since cherry SCP has to reduce power consumption in S3 state, cherry SCP
is going to stop running under S3 state. However, SCP WDT is default
using 32k clock and cannot change it by design. SCP has to support
disable/enable WDT to meet the S3 plan.
BRANCH=None
BUG=b:199444513
TEST=test enable/disable WDT ok
Change-Id: I6c1de9718ec558a5cd8495adc0c7b3f59d2846d7
Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3247734
Reviewed-by: Tzung-Bi Shih <tzungbi@chromium.org>
Reviewed-by: Rong Chang <rongchang@chromium.org>
Commit-Queue: Tzung-Bi Shih <tzungbi@chromium.org>
-rw-r--r-- | chip/mt_scp/mt8195/clock.c | 5 | ||||
-rw-r--r-- | chip/mt_scp/rv32i_common/scp_watchdog.h | 15 | ||||
-rw-r--r-- | chip/mt_scp/rv32i_common/watchdog.c | 16 |
3 files changed, 34 insertions, 2 deletions
diff --git a/chip/mt_scp/mt8195/clock.c b/chip/mt_scp/mt8195/clock.c index c6bf3cbc79..414ab4016d 100644 --- a/chip/mt_scp/mt8195/clock.c +++ b/chip/mt_scp/mt8195/clock.c @@ -15,6 +15,7 @@ #include "ec_commands.h" #include "power.h" #include "registers.h" +#include "scp_watchdog.h" #include "timer.h" #define CPRINTF(format, args...) cprintf(CC_CLOCK, format, ##args) @@ -377,10 +378,12 @@ power_chipset_handle_host_sleep_event(enum host_sleep_event state, { if (state == HOST_SLEEP_EVENT_S3_SUSPEND) { CPRINTS("AP suspend"); + disable_watchdog(); clock_select_clock(SCP_CLK_32K); } else if (state == HOST_SLEEP_EVENT_S3_RESUME) { - CPRINTS("AP resume"); clock_select_clock(SCP_CLK_ULPOSC2_HIGH_SPEED); + enable_watchdog(); + CPRINTS("AP resume"); } } diff --git a/chip/mt_scp/rv32i_common/scp_watchdog.h b/chip/mt_scp/rv32i_common/scp_watchdog.h new file mode 100644 index 0000000000..0277aeaec7 --- /dev/null +++ b/chip/mt_scp/rv32i_common/scp_watchdog.h @@ -0,0 +1,15 @@ + +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef __SCP_WATCHDOG_H +#define __SCP_WATCHDOG_H + +#include "watchdog.h" + +void disable_watchdog(void); +void enable_watchdog(void); + +#endif /* __SCP_WATCHDOG_H */ diff --git a/chip/mt_scp/rv32i_common/watchdog.c b/chip/mt_scp/rv32i_common/watchdog.c index 72ca5edad8..05acf6ea29 100644 --- a/chip/mt_scp/rv32i_common/watchdog.c +++ b/chip/mt_scp/rv32i_common/watchdog.c @@ -8,6 +8,7 @@ #include "common.h" #include "hooks.h" #include "registers.h" +#include "scp_watchdog.h" #include "watchdog.h" void watchdog_reload(void) @@ -16,7 +17,15 @@ void watchdog_reload(void) } DECLARE_HOOK(HOOK_TICK, watchdog_reload, HOOK_PRIO_DEFAULT); -int watchdog_init(void) +void disable_watchdog(void) +{ + /* disable watchdog */ + SCP_CORE0_WDT_CFG &= ~WDT_EN; + /* clear watchdog irq */ + SCP_CORE0_WDT_IRQ |= BIT(0); +} + +void enable_watchdog(void) { const uint32_t timeout = WDT_PERIOD(CONFIG_WATCHDOG_PERIOD_MS); @@ -28,6 +37,11 @@ int watchdog_init(void) SCP_CORE0_WDT_CFG = WDT_EN | timeout; /* reload watchdog */ watchdog_reload(); +} + +int watchdog_init(void) +{ + enable_watchdog(); return EC_SUCCESS; } |