diff options
author | Dawid Niedzwiecki <dn@semihalf.com> | 2021-10-28 12:01:41 +0200 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-04 22:40:55 +0000 |
commit | 1601c2de593b6ffd0618bfab6dcfafe3e60f2b7e (patch) | |
tree | 30f9de64d8e2e9e053ba6151d850bf0c622a453a | |
parent | b0845912df80f10da75aba1b990194f7cdc19946 (diff) | |
download | chrome-ec-1601c2de593b6ffd0618bfab6dcfafe3e60f2b7e.tar.gz |
zephyr: move ppc_chips definition to a separated file
Create a sparated ppc.c file in the shim layer to define the ppc_chip
array. It allows declaring different types of chips in the array.
Also, move common properties of the ppc dts node to a new file
"ppc-chip.yaml".
BUG=b:194432779
TEST=zmake testall & Make sure PD works on Herobrine
BRANCH=main
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Change-Id: I0a55b3ab8898fd46f9acc1cb0a58e68a62381be7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3250687
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
Reviewed-by: Yuval Peress <peress@google.com>
-rw-r--r-- | zephyr/dts/bindings/usbc/ppc-chip.yaml | 22 | ||||
-rw-r--r-- | zephyr/dts/bindings/usbc/ti,sn5s330.yaml | 17 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/ppc.h | 14 | ||||
-rw-r--r-- | zephyr/shim/include/usbc/ppc_sn5s330.h | 15 | ||||
-rw-r--r-- | zephyr/shim/src/CMakeLists.txt | 2 | ||||
-rw-r--r-- | zephyr/shim/src/ppc.c | 26 | ||||
-rw-r--r-- | zephyr/shim/src/ppc_sn5s330.c | 33 |
7 files changed, 80 insertions, 49 deletions
diff --git a/zephyr/dts/bindings/usbc/ppc-chip.yaml b/zephyr/dts/bindings/usbc/ppc-chip.yaml new file mode 100644 index 0000000000..389b4eafe2 --- /dev/null +++ b/zephyr/dts/bindings/usbc/ppc-chip.yaml @@ -0,0 +1,22 @@ +# Copyright (c) 2021 The Chromium OS Authors +# SPDX-License-Identifier: Apache-2.0 + +description: Power path chip + +properties: + port: + type: phandle + required: true + description: | + I2C port used to communicate with controller + + irq: + type: phandles + required: false + description: | + GPIO interrupt from PPC + + i2c-addr-flags: + type: string + description: | + I2C address of controller diff --git a/zephyr/dts/bindings/usbc/ti,sn5s330.yaml b/zephyr/dts/bindings/usbc/ti,sn5s330.yaml index 3ca566c07a..664f888805 100644 --- a/zephyr/dts/bindings/usbc/ti,sn5s330.yaml +++ b/zephyr/dts/bindings/usbc/ti,sn5s330.yaml @@ -2,26 +2,13 @@ description: USBC PPC compatible: "ti,sn5s330" -properties: - port: - type: phandle - required: true - description: | - I2C port used to communicate with controller - - irq: - type: phandles - required: false - description: | - GPIO interrupt from PPC +include: ppc-chip.yaml +properties: i2c-addr-flags: - type: string default: "SN5S330_ADDR0_FLAGS" enum: - "SN5S330_ADDR0_FLAGS" - "SN5S330_ADDR1_FLAGS" - "SN5S330_ADDR2_FLAGS" - "SN5S330_ADDR3_FLAGS" - description: | - I2C address of controller diff --git a/zephyr/shim/include/usbc/ppc.h b/zephyr/shim/include/usbc/ppc.h new file mode 100644 index 0000000000..a52b0cafa1 --- /dev/null +++ b/zephyr/shim/include/usbc/ppc.h @@ -0,0 +1,14 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#ifndef ZEPHYR_CHROME_USBC_PPC_H +#define ZEPHYR_CHROME_USBC_PPC_H + +#include <device.h> +#include <devicetree.h> + +#define PPC_USBC_PORT(id) DT_REG_ADDR(DT_PARENT(id)) + +#endif /* ZEPHYR_CHROME_USBC_PPC_H */ diff --git a/zephyr/shim/include/usbc/ppc_sn5s330.h b/zephyr/shim/include/usbc/ppc_sn5s330.h new file mode 100644 index 0000000000..1c48777107 --- /dev/null +++ b/zephyr/shim/include/usbc/ppc_sn5s330.h @@ -0,0 +1,15 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "ppc/sn5s330_public.h" + +#define SN5S330_COMPAT ti_sn5s330 + +#define PPC_CHIP_SN5S330(id) \ + { \ + .i2c_port = I2C_PORT(DT_PHANDLE(id, port)), \ + .i2c_addr_flags = DT_STRING_UPPER_TOKEN(id, i2c_addr_flags), \ + .drv = &sn5s330_drv \ + }, diff --git a/zephyr/shim/src/CMakeLists.txt b/zephyr/shim/src/CMakeLists.txt index 92894630bc..f5bc08ebbb 100644 --- a/zephyr/shim/src/CMakeLists.txt +++ b/zephyr/shim/src/CMakeLists.txt @@ -49,4 +49,4 @@ zephyr_library_sources_ifdef(CONFIG_SHIMMED_TASKS tasks.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_WATCHDOG watchdog.c) zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_BC12_DETECT_PI3USB9201 bc12_pi3usb9201.c) -zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC_SN5S330 ppc_sn5s330.c) +zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC_PPC ppc.c) diff --git a/zephyr/shim/src/ppc.c b/zephyr/shim/src/ppc.c new file mode 100644 index 0000000000..3861921d29 --- /dev/null +++ b/zephyr/shim/src/ppc.c @@ -0,0 +1,26 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include <devicetree.h> +#include "usbc_ppc.h" +#include "usbc/ppc_sn5s330.h" +#include "usbc/ppc.h" + +#if DT_HAS_COMPAT_STATUS_OKAY(SN5S330_COMPAT) + +#define PPC_CHIP_PRIM(id, fn) \ + COND_CODE_1(DT_NODE_HAS_PROP(id, alternate_for), (), \ + (PPC_CHIP_ELE_PRIM(id, fn))) + +#define PPC_CHIP_ELE_PRIM(id, fn) [PPC_USBC_PORT(id)] = fn(id) + +/* Power Path Controller */ +struct ppc_config_t ppc_chips[] = { + DT_FOREACH_STATUS_OKAY_VARGS(SN5S330_COMPAT, PPC_CHIP_PRIM, + PPC_CHIP_SN5S330) +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +#endif /* #if DT_HAS_COMPAT_STATUS_OKAY */ diff --git a/zephyr/shim/src/ppc_sn5s330.c b/zephyr/shim/src/ppc_sn5s330.c deleted file mode 100644 index 7bc11ec4ad..0000000000 --- a/zephyr/shim/src/ppc_sn5s330.c +++ /dev/null @@ -1,33 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#define DT_DRV_COMPAT ti_sn5s330 - -#include <devicetree.h> -#include "ppc/sn5s330_public.h" -#include "usb_pd.h" -#include "usbc_ocp.h" -#include "usbc_ppc.h" - -#if DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) - -BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) > 0, - "No compatible PPC instance found"); - -#define USBC_PORT_PPC(inst) \ - [DT_REG_ADDR(DT_PARENT(DT_DRV_INST(inst)))] = { \ - .i2c_port = I2C_PORT(DT_PHANDLE(DT_DRV_INST(inst), port)), \ - .i2c_addr_flags = DT_STRING_UPPER_TOKEN( \ - DT_DRV_INST(inst), i2c_addr_flags), \ - .drv = &sn5s330_drv \ - }, - -/* Power Path Controller */ -struct ppc_config_t ppc_chips[] = { - DT_INST_FOREACH_STATUS_OKAY(USBC_PORT_PPC) -}; -unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); - -#endif /* DT_HAS_COMPAT_STATUS_OKAY(DT_DRV_COMPAT) */ |