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authorDavid Huang <david.huang@quanta.corp-partner.google.com>2021-10-26 15:29:40 +0800
committerCommit Bot <commit-bot@chromium.org>2021-11-06 00:47:12 +0000
commitd06e4260b7912ab37d126458bf621f77ffdb11c1 (patch)
tree662c0baa9249ecf32f7c7619732d9337dbe1b556
parente1d5982202bebb794d8bd28833efb0b31642744f (diff)
downloadchrome-ec-d06e4260b7912ab37d126458bf621f77ffdb11c1.tar.gz
brask: Modify bbr fw address
Modify BBR FW address to 0x58/0x59. BUG=b:204288364 BRANCH=main TEST=Insert USB device to C0/C1, system can get device. Signed-off-by: David Huang <david.huang@quanta.corp-partner.google.com> Change-Id: Ibac367e80d1c5cec6b33626d805355d91c292845 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3256729 Reviewed-by: Boris Mittelberg <bmbm@google.com> Commit-Queue: Boris Mittelberg <bmbm@google.com>
-rw-r--r--board/brask/board.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/board/brask/board.h b/board/brask/board.h
index 120c2a574a..e944f28527 100644
--- a/board/brask/board.h
+++ b/board/brask/board.h
@@ -114,11 +114,8 @@
#define I2C_ADDR_MP2964_FLAGS 0x20
-/*
- * see b/174768555#comment22
- */
-#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x56
-#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x57
+#define USBC_PORT_C0_BB_RETIMER_I2C_ADDR 0x58
+#define USBC_PORT_C2_BB_RETIMER_I2C_ADDR 0x59
/* Enabling Thunderbolt-compatible mode */
#define CONFIG_USB_PD_TBT_COMPAT_MODE