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authorMary Ruthven <mruthven@chromium.org>2021-11-04 00:31:56 -0500
committerCommit Bot <commit-bot@chromium.org>2021-11-10 23:32:50 +0000
commite1312234bd8534983e6d268b6ea624be0ef2ce9f (patch)
tree9d4411f4eeaf049ecf5199df586c8d9435c83dbc
parentac9fd1a3d0332cad93446c5750b67122d4cf559d (diff)
downloadchrome-ec-e1312234bd8534983e6d268b6ea624be0ef2ce9f.tar.gz
remove power code
Nothing in the platform/cr50 uses power code. Remove it. BUG=b:200823466 TEST=make buildall -j Change-Id: Ic6ef286632fd997de93170485a16b9d5f8a72d37 Signed-off-by: Mary Ruthven <mruthven@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3273180 Reviewed-by: Vadim Sukhomlinov <sukhomlinov@chromium.org>
-rw-r--r--Makefile4
-rw-r--r--power/apollolake.c183
-rw-r--r--power/apollolake.h52
-rw-r--r--power/braswell.c321
-rw-r--r--power/build.mk24
-rw-r--r--power/cannonlake.c139
-rw-r--r--power/cannonlake.h30
-rw-r--r--power/cometlake-discrete.c214
-rw-r--r--power/cometlake-discrete.h60
-rw-r--r--power/cometlake.c189
-rw-r--r--power/cometlake.h42
-rw-r--r--power/common.c934
-rw-r--r--power/ec_driven.c55
-rw-r--r--power/host_sleep.c79
-rw-r--r--power/intel_x86.c745
-rw-r--r--power/intel_x86.h65
-rw-r--r--power/mt817x.c815
-rw-r--r--power/mt8183.c486
-rw-r--r--power/rk3288.c574
-rw-r--r--power/rk3399.c607
-rw-r--r--power/sc7180.c880
-rw-r--r--power/sdm845.c879
-rw-r--r--power/skylake.c193
-rw-r--r--power/skylake.h57
-rw-r--r--power/stoney.c286
25 files changed, 1 insertions, 7912 deletions
diff --git a/Makefile b/Makefile
index df2932b767..c5c43722b1 100644
--- a/Makefile
+++ b/Makefile
@@ -264,7 +264,6 @@ include core/$(CORE)/build.mk
include common/build.mk
include driver/build.mk
include fuzz/build.mk
-include power/build.mk
-include private/build.mk
ifneq ($(PDIR),)
include $(PDIR)/build.mk
@@ -296,7 +295,6 @@ all-obj-$(1)+=$(call objs_from_dir_p,$(PBDIR),board-private,$(1))
endif
all-obj-$(1)+=$(call objs_from_dir_p,common,common,$(1))
all-obj-$(1)+=$(call objs_from_dir_p,driver,driver,$(1))
-all-obj-$(1)+=$(call objs_from_dir_p,power,power,$(1))
ifdef CTS_MODULE
all-obj-$(1)+=$(call objs_from_dir_p,cts,cts,$(1))
endif
@@ -311,7 +309,7 @@ endef
$(eval $(call get_sources,y))
$(eval $(call get_sources,ro))
-dirs=core/$(CORE) chip/$(CHIP) $(BASEDIR) $(BDIR) common fuzz power test \
+dirs=core/$(CORE) chip/$(CHIP) $(BASEDIR) $(BDIR) common fuzz test \
cts/common cts/$(CTS_MODULE) $(out)/gen
dirs+= private $(PDIR) $(PBDIR)
dirs+=$(shell find common -type d)
diff --git a/power/apollolake.c b/power/apollolake.c
deleted file mode 100644
index 36c78c8158..0000000000
--- a/power/apollolake.c
+++ /dev/null
@@ -1,183 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Apollolake chipset power control module for Chrome EC */
-
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "intel_x86.h"
-#include "task.h"
-#include "timer.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/*
- * force_shutdown is used to maintain chipset shutdown request. This request
- * needs to be handled from within the chipset task.
- */
-static int force_shutdown;
-
-/* Power signals list. Must match order of enum power_signal. */
-const struct power_signal_info power_signal_list[] = {
-#ifdef CONFIG_POWER_S0IX
- [X86_SLP_S0_N] = {
- GPIO_PCH_SLP_S0_L,
- POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
- "SLP_S0_DEASSERTED",
- },
-#endif
- [X86_SLP_S3_N] = {
- GPIO_PCH_SLP_S3_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S3_DEASSERTED",
- },
- [X86_SLP_S4_N] = {
- GPIO_PCH_SLP_S4_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S4_DEASSERTED",
- },
- [X86_SUSPWRDNACK] = {
- GPIO_SUSPWRDNACK,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SUSPWRDNACK_DEASSERTED",
- },
- [X86_ALL_SYS_PG] = {
- GPIO_ALL_SYS_PGOOD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "ALL_SYS_PGOOD",
- },
- [X86_RSMRST_N] = {
- GPIO_RSMRST_L_PGOOD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "RSMRST_L",
- },
- [X86_PGOOD_PP3300] = {
- GPIO_PP3300_PG,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP3300_PG",
- },
- [X86_PGOOD_PP5000] = {
- GPIO_PP5000_PG,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP5000_PG",
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
-
-__attribute__((weak)) void chipset_do_shutdown(void)
-{
- /* Need to implement board specific shutdown */
-}
-
-static void internal_chipset_shutdown(void)
-{
- /*
- * UART buffer gets overwritten by other tasks if it is not explicitly
- * flushed before printing it on the console by same task. Hence, clean
- * up the UART buffer so that all the debug messages are printed on the
- * UART console before doing shutdown.
- */
- cflush();
-
- CPRINTS("%s()", __func__);
-
- force_shutdown = 0;
- chipset_do_shutdown();
-}
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s: %d", __func__, reason);
- report_ap_reset(reason);
-
- /*
- * This function is called from multiple tasks and hence it is racy! But
- * since things are going down hard, it does not matter if some task
- * misses out.
- */
- force_shutdown = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-
-enum power_state chipset_force_g3(void)
-{
- chipset_force_shutdown(CHIPSET_SHUTDOWN_G3);
-
- return POWER_G3;
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
-}
-
-static void handle_all_sys_pgood(enum power_state state)
-{
- /*
- * Pass through asynchronously, as SOC may not react
- * immediately to power changes.
- */
- int in_level = gpio_get_level(GPIO_ALL_SYS_PGOOD);
- int out_level = gpio_get_level(GPIO_PCH_SYS_PWROK);
-
- /* Nothing to do. */
- if (in_level == out_level)
- return;
-
- gpio_set_level(GPIO_PCH_SYS_PWROK, in_level);
-
- CPRINTS("Pass through GPIO_ALL_SYS_PGOOD: %d", in_level);
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- enum power_state new_state;
-
- /* Process ALL_SYS_PGOOD state changes. */
- handle_all_sys_pgood(state);
-
- if (state == POWER_S5 && !power_has_signals(IN_PGOOD_ALL_CORE)) {
- /* Required rail went away */
- internal_chipset_shutdown();
-
- new_state = POWER_S5G3;
- goto rsmrst_handle;
-
- }
-
- /* If force shutdown is requested, perform that. */
- if (force_shutdown)
- internal_chipset_shutdown();
-
- new_state = common_intel_x86_power_handle_state(state);
-
-rsmrst_handle:
-
- /*
- * Process RSMRST_L state changes:
- * RSMRST_L de-assertion is passed to SoC only on G3S5 to S5 transition.
- * RSMRST_L is also checked in some states and, if asserted, will
- * force shutdown.
- */
- common_intel_x86_handle_rsmrst(new_state);
-
- return new_state;
-}
-
-/**
- * chipset check if PLTRST# is valid.
- *
- * @return non-zero if PLTRST# is valid, 0 if invalid.
- */
-int chipset_pltrst_is_valid(void)
-{
- /*
- * Invalid PLTRST# from SOC unless RSMRST#
- * from PMIC through EC to soc is deasserted.
- */
- return (gpio_get_level(GPIO_RSMRST_L_PGOOD) &&
- gpio_get_level(GPIO_PCH_RSMRST_L));
-}
diff --git a/power/apollolake.h b/power/apollolake.h
deleted file mode 100644
index cc864f26c3..0000000000
--- a/power/apollolake.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Apollolake chipset power control module for Chrome EC */
-
-#ifndef __CROS_EC_APOLLOLAKE_H
-#define __CROS_EC_APOLLOLAKE_H
-
-/*
- * Input state flags.
- * TODO: Normalize the power signal masks from board defines to SoC headers.
- */
-#define IN_RSMRST_N POWER_SIGNAL_MASK(X86_RSMRST_N)
-#define IN_ALL_SYS_PG POWER_SIGNAL_MASK(X86_ALL_SYS_PG)
-#define IN_SLP_S3_N POWER_SIGNAL_MASK(X86_SLP_S3_N)
-#define IN_SLP_S4_N POWER_SIGNAL_MASK(X86_SLP_S4_N)
-#define IN_PCH_SLP_S4_DEASSERTED IN_SLP_S4_N
-#define IN_SUSPWRDNACK POWER_SIGNAL_MASK(X86_SUSPWRDNACK)
-#define IN_SUS_STAT_N POWER_SIGNAL_MASK(X86_SUS_STAT_N)
-
-#define IN_ALL_PM_SLP_DEASSERTED (IN_SLP_S3_N | \
- IN_SLP_S4_N)
-
-#define IN_PGOOD_ALL_CORE (IN_RSMRST_N)
-
-#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED)
-
-#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PGOOD_ALL_CORE
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-enum power_signal {
-#ifdef CONFIG_POWER_S0IX
- X86_SLP_S0_N, /* PCH -> SLP_S0_L */
-#endif
- X86_SLP_S3_N, /* PCH -> SLP_S3_L */
- X86_SLP_S4_N, /* PCH -> SLP_S4_L */
- X86_SUSPWRDNACK, /* PCH -> SUSPWRDNACK */
-
- X86_ALL_SYS_PG, /* PMIC -> PMIC_EC_PWROK_OD */
- X86_RSMRST_N, /* PMIC -> PMIC_EC_RSMRST_ODL */
- X86_PGOOD_PP3300, /* PMIC -> PP3300_PG_OD */
- X86_PGOOD_PP5000, /* PMIC -> PP5000_PG_OD */
-
- /* Number of X86 signals */
- POWER_SIGNAL_COUNT
-};
-
-#endif /* __CROS_EC_APOLLOLAKE_H */
diff --git a/power/braswell.c b/power/braswell.c
deleted file mode 100644
index eac3c63534..0000000000
--- a/power/braswell.c
+++ /dev/null
@@ -1,321 +0,0 @@
-/* Copyright 2014 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* X86 braswell chipset power control module for Chrome EC */
-
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "lpc.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "timer.h"
-#include "usb_charge.h"
-#include "util.h"
-#include "wireless.h"
-#include "registers.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Input state flags */
-#define IN_RSMRST_L_PWRGD POWER_SIGNAL_MASK(X86_RSMRST_L_PWRGD)
-#define IN_ALL_SYS_PWRGD POWER_SIGNAL_MASK(X86_ALL_SYS_PWRGD)
-#define IN_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-
-/* All always-on supplies */
-#define IN_PGOOD_ALWAYS_ON (IN_RSMRST_L_PWRGD)
-/* All non-core power rails */
-#define IN_PGOOD_ALL_NONCORE (IN_ALL_SYS_PWRGD)
-/* All core power rails */
-#define IN_PGOOD_ALL_CORE (IN_ALL_SYS_PWRGD)
-/* Rails required for S5 */
-#define IN_PGOOD_S5 (IN_PGOOD_ALWAYS_ON)
-/* Rails required for S3 */
-#define IN_PGOOD_S3 (IN_PGOOD_ALWAYS_ON)
-/* Rails required for S0 */
-#define IN_PGOOD_S0 (IN_PGOOD_ALWAYS_ON | IN_PGOOD_ALL_NONCORE)
-
-/* All PM_SLP signals from PCH deasserted */
-#define IN_ALL_PM_SLP_DEASSERTED (IN_SLP_S3_DEASSERTED | IN_SLP_S4_DEASSERTED)
-/* All inputs in the right state for S0 */
-#define IN_ALL_S0 (IN_PGOOD_S0 | IN_ALL_PM_SLP_DEASSERTED)
-
-static int throttle_cpu; /* Throttle CPU? */
-static int forcing_shutdown; /* Forced shutdown in progress? */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /*
- * Force power off. This condition will reset once the state machine
- * transitions to G3.
- */
-#ifndef CONFIG_PMIC
- gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
-#endif
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
- forcing_shutdown = 1;
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- CPRINTS("%s: %d", __func__, reason);
- report_ap_reset(reason);
-
- /*
- * Send a reset pulse to the PCH. This just causes it to
- * assert INIT# to the CPU without dropping power or asserting
- * PLTRST# to reset the rest of the system. The PCH uses a 16
- * ms debounce time, so assert the signal for twice that.
- */
- gpio_set_level(GPIO_PCH_RCIN_L, 0);
- usleep(32 * MSEC);
- gpio_set_level(GPIO_PCH_RCIN_L, 1);
-}
-
-void chipset_throttle_cpu(int throttle)
-{
-#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW
- throttle = !throttle;
-#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */
- if (chipset_in_state(CHIPSET_STATE_ON))
- gpio_set_level(GPIO_CPU_PROCHOT, throttle);
-}
-
-enum power_state power_chipset_init(void)
-{
- /* Pause in S5 when shutting down. */
- power_set_pause_in_s5(1);
-
- /*
- * If we're switching between images without rebooting, see if the x86
- * is already powered on; if so, leave it there instead of cycling
- * through G3.
- */
- if (system_jumped_to_this_image()) {
- if ((power_get_signals() & IN_PGOOD_S0) == IN_PGOOD_S0) {
- /* Disable idle task deep sleep when in S0. */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- CPRINTS("already in S0");
- return POWER_S0;
- } else {
- /* Force all signals to their G3 states */
- CPRINTS("forcing G3");
- gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-
- /*wireless_set_state(WIRELESS_OFF);*/
- }
- }
-
- return POWER_G3;
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- switch (state) {
- case POWER_G3:
- break;
-
- case POWER_G3S5:
- /* Exit SOC G3 */
-#ifdef CONFIG_PMIC
- gpio_set_level(GPIO_PCH_SYS_PWROK, 1);
-#else
- gpio_set_level(GPIO_SUSPWRDNACK_SOC_EC, 0);
-#endif
- CPRINTS("Exit SOC G3");
-
- if (power_wait_signals(IN_PGOOD_S5)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
- return POWER_G3;
- }
-
- /* Deassert RSMRST# */
- gpio_set_level(GPIO_PCH_RSMRST_L, 1);
- return POWER_S5;
-
- case POWER_S5:
- /* Check for SLP S4 */
- if (gpio_get_level(GPIO_PCH_SLP_S4_L) == 1)
- return POWER_S5S3; /* Power up to next state */
- break;
-
- case POWER_S5S3:
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- return POWER_S3;
-
-
- case POWER_S3:
-
- /* Check for state transitions */
- if (!power_has_signals(IN_PGOOD_S3)) {
- /* Required rail went away */
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S3S5;
- } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
- /* Power up to next state */
- return POWER_S3S0;
- } else if (gpio_get_level(GPIO_PCH_SLP_S4_L) == 0) {
- /* Power down to next state */
- return POWER_S3S5;
- }
- break;
-
- case POWER_S3S0:
- /* Enable wireless */
-
- /*wireless_set_state(WIRELESS_ON);*/
-
- if (!power_has_signals(IN_PGOOD_S3)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
-
- /*wireless_set_state(WIRELESS_OFF);*/
- return POWER_S3S5;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_RESUME);
-
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- /*
- * Wait 15 ms after all voltages good. 100 ms is only needed
- * for PCIe devices; mini-PCIe devices should need only 10 ms.
- */
- msleep(15);
-
- /*
- * Throttle CPU if necessary. This should only be asserted
- * when +VCCP is powered (it is by now).
- */
-#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW
- gpio_set_level(GPIO_CPU_PROCHOT, !throttle_cpu);
-#else
- gpio_set_level(GPIO_CPU_PROCHOT, throttle_cpu);
-#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */
-
- /* Set SYS and CORE PWROK */
- gpio_set_level(GPIO_PCH_SYS_PWROK, 1);
-
- return POWER_S0;
-
-
- case POWER_S0:
-
- if (!power_has_signals(IN_PGOOD_ALWAYS_ON)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S0S3;
- }
-
- if (!power_has_signals(IN_ALL_S0)) {
- return POWER_S0S3;
- }
-
- break;
- case POWER_S0S3:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SUSPEND);
-
-#ifndef CONFIG_PMIC
- /* Clear SYS and CORE PWROK */
- gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
-#endif
- /* Wait 40ns */
- udelay(1);
-
- /* Suspend wireless */
-
- /*wireless_set_state(WIRELESS_SUSPEND);*/
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S3 or lower.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
-
- /*
- * Deassert prochot since CPU is off and we're about to drop
- * +VCCP.
- */
- gpio_set_level(GPIO_CPU_PROCHOT, 0);
-
- return POWER_S3;
-
- case POWER_S3S5:
-
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- /*wireless_set_state(WIRELESS_OFF);*/
-
- /* Start shutting down */
- return power_get_pause_in_s5() ? POWER_S5 : POWER_S5G3;
-
- case POWER_S5G3:
- /*
- * in case shutdown is already done by apshutdown
- * (or chipset_force_shutdown()), SOC already lost
- * power and can't assert PMC_SUSPWRDNACK any more.
- */
- if (forcing_shutdown) {
- /* Config pins for SOC G3 */
- gpio_config_module(MODULE_GPIO, 1);
-#ifndef CONFIG_PMIC
- gpio_set_level(GPIO_SUSPWRDNACK_SOC_EC, 1);
-#else
- gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
-#endif
-
- forcing_shutdown = 0;
-
- CPRINTS("Enter SOC G3");
-
- return POWER_G3;
- }
-
- if (gpio_get_level(GPIO_PCH_SUSPWRDNACK) == 1) {
- /* Assert RSMRST# */
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-
- /* Config pins for SOC G3 */
- gpio_config_module(MODULE_GPIO, 1);
-
- /* Enter SOC G3 */
-#ifdef CONFIG_PMIC
- gpio_set_level(GPIO_PCH_SYS_PWROK, 0);
- udelay(1);
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-#else
- gpio_set_level(GPIO_SUSPWRDNACK_SOC_EC, 1);
-#endif
- CPRINTS("Enter SOC G3");
-
- return POWER_G3;
- } else {
- CPRINTS("waiting for PMC_SUSPWRDNACK to assert!");
- return POWER_S5;
- }
- }
- return state;
-}
diff --git a/power/build.mk b/power/build.mk
deleted file mode 100644
index dead138af9..0000000000
--- a/power/build.mk
+++ /dev/null
@@ -1,24 +0,0 @@
-# -*- makefile -*-
-# Copyright 2013 The Chromium OS Authors. All rights reserved.
-# Use of this source code is governed by a BSD-style license that can be
-# found in the LICENSE file.
-#
-# Power management for application processor and peripherals
-#
-
-power-$(CONFIG_CHIPSET_APL_GLK)+=apollolake.o intel_x86.o
-power-$(CONFIG_CHIPSET_BRASWELL)+=braswell.o
-power-$(CONFIG_CHIPSET_CANNONLAKE)+=cannonlake.o intel_x86.o
-power-$(CONFIG_CHIPSET_COMETLAKE)+=cometlake.o intel_x86.o
-power-$(CONFIG_CHIPSET_COMETLAKE_DISCRETE)+=cometlake-discrete.o intel_x86.o
-power-$(CONFIG_CHIPSET_ECDRIVEN)+=ec_driven.o
-power-$(CONFIG_CHIPSET_MT817X)+=mt817x.o
-power-$(CONFIG_CHIPSET_MT8183)+=mt8183.o
-power-$(CONFIG_CHIPSET_RK3288)+=rk3288.o
-power-$(CONFIG_CHIPSET_RK3399)+=rk3399.o
-power-$(CONFIG_CHIPSET_SC7180)+=sc7180.o
-power-$(CONFIG_CHIPSET_SDM845)+=sdm845.o
-power-$(CONFIG_CHIPSET_SKYLAKE)+=skylake.o intel_x86.o
-power-$(CONFIG_CHIPSET_STONEY)+=stoney.o
-power-$(CONFIG_POWER_COMMON)+=common.o
-power-$(CONFIG_POWER_TRACK_HOST_SLEEP_STATE)+=host_sleep.o
diff --git a/power/cannonlake.c b/power/cannonlake.c
deleted file mode 100644
index 1822b1d3c2..0000000000
--- a/power/cannonlake.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Cannonlake chipset power control module for Chrome EC */
-
-#include "cannonlake.h"
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "intel_x86.h"
-#include "power.h"
-#include "power_button.h"
-#include "task.h"
-#include "timer.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-static int forcing_shutdown; /* Forced shutdown in progress? */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
-
- /*
- * Force off. Sending a reset command to the PMIC will power off
- * the EC, so simulate a long power button press instead. This
- * condition will reset once the state machine transitions to G3.
- * Consider reducing the latency here by changing the power off
- * hold time on the PMIC.
- */
- if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
- report_ap_reset(reason);
- forcing_shutdown = 1;
- power_button_pch_press();
- }
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
- /*
- * If eSPI_Reset# pin is asserted without SLP_SUS# being asserted, then
- * it means that there is an unexpected power loss (global reset
- * event). In this case, check if shutdown was being forced by pressing
- * power button. If yes, release power button.
- */
- if ((power_get_signals() & IN_PCH_SLP_SUS_DEASSERTED) &&
- forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-}
-
-enum power_state chipset_force_g3(void)
-{
- int timeout = 50;
- chipset_force_shutdown(CHIPSET_SHUTDOWN_G3);
-
- /* Turn off DSW load switch. */
- gpio_set_level(GPIO_EN_PP3300_DSW, 0);
-
- /* Now wait for DSW_PWROK to go away. */
- while (gpio_get_level(GPIO_PMIC_DPWROK) && (timeout > 0)) {
- msleep(1);
- timeout--;
- };
-
- if (!timeout)
- CPRINTS("DSW_PWROK didn't go low! Assuming G3.");
-
- return POWER_G3;
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- enum power_state new_state;
- int dswpwrok_in = gpio_get_level(GPIO_PMIC_DPWROK);
- static int dswpwrok_out = -1;
-
- /* Pass-through DSW_PWROK to CNL. */
- if (dswpwrok_in != dswpwrok_out) {
- CPRINTS("Pass thru GPIO_DSW_PWROK: %d", dswpwrok_in);
- gpio_set_level(GPIO_PCH_DSW_PWROK, dswpwrok_in);
- dswpwrok_out = dswpwrok_in;
- }
-
- common_intel_x86_handle_rsmrst(state);
-
- if (state == POWER_S5 && forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-
- switch (state) {
- case POWER_G3:
- /* If SLP_SUS_L is deasserted, we're no longer in G3. */
- if (power_has_signals(IN_PCH_SLP_SUS_DEASSERTED))
- return POWER_S5;
- break;
-
- case POWER_G3S5:
- /* Turn on the PP3300_DSW rail. */
- gpio_set_level(GPIO_EN_PP3300_DSW, 1);
- if (power_wait_signals(IN_PGOOD_ALL_CORE))
- break;
-
- /* Pass thru DSWPWROK again since we changed it. */
- dswpwrok_in = gpio_get_level(GPIO_PMIC_DPWROK);
- gpio_set_level(GPIO_PCH_DSW_PWROK, dswpwrok_in);
- CPRINTS("Pass thru GPIO_DSW_PWROK: %d", dswpwrok_in);
- dswpwrok_out = dswpwrok_in;
-
- /* Enable the 5V rail. */
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 1);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 1);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
- break;
-
- case POWER_S5G3:
- /* Turn off the 5V rail. */
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 0);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 0);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
- break;
-
- default:
- break;
- };
-
- new_state = common_intel_x86_power_handle_state(state);
-
- return new_state;
-}
diff --git a/power/cannonlake.h b/power/cannonlake.h
deleted file mode 100644
index a056a96ec8..0000000000
--- a/power/cannonlake.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Cannonlake chipset power control module for Chrome EC */
-
-#ifndef __CROS_EC_CANNONLAKE_H
-#define __CROS_EC_CANNONLAKE_H
-
-/* Input state flags. */
-#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
-
-#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \
- IN_PCH_SLP_S4_DEASSERTED | \
- IN_PCH_SLP_SUS_DEASSERTED)
-
-#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_PMIC_DPWROK)
-
-#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \
- PP5000_PGOOD_POWER_SIGNAL_MASK)
-
-#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-#endif /* __CROS_EC_CANNONLAKE_H */
diff --git a/power/cometlake-discrete.c b/power/cometlake-discrete.c
deleted file mode 100644
index 3b5d7575ac..0000000000
--- a/power/cometlake-discrete.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Chrome EC chipset power control for Cometlake with platform-controlled
- * discrete sequencing.
- */
-
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "intel_x86.h"
-#include "power.h"
-#include "power_button.h"
-#include "task.h"
-#include "timer.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Power signals list. Must match order of enum power_signal. */
-const struct power_signal_info power_signal_list[] = {
- [PP5000_A_PGOOD] = {
- GPIO_PG_PP5000_A_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP5000_A_PGOOD",
- },
- [PP1800_A_PGOOD] = {
- GPIO_PG_PP1800_A_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP1800_A_PGOOD",
- },
- [VPRIM_CORE_A_PGOOD] = {
- GPIO_PG_VPRIM_CORE_A_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "VPRIM_CORE_A_PGOOD",
- },
- [PP1050_A_PGOOD] = {
- GPIO_PG_PP1050_A_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP1050_A_PGOOD",
- },
- [X86_SLP_S4_DEASSERTED] = {
- SLP_S4_SIGNAL_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S4_DEASSERTED",
- },
- [PP2500_DRAM_PGOOD] = {
- GPIO_PG_PP2500_DRAM_U_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP2500_DRAM_PGOOD",
- },
- [PP1200_DRAM_PGOOD] = {
- GPIO_PG_PP1200_U_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP1200_DRAM_PGOOD",
- },
- [X86_SLP_S3_DEASSERTED] = {
- SLP_S3_SIGNAL_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S3_DEASSERTED",
- },
- [PP950_VCCIO_PGOOD] = {
- GPIO_PG_PP950_VCCIO_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PP950_VCCIO_PGOOD",
- },
- [X86_SLP_S0_DEASSERTED] = {
- GPIO_PCH_SLP_S0_L,
- POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
- "SLP_S0_DEASSERTED",
- },
- [CPU_C10_GATE_DEASSERTED] = {
- GPIO_CPU_C10_GATE_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "CPU_C10_GATE_DEASSERTED",
- },
- [IMVP8_READY] = {
- GPIO_IMVP8_VRRDY_OD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "IMVP8_READY",
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- /* TODO(b/143188569) update from base driver */
- int timeout_ms = 50;
-
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* Turn off RSMRST_L to meet tPCH12 */
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-
- /* Turn off A (except PP5000_A) rails*/
- gpio_set_level(GPIO_EN_A_RAILS, 0);
-
-#ifdef CONFIG_POWER_PP5000_CONTROL
- /* Issue a request to turn off the rail. */
- power_5v_enable(task_get_current(), 0);
-#else
- /* Turn off PP5000_A rail */
- gpio_set_level(GPIO_EN_PP5000_A, 0);
-#endif
-
- /* Need to wait a min of 10 msec before check for power good */
- msleep(10);
-
- /* Now wait for PP5000_A and RSMRST_L to go low */
- while ((gpio_get_level(GPIO_PP5000_A_PG_OD) ||
- power_has_signals(IN_PGOOD_ALL_CORE)) && (timeout_ms > 0)) {
- msleep(1);
- timeout_ms--;
- };
-
- if (!timeout_ms)
- CPRINTS("PP5000_A rail still up! Assuming G3.");
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
- /*
- * If eSPI_Reset# pin is asserted without SLP_SUS# being asserted, then
- * it means that there is an unexpected power loss (global reset
- * event). In this case, check if shutdown was being forced by pressing
- * power button. If yes, release power button.
- */
- if ((power_get_signals() & IN_PGOOD_ALL_CORE))
- power_button_pch_release();
-}
-
-enum power_state chipset_force_g3(void)
-{
- chipset_force_shutdown(CHIPSET_SHUTDOWN_G3);
-
- return POWER_G3;
-}
-
-/* Called by APL power state machine when transitioning from G3 to S5 */
-void chipset_pre_init_callback(void)
-{
- /* TODO(b/143188569) update from base driver */
- /* Enable 5.0V and 3.3V rails, and wait for Power Good */
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 1);
-#else
- /* Turn on PP5000_A rail */
- gpio_set_level(GPIO_EN_PP5000_A, 1);
-#endif
- /* Turn on A (except PP5000_A) rails*/
- gpio_set_level(GPIO_EN_A_RAILS, 1);
-
- /*
- * The status of the 5000_A rail is verified in the calling function via
- * power_wait_signals() as PP5000_A_PGOOD is included in the
- * CHIPSET_G3S5_POWERUP_SIGNAL macro.
- */
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- /* TODO(b/143188569) update from base driver */
- int all_sys_pwrgd_in;
- int all_sys_pwrgd_out;
-
- /*
- * Check if RSMRST_L signal state has changed and if so, pass the new
- * value along to the PCH. However, if the new transition of RSMRST_L
- * from the Sielgo is from low to high, then gate this transition to the
- * AP by the PP5000_A rail. If the new transition is from high to low,
- * then pass that through regardless of the PP5000_A value.
- *
- * The PP5000_A power good signal will float high if the
- * regulator is not powered, so checking both that the EN and the PG
- * signals are high.
- */
- if ((gpio_get_level(GPIO_PP5000_A_PG_OD) &&
- gpio_get_level(GPIO_EN_PP5000_A)) ||
- gpio_get_level(GPIO_PCH_RSMRST_L))
- common_intel_x86_handle_rsmrst(state);
-
- switch (state) {
-
- case POWER_S5:
- /* If RSMRST_L is asserted, we're no longer in S5. */
- if (!power_has_signals(IN_PGOOD_ALL_CORE))
- return POWER_S5G3;
- break;
-
- case POWER_S0:
- /*
- * Check value of PG_EC_ALL_SYS_PWRGD to see if PCH_SYS_PWROK
- * needs to be changed. If it's low->high transition, requires a
- * 2msec delay.
- */
- all_sys_pwrgd_in = gpio_get_level(GPIO_PG_EC_ALL_SYS_PWRGD);
- all_sys_pwrgd_out = gpio_get_level(GPIO_PCH_SYS_PWROK);
-
- if (all_sys_pwrgd_in != all_sys_pwrgd_out) {
- if (all_sys_pwrgd_in)
- msleep(2);
- gpio_set_level(GPIO_PCH_SYS_PWROK, all_sys_pwrgd_in);
- }
- break;
-
- default:
- break;
- }
-
- return common_intel_x86_power_handle_state(state);
-}
diff --git a/power/cometlake-discrete.h b/power/cometlake-discrete.h
deleted file mode 100644
index ad423126df..0000000000
--- a/power/cometlake-discrete.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Chrome EC chipset power control for Cometlake with platform-controlled
- * discrete sequencing.
- */
-
-#ifndef __CROS_EC_COMETLAKE_DISCRETE_H
-#define __CROS_EC_COMETLATE_DISCRETE_H
-
-/* Input state flags. */
-#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-
-#define IN_ALL_PM_SLP_DEASSERTED \
- (IN_PCH_SLP_S3_DEASSERTED | IN_PCH_SLP_S4_DEASSERTED)
-
-/* TODO(b/143188569) RSMRST_L is an EC output, can't use POWER_SIGNAL_MASK */
-#define IN_PGOOD_ALL_CORE \
- POWER_SIGNAL_MASK(/*X86_RSMRST_L_PGOOD*/ POWER_SIGNAL_COUNT)
-
-#define IN_ALL_S0 \
- (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \
- PP5000_PGOOD_POWER_SIGNAL_MASK)
-
-/* TODO(b/143188569) RSMRST_L is an EC output, can't use POWER_SIGNAL_MASK */
-#define CHIPSET_G3S5_POWERUP_SIGNAL \
- (POWER_SIGNAL_MASK(/*X86_RSMRST_L_PGOOD*/ POWER_SIGNAL_COUNT) | \
- POWER_SIGNAL_MASK(PP5000_A_PGOOD))
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-/* Power signals, in power-on sequence order. */
-enum power_signal {
- PP5000_A_PGOOD,
- /* PP3300 monitoring is analog */
- PP1800_A_PGOOD,
- VPRIM_CORE_A_PGOOD,
- PP1050_A_PGOOD,
- /* S5 ready */
- X86_SLP_S4_DEASSERTED,
- PP2500_DRAM_PGOOD,
- PP1200_DRAM_PGOOD,
- /* S3 ready */
- X86_SLP_S3_DEASSERTED,
- /* PP1050 monitoring is analog */
- PP950_VCCIO_PGOOD,
- /* S0 ready */
- X86_SLP_S0_DEASSERTED,
- CPU_C10_GATE_DEASSERTED,
- IMVP8_READY,
-
- /* Number of X86 signals */
- POWER_SIGNAL_COUNT
-};
-
-#endif /* __CROS_EC_COMETLAKE_DISCRETE_H */
diff --git a/power/cometlake.c b/power/cometlake.c
deleted file mode 100644
index 4a28cd418d..0000000000
--- a/power/cometlake.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Cometlake chipset power control module for Chrome EC */
-
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "intel_x86.h"
-#include "power.h"
-#include "power_button.h"
-#include "task.h"
-#include "timer.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Power signals list. Must match order of enum power_signal. */
-const struct power_signal_info power_signal_list[] = {
- [X86_SLP_S0_DEASSERTED] = {
- .gpio = GPIO_PCH_SLP_S0_L,
- .flags = POWER_SIGNAL_ACTIVE_HIGH |
- POWER_SIGNAL_DISABLE_AT_BOOT,
- .name = "SLP_S0_DEASSERTED",
- },
- [X86_SLP_S3_DEASSERTED] = {
- .gpio = SLP_S3_SIGNAL_L,
- .flags = POWER_SIGNAL_ACTIVE_HIGH,
- .name = "SLP_S3_DEASSERTED",
- },
- [X86_SLP_S4_DEASSERTED] = {
- .gpio = SLP_S4_SIGNAL_L,
- .flags = POWER_SIGNAL_ACTIVE_HIGH,
- .name = "SLP_S4_DEASSERTED",
- },
- [X86_RSMRST_L_PGOOD] = {
- .gpio = GPIO_RSMRST_L_PGOOD,
- .flags = POWER_SIGNAL_ACTIVE_HIGH,
- .name = "RSMRST_L_PGOOD",
- },
- [X86_PP5000_A_PGOOD] = {
- .gpio = GPIO_PP5000_A_PG_OD,
- .flags = POWER_SIGNAL_ACTIVE_HIGH,
- .name = "PP5000_A_PGOOD",
- },
- [X86_ALL_SYS_PGOOD] = {
- .gpio = GPIO_PG_EC_ALL_SYS_PWRGD,
- .flags = POWER_SIGNAL_ACTIVE_HIGH,
- .name = "ALL_SYS_PWRGD",
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
-
-static int forcing_shutdown; /* Forced shutdown in progress? */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- int timeout_ms = 50;
-
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* Turn off RSMRST_L to meet tPCH12 */
- gpio_set_level(GPIO_PCH_RSMRST_L, 0);
-
- /* Turn off A (except PP5000_A) rails*/
- gpio_set_level(GPIO_EN_A_RAILS, 0);
-
-#ifdef CONFIG_POWER_PP5000_CONTROL
- /* Issue a request to turn off the rail. */
- power_5v_enable(task_get_current(), 0);
-#else
- /* Turn off PP5000_A rail */
- gpio_set_level(GPIO_EN_PP5000_A, 0);
-#endif
-
- /* Need to wait a min of 10 msec before check for power good */
- msleep(10);
-
- /* Now wait for PP5000_A and RSMRST_L to go low */
- while ((gpio_get_level(GPIO_PP5000_A_PG_OD) ||
- power_has_signals(IN_PGOOD_ALL_CORE)) && (timeout_ms > 0)) {
- msleep(1);
- timeout_ms--;
- };
-
- if (!timeout_ms)
- CPRINTS("PP5000_A rail still up! Assuming G3.");
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
- /*
- * If eSPI_Reset# pin is asserted without SLP_SUS# being asserted, then
- * it means that there is an unexpected power loss (global reset
- * event). In this case, check if shutdown was being forced by pressing
- * power button. If yes, release power button.
- */
- if ((power_get_signals() & IN_PGOOD_ALL_CORE) && forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-}
-
-enum power_state chipset_force_g3(void)
-{
- chipset_force_shutdown(CHIPSET_SHUTDOWN_G3);
-
- return POWER_G3;
-}
-
-/* Called by APL power state machine when transitioning from G3 to S5 */
-void chipset_pre_init_callback(void)
-{
- /* Enable 5.0V and 3.3V rails, and wait for Power Good */
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 1);
-#else
- /* Turn on PP5000_A rail */
- gpio_set_level(GPIO_EN_PP5000_A, 1);
-#endif
- /* Turn on A (except PP5000_A) rails*/
- gpio_set_level(GPIO_EN_A_RAILS, 1);
-
- /*
- * The status of the 5000_A rail is verifed in the calling function via
- * power_wait_signals() as PP5000_A_PGOOD is included in the
- * CHIPSET_G3S5_POWERUP_SIGNAL macro.
- */
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
-
- int all_sys_pwrgd_in;
- int all_sys_pwrgd_out;
-
- /*
- * Check if RSMRST_L signal state has changed and if so, pass the new
- * value along to the PCH. However, if the new transition of RSMRST_L
- * from the Sielgo is from low to high, then gate this transition to the
- * AP by the PP5000_A rail. If the new transition is from high to low,
- * then pass that through regardless of the PP5000_A value.
- *
- * The PP5000_A power good signal will float high if the
- * regulator is not powered, so checking both that the EN and the PG
- * signals are high.
- */
- if ((gpio_get_level(GPIO_PP5000_A_PG_OD) &&
- gpio_get_level(GPIO_EN_PP5000_A)) ||
- gpio_get_level(GPIO_PCH_RSMRST_L))
- common_intel_x86_handle_rsmrst(state);
-
- switch (state) {
-
- case POWER_S5:
- if (forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
- /* If RSMRST_L is asserted, we're no longer in S5. */
- if (!power_has_signals(IN_PGOOD_ALL_CORE))
- return POWER_S5G3;
- break;
-
- case POWER_S0:
- /*
- * Check value of PG_EC_ALL_SYS_PWRGD to see if PCH_SYS_PWROK
- * needs to be changed. If it's low->high transition, requires a
- * 2msec delay.
- */
- all_sys_pwrgd_in = gpio_get_level(GPIO_PG_EC_ALL_SYS_PWRGD);
- all_sys_pwrgd_out = gpio_get_level(GPIO_PCH_SYS_PWROK);
-
- if (all_sys_pwrgd_in != all_sys_pwrgd_out) {
- if (all_sys_pwrgd_in)
- msleep(2);
- gpio_set_level(GPIO_PCH_SYS_PWROK, all_sys_pwrgd_in);
- }
- break;
-
- default:
- break;
- }
-
- return common_intel_x86_power_handle_state(state);
-}
diff --git a/power/cometlake.h b/power/cometlake.h
deleted file mode 100644
index 261e747eeb..0000000000
--- a/power/cometlake.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Cometlake chipset power control module for Chrome EC */
-
-#ifndef __CROS_EC_COMETLAKE_H
-#define __CROS_EC_COMETLATE_H
-
-/* Input state flags. */
-#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-
-#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \
- IN_PCH_SLP_S4_DEASSERTED)
-
-#define IN_PGOOD_ALL_CORE POWER_SIGNAL_MASK(X86_RSMRST_L_PGOOD)
-
-#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED | \
- PP5000_PGOOD_POWER_SIGNAL_MASK)
-
-#define CHIPSET_G3S5_POWERUP_SIGNAL (POWER_SIGNAL_MASK(X86_RSMRST_L_PGOOD) | \
- POWER_SIGNAL_MASK(X86_PP5000_A_PGOOD))
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-/* Power signals list */
-enum power_signal {
- X86_SLP_S0_DEASSERTED,
- X86_SLP_S3_DEASSERTED,
- X86_SLP_S4_DEASSERTED,
- X86_RSMRST_L_PGOOD,
- X86_PP5000_A_PGOOD,
- X86_ALL_SYS_PGOOD,
-
- /* Number of X86 signals */
- POWER_SIGNAL_COUNT
-};
-
-#endif /* __CROS_EC_COMETLAKE_H */
diff --git a/power/common.c b/power/common.c
deleted file mode 100644
index a45bbcf2f0..0000000000
--- a/power/common.c
+++ /dev/null
@@ -1,934 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Common functionality across all chipsets */
-
-#include "battery.h"
-#include "charge_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "display_7seg.h"
-#include "espi.h"
-#include "extpower.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "host_command.h"
-#include "intel_x86.h"
-#include "lpc.h"
-#include "power.h"
-#include "system.h"
-#include "task.h"
-#include "timer.h"
-#include "util.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args)
-
-/*
- * Default timeout in us; if we've been waiting this long for an input
- * transition, just jump to the next state.
- */
-#define DEFAULT_TIMEOUT SECOND
-
-/* Timeout for dropping back from S5 to G3 */
-#define S5_INACTIVITY_TIMEOUT (10 * SECOND)
-
-static const char * const state_names[] = {
- "G3",
- "S5",
- "S3",
- "S0",
-#ifdef CONFIG_POWER_S0IX
- "S0ix",
-#endif
- "G3->S5",
- "S5->S3",
- "S3->S0",
- "S0->S3",
- "S3->S5",
- "S5->G3",
-#ifdef CONFIG_POWER_S0IX
- "S0ix->S0",
- "S0->S0ix",
-#endif
-};
-
-static uint32_t in_signals; /* Current input signal states (IN_PGOOD_*) */
-static uint32_t in_want; /* Input signal state we're waiting for */
-static uint32_t in_debug; /* Signal values which print debug output */
-
-static enum power_state state = POWER_G3; /* Current state */
-static int want_g3_exit; /* Should we exit the G3 state? */
-static uint64_t last_shutdown_time; /* When did we enter G3? */
-
-#ifdef CONFIG_HIBERNATE
-/* Delay before hibernating, in seconds */
-static uint32_t hibernate_delay = CONFIG_HIBERNATE_DELAY_SEC;
-#endif
-
-#ifdef CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
-/* Pause in S5 on shutdown? */
-static int pause_in_s5;
-#endif
-
-int power_signal_get_level(enum gpio_signal signal)
-{
- if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) {
- /* Check signal is from GPIOs or VWs */
- if (espi_signal_is_vw(signal))
- return espi_vw_get_wire(signal);
- }
- return gpio_get_level(signal);
-}
-
-int power_signal_disable_interrupt(enum gpio_signal signal)
-{
- if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) {
- /* Check signal is from GPIOs or VWs */
- if (espi_signal_is_vw(signal))
- return espi_vw_disable_wire_int(signal);
- }
- return gpio_disable_interrupt(signal);
-}
-
-int power_signal_enable_interrupt(enum gpio_signal signal)
-{
- if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) {
- /* Check signal is from GPIOs or VWs */
- if (espi_signal_is_vw(signal))
- return espi_vw_enable_wire_int(signal);
- }
- return gpio_enable_interrupt(signal);
-}
-
-int power_signal_is_asserted(const struct power_signal_info *s)
-{
- return power_signal_get_level(s->gpio) ==
- !!(s->flags & POWER_SIGNAL_ACTIVE_STATE);
-}
-
-#ifdef CONFIG_BRINGUP
-static const char *power_signal_get_name(enum gpio_signal signal)
-{
- if (IS_ENABLED(CONFIG_HOSTCMD_ESPI)) {
- /* Check signal is from GPIOs or VWs */
- if (espi_signal_is_vw(signal))
- return espi_vw_get_wire_name(signal);
- }
- return gpio_get_name(signal);
-}
-#endif
-
-/**
- * Update input signals mask
- */
-static void power_update_signals(void)
-{
- uint32_t inew = 0;
- const struct power_signal_info *s = power_signal_list;
- int i;
-
- for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++) {
- if (power_signal_is_asserted(s))
- inew |= 1 << i;
- }
-
- if ((in_signals & in_debug) != (inew & in_debug))
- CPRINTS("power in 0x%04x", inew);
-
- in_signals = inew;
-}
-
-uint32_t power_get_signals(void)
-{
- return in_signals;
-}
-
-int power_has_signals(uint32_t want)
-{
- if ((in_signals & want) == want)
- return 1;
-
- CPRINTS("power lost input; wanted 0x%04x, got 0x%04x",
- want, in_signals & want);
-
- return 0;
-}
-
-int power_wait_signals(uint32_t want)
-{
- int ret = power_wait_signals_timeout(want, DEFAULT_TIMEOUT);
-
- if (ret == EC_ERROR_TIMEOUT)
- CPRINTS("power timeout on input; wanted 0x%04x, got 0x%04x",
- want, in_signals & want);
- return ret;
-}
-
-int power_wait_signals_timeout(uint32_t want, int timeout)
-{
- in_want = want;
- if (!want)
- return EC_SUCCESS;
-
- while ((in_signals & in_want) != in_want) {
- if (task_wait_event(timeout) == TASK_EVENT_TIMER) {
- power_update_signals();
- return EC_ERROR_TIMEOUT;
- }
- /*
- * TODO(crosbug.com/p/23772): should really shrink the
- * remaining timeout if we woke up but didn't have all the
- * signals we wanted. Also need to handle aborts if we're no
- * longer in the same state we were when we started waiting.
- */
- }
- return EC_SUCCESS;
-}
-
-void power_set_state(enum power_state new_state)
-{
- /* Record the time we go into G3 */
- if (new_state == POWER_G3)
- last_shutdown_time = get_time().val;
-
- /* Print out the RTC value to help correlate EC and kernel logs. */
- print_system_rtc(CC_CHIPSET);
-
- state = new_state;
-
- /*
- * Reset want_g3_exit flag here to prevent the situation that if the
- * error handler in POWER_S5S3 decides to force shutdown the system and
- * the flag is set, the system will go to G3 and then immediately exit
- * G3 again.
- */
- if (state == POWER_S5S3)
- want_g3_exit = 0;
-}
-
-enum power_state power_get_state(void)
-{
- return state;
-}
-
-#ifdef CONFIG_HOSTCMD_X86
-
-/* If host doesn't program s0ix lazy wake mask, use default s0ix mask */
-#define DEFAULT_WAKE_MASK_S0IX (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \
- EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE))
-
- /*
- * Set the wake mask according to the current power state:
- * 1. On transition to S0, wake mask is reset.
- * 2. In non-S0 states, active mask set by host gets a higher preference.
- * 3. If host has not set any active mask, then check if a lazy mask exists
- * for the current power state.
- * 4. If state is S0ix and no lazy or active wake mask is set, then use default
- * S0ix mask to be compatible with older BIOS versions.
- */
-
-void power_update_wake_mask(void)
-{
- host_event_t wake_mask;
- enum power_state state;
-
- state = power_get_state();
-
- if (state == POWER_S0)
- wake_mask = 0;
- else if (lpc_is_active_wm_set_by_host())
- return;
- else if (get_lazy_wake_mask(state, &wake_mask))
- return;
-#ifdef CONFIG_POWER_S0IX
- if ((state == POWER_S0ix) && (wake_mask == 0))
- wake_mask = DEFAULT_WAKE_MASK_S0IX;
-#endif
-
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, wake_mask);
-}
- /*
- * Set wake mask after power state has stabilized, 5ms after power state
- * change. The reason for making this a deferred call is to avoid race
- * conditions occurring from S0ix periodic wakes on the SoC.
- */
-
-static void power_update_wake_mask_deferred(void);
-DECLARE_DEFERRED(power_update_wake_mask_deferred);
-
-static void power_update_wake_mask_deferred(void)
-{
- hook_call_deferred(&power_update_wake_mask_deferred_data, -1);
- power_update_wake_mask();
-}
-
-static void power_set_active_wake_mask(void)
-{
- /*
- * Allow state machine to stabilize and update wake mask after 5msec. It
- * was observed that on platforms where host wakes up periodically from
- * S0ix for hardware book-keeping activities, there is a small window
- * where host is not really up and running software, but still SLP_S0#
- * is de-asserted and hence setting wake mask right away can cause user
- * wake events to be missed.
- *
- * Time for deferred callback was chosen to be 5msec based on the fact
- * that it takes ~2msec for the periodic wake cycle to complete on the
- * host for KBL.
- */
- hook_call_deferred(&power_update_wake_mask_deferred_data,
- 5 * MSEC);
-}
-
-#else
-static void power_set_active_wake_mask(void) { }
-#endif
-
-__overridable enum critical_shutdown board_system_is_idle(
- uint64_t last_shutdown_time, uint64_t *target, uint64_t now)
-{
- return now > *target ?
- CRITICAL_SHUTDOWN_HIBERNATE : CRITICAL_SHUTDOWN_IGNORE;
-}
-
-/**
- * Common handler for steady states
- *
- * @param state Current power state
- * @return Updated power state
- */
-static enum power_state power_common_state(enum power_state state)
-{
- switch (state) {
- case POWER_G3:
- if (want_g3_exit) {
- want_g3_exit = 0;
- return POWER_G3S5;
- }
-
- in_want = 0;
-#ifdef CONFIG_HIBERNATE
- {
- uint64_t target, now, wait;
- if (extpower_is_present()) {
- task_wait_event(-1);
- break;
- }
-
- now = get_time().val;
- target = last_shutdown_time + hibernate_delay * SECOND;
- switch (board_system_is_idle(last_shutdown_time,
- &target, now)) {
- case CRITICAL_SHUTDOWN_HIBERNATE:
- CPRINTS("Hibernate due to G3 idle");
- system_hibernate(0, 0);
- break;
-#ifdef CONFIG_BATTERY_CUT_OFF
- case CRITICAL_SHUTDOWN_CUTOFF:
- CPRINTS("Cutoff due to G3 idle");
- /* Ensure logs are flushed. */
- cflush();
- board_cut_off_battery();
- break;
-#endif
- case CRITICAL_SHUTDOWN_IGNORE:
- default:
- break;
- }
-
- wait = MIN(target - now, TASK_MAX_WAIT_US);
- task_wait_event(wait);
- }
-#else /* !CONFIG_HIBERNATE */
- task_wait_event(-1);
-#endif
- break;
-
- case POWER_S5:
- /*
- * If the power button is pressed before S5 inactivity timer
- * expires, the timer will be cancelled and the task of the
- * power state machine will be back here again. Since we are
- * here, which means the system has been waiting for CPU
- * starting up, we don't need want_g3_exit flag to be set
- * anymore. Therefore, we can reset the flag here to prevent
- * the situation that the flag is still set after S5 inactivity
- * timer expires, which can cause the system to exit G3 again.
- */
- want_g3_exit = 0;
-
- /* Wait for inactivity timeout */
- power_wait_signals(0);
- if (task_wait_event(S5_INACTIVITY_TIMEOUT) ==
- TASK_EVENT_TIMER) {
- /* Prepare to drop to G3; wake not requested yet */
- return POWER_S5G3;
- }
- break;
-
- case POWER_S3:
- /* Wait for a message */
- power_wait_signals(0);
- task_wait_event(-1);
- break;
-
- case POWER_S0:
- /* Wait for a message */
- power_wait_signals(0);
- task_wait_event(-1);
- break;
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0ix:
- /* Wait for a message */
- power_wait_signals(0);
- task_wait_event(-1);
- break;
-#endif
- default:
- /* No common functionality for transition states */
- break;
- }
-
- return state;
-}
-
-/*****************************************************************************/
-/* Chipset interface */
-
-int chipset_in_state(int state_mask)
-{
- int need_mask = 0;
-
- /*
- * TODO(crosbug.com/p/23773): what to do about state transitions? If
- * the caller wants HARD_OFF|SOFT_OFF and we're in G3S5, we could still
- * return non-zero.
- */
- switch (state) {
- case POWER_G3:
- need_mask = CHIPSET_STATE_HARD_OFF;
- break;
- case POWER_G3S5:
- case POWER_S5G3:
- /*
- * In between hard and soft off states. Match only if caller
- * will accept both.
- */
- need_mask = CHIPSET_STATE_HARD_OFF | CHIPSET_STATE_SOFT_OFF;
- break;
- case POWER_S5:
- need_mask = CHIPSET_STATE_SOFT_OFF;
- break;
- case POWER_S5S3:
- case POWER_S3S5:
- need_mask = CHIPSET_STATE_SOFT_OFF | CHIPSET_STATE_SUSPEND;
- break;
- case POWER_S3:
- need_mask = CHIPSET_STATE_SUSPEND;
- break;
- case POWER_S3S0:
- case POWER_S0S3:
- need_mask = CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON;
- break;
- case POWER_S0:
- need_mask = CHIPSET_STATE_ON;
- break;
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0ixS0:
- case POWER_S0S0ix:
- need_mask = CHIPSET_STATE_ON | CHIPSET_STATE_STANDBY;
- break;
- case POWER_S0ix:
- need_mask = CHIPSET_STATE_STANDBY;
- break;
-#endif
- }
-
- /* Return non-zero if all needed bits are present */
- return (state_mask & need_mask) == need_mask;
-}
-
-int chipset_in_or_transitioning_to_state(int state_mask)
-{
- switch (state) {
- case POWER_G3:
- case POWER_S5G3:
- return state_mask & CHIPSET_STATE_HARD_OFF;
- case POWER_S5:
- case POWER_G3S5:
- case POWER_S3S5:
- return state_mask & CHIPSET_STATE_SOFT_OFF;
- case POWER_S3:
- case POWER_S5S3:
- case POWER_S0S3:
- return state_mask & CHIPSET_STATE_SUSPEND;
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0ix:
- case POWER_S0S0ix:
- return state_mask & CHIPSET_STATE_STANDBY;
-#endif
- case POWER_S0:
- case POWER_S3S0:
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0ixS0:
-#endif
- return state_mask & CHIPSET_STATE_ON;
- }
-
- /* Unknown power state; return false. */
- return 0;
-}
-
-void chipset_exit_hard_off(void)
-{
- /*
- * If not in the soft-off state, hard-off state, or headed there,
- * nothing to do.
- */
- if (state != POWER_G3 && state != POWER_S5G3 && state != POWER_S5)
- return;
-
- /*
- * Set a flag to leave G3, then wake the task. If the power state is
- * POWER_S5G3, or is POWER_S5 but the S5 inactivity timer has
- * expired, set this flag can let system go to G3 and then exit G3
- * immediately for powering on.
- */
- want_g3_exit = 1;
-
- /*
- * If the power state is in POWER_S5 and S5 inactivity timer is
- * running, to wake the chipset task can cancel S5 inactivity timer and
- * then restart the timer. This will give cpu a chance to start up if
- * S5 inactivity timer is about to expire while power button is
- * pressed. For other states here, to wake the chipset task to trigger
- * the event for leaving G3 is necessary.
- */
- task_wake(TASK_ID_CHIPSET);
-}
-
-/*****************************************************************************/
-/* Task function */
-
-void chipset_task(void *u)
-{
- enum power_state new_state;
- static enum power_state last_state;
- uint32_t this_in_signals;
- static uint32_t last_in_signals;
-
- while (1) {
- /*
- * In order to prevent repeated console spam, only print the
- * current power state if something has actually changed. It's
- * possible that one of the power signals goes away briefly and
- * comes back by the time we update our in_signals.
- */
- this_in_signals = in_signals;
- if (this_in_signals != last_in_signals || state != last_state) {
- CPRINTS("power state %d = %s, in 0x%04x",
- state, state_names[state], this_in_signals);
- if (IS_ENABLED(CONFIG_SEVEN_SEG_DISPLAY))
- display_7seg_write(SEVEN_SEG_EC_DISPLAY, state);
- last_in_signals = this_in_signals;
- last_state = state;
- }
-
- /* Always let the specific chipset handle the state first */
- new_state = power_handle_state(state);
-
- /*
- * If the state hasn't changed, run common steady-state
- * handler.
- */
- if (new_state == state)
- new_state = power_common_state(state);
-
- /* Handle state changes */
- if (new_state != state) {
- power_set_state(new_state);
- power_set_active_wake_mask();
- }
- }
-}
-
-/*****************************************************************************/
-/* Hooks */
-
-static void power_common_init(void)
-{
- const struct power_signal_info *s = power_signal_list;
- int i;
-
- /* Update input state */
- power_update_signals();
-
- /* Call chipset-specific init to set initial state */
- power_set_state(power_chipset_init());
-
- /* Enable interrupts for input signals */
- for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++)
- if (s->flags & POWER_SIGNAL_DISABLE_AT_BOOT)
- power_signal_disable_interrupt(s->gpio);
- else
- power_signal_enable_interrupt(s->gpio);
-
- /*
- * Update input state again since there is a small window
- * before GPIO is enabled.
- */
- power_update_signals();
-}
-DECLARE_HOOK(HOOK_INIT, power_common_init, HOOK_PRIO_INIT_CHIPSET);
-
-static void power_lid_change(void)
-{
- /* Wake up the task to update power state */
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, power_lid_change, HOOK_PRIO_DEFAULT);
-
-#ifdef CONFIG_EXTPOWER
-static void power_ac_change(void)
-{
- if (extpower_is_present()) {
- CPRINTS("AC on");
- } else {
- CPRINTS("AC off");
-
- if (state == POWER_G3) {
- last_shutdown_time = get_time().val;
- task_wake(TASK_ID_CHIPSET);
- }
- }
-}
-DECLARE_HOOK(HOOK_AC_CHANGE, power_ac_change, HOOK_PRIO_DEFAULT);
-#endif
-
-/*****************************************************************************/
-/* Interrupts */
-
-#ifdef CONFIG_BRINGUP
-#define MAX_SIGLOG_ENTRIES 24
-
-static unsigned int siglog_entries;
-static unsigned int siglog_truncated;
-
-static struct {
- timestamp_t time;
- enum gpio_signal signal;
- int level;
-} siglog[MAX_SIGLOG_ENTRIES];
-
-static void siglog_deferred(void)
-{
- unsigned int i;
- timestamp_t tdiff = {.val = 0};
-
- /* Disable interrupts for input signals while we print stuff.*/
- for (i = 0; i < POWER_SIGNAL_COUNT; i++)
- power_signal_disable_interrupt(power_signal_list[i].gpio);
-
- CPRINTF("%d signal changes:\n", siglog_entries);
- for (i = 0; i < siglog_entries; i++) {
- if (i)
- tdiff.val = siglog[i].time.val - siglog[i-1].time.val;
- CPRINTF(" %.6lld +%.6lld %s => %d\n",
- siglog[i].time.val, tdiff.val,
- power_signal_get_name(siglog[i].signal),
- siglog[i].level);
- }
- if (siglog_truncated)
- CPRINTF(" SIGNAL LOG TRUNCATED...\n");
- siglog_entries = siglog_truncated = 0;
-
- /* Okay, turn 'em on again. */
- for (i = 0; i < POWER_SIGNAL_COUNT; i++)
- power_signal_enable_interrupt(power_signal_list[i].gpio);
-}
-DECLARE_DEFERRED(siglog_deferred);
-
-static void siglog_add(enum gpio_signal signal)
-{
- if (siglog_entries >= MAX_SIGLOG_ENTRIES) {
- siglog_truncated = 1;
- return;
- }
-
- siglog[siglog_entries].time = get_time();
- siglog[siglog_entries].signal = signal;
- siglog[siglog_entries].level = power_signal_get_level(signal);
- siglog_entries++;
-
- hook_call_deferred(&siglog_deferred_data, SECOND);
-}
-
-#define SIGLOG(S) siglog_add(S)
-
-#else
-#define SIGLOG(S)
-#endif /* CONFIG_BRINGUP */
-
-#ifdef CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD
-/*
- * Print an interrupt storm warning when we receive more than
- * CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD interrupts of a
- * single source within 1 second.
- */
-static int power_signal_interrupt_count[POWER_SIGNAL_COUNT];
-
-static void reset_power_signal_interrupt_count(void)
-{
- int i;
-
- for (i = 0; i < POWER_SIGNAL_COUNT; ++i)
- power_signal_interrupt_count[i] = 0;
-}
-DECLARE_HOOK(HOOK_SECOND,
- reset_power_signal_interrupt_count,
- HOOK_PRIO_DEFAULT);
-#endif
-
-void power_signal_interrupt(enum gpio_signal signal)
-{
-#ifdef CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD
- int i;
-
- /* Tally our interrupts and print a warning if necessary. */
- for (i = 0; i < POWER_SIGNAL_COUNT; ++i) {
- if (power_signal_list[i].gpio == signal) {
- if (power_signal_interrupt_count[i]++ ==
- CONFIG_POWER_SIGNAL_INTERRUPT_STORM_DETECT_THRESHOLD)
- CPRINTS("Interrupt storm! Signal %d", i);
- break;
- }
- }
-#endif
-
- SIGLOG(signal);
-
- /* Shadow signals and compare with our desired signal state. */
- power_update_signals();
-
- /* Wake up the task */
- task_wake(TASK_ID_CHIPSET);
-}
-
-#ifdef CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
-inline int power_get_pause_in_s5(void)
-{
- return pause_in_s5;
-}
-
-inline void power_set_pause_in_s5(int pause)
-{
- pause_in_s5 = pause;
-}
-#endif
-
-/*****************************************************************************/
-/* Console commands */
-
-static int command_powerinfo(int argc, char **argv)
-{
- /*
- * Print power state in same format as state machine. This is
- * used by FAFT tests, so must match exactly.
- */
- ccprints("power state %d = %s, in 0x%04x",
- state, state_names[state], in_signals);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(powerinfo, command_powerinfo,
- NULL,
- "Show current power state");
-
-#ifdef CONFIG_CMD_POWERINDEBUG
-static int command_powerindebug(int argc, char **argv)
-{
- const struct power_signal_info *s = power_signal_list;
- int i;
- char *e;
-
- /* If one arg, set the mask */
- if (argc == 2) {
- int m = strtoi(argv[1], &e, 0);
- if (*e)
- return EC_ERROR_PARAM1;
-
- in_debug = m;
- }
-
- /* Print the mask */
- ccprintf("power in: 0x%04x\n", in_signals);
- ccprintf("debug mask: 0x%04x\n", in_debug);
-
- /* Print the decode */
-
- ccprintf("bit meanings:\n");
- for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++) {
- int mask = 1 << i;
- ccprintf(" 0x%04x %d %s\n",
- mask, in_signals & mask ? 1 : 0, s->name);
- }
-
- return EC_SUCCESS;
-};
-DECLARE_CONSOLE_COMMAND(powerindebug, command_powerindebug,
- "[mask]",
- "Get/set power input debug mask");
-#endif
-
-#ifdef CONFIG_HIBERNATE
-static int command_hibernation_delay(int argc, char **argv)
-{
- char *e;
- uint32_t time_g3 = ((uint32_t)(get_time().val - last_shutdown_time))
- / SECOND;
-
- if (argc >= 2) {
- uint32_t s = strtoi(argv[1], &e, 0);
- if (*e)
- return EC_ERROR_PARAM1;
-
- hibernate_delay = s;
- }
-
- /* Print the current setting */
- ccprintf("Hibernation delay: %d s\n", hibernate_delay);
- if (state == POWER_G3 && !extpower_is_present()) {
- ccprintf("Time G3: %d s\n", time_g3);
- ccprintf("Time left: %d s\n", hibernate_delay - time_g3);
- }
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(hibdelay, command_hibernation_delay,
- "[sec]",
- "Set the delay before going into hibernation");
-
-static enum ec_status
-host_command_hibernation_delay(struct host_cmd_handler_args *args)
-{
- const struct ec_params_hibernation_delay *p = args->params;
- struct ec_response_hibernation_delay *r = args->response;
-
- uint32_t time_g3;
- uint64_t t = get_time().val - last_shutdown_time;
-
- uint64divmod(&t, SECOND);
- time_g3 = (uint32_t)t;
-
- /* Only change the hibernation delay if seconds is non-zero. */
- if (p->seconds)
- hibernate_delay = p->seconds;
-
- if (state == POWER_G3 && !extpower_is_present())
- r->time_g3 = time_g3;
- else
- r->time_g3 = 0;
-
- if ((time_g3 != 0) && (time_g3 > hibernate_delay))
- r->time_remaining = 0;
- else
- r->time_remaining = hibernate_delay - time_g3;
- r->hibernate_delay = hibernate_delay;
-
- args->response_size = sizeof(struct ec_response_hibernation_delay);
- return EC_SUCCESS;
-}
-DECLARE_HOST_COMMAND(EC_CMD_HIBERNATION_DELAY,
- host_command_hibernation_delay,
- EC_VER_MASK(0));
-#endif /* CONFIG_HIBERNATE */
-
-#ifdef CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5
-static enum ec_status
-host_command_pause_in_s5(struct host_cmd_handler_args *args)
-{
- const struct ec_params_get_set_value *p = args->params;
- struct ec_response_get_set_value *r = args->response;
-
- if (p->flags & EC_GSV_SET)
- pause_in_s5 = p->value;
-
- r->value = pause_in_s5;
-
- args->response_size = sizeof(*r);
- return EC_RES_SUCCESS;
-}
-DECLARE_HOST_COMMAND(EC_CMD_GSV_PAUSE_IN_S5,
- host_command_pause_in_s5,
- EC_VER_MASK(0));
-
-static int command_pause_in_s5(int argc, char **argv)
-{
- if (argc > 1 && !parse_bool(argv[1], &pause_in_s5))
- return EC_ERROR_INVAL;
-
- ccprintf("pause_in_s5 = %s\n", pause_in_s5 ? "on" : "off");
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(pause_in_s5, command_pause_in_s5,
- "[on|off]",
- "Should the AP pause in S5 during shutdown?");
-#endif /* CONFIG_POWER_SHUTDOWN_PAUSE_IN_S5 */
-
-#ifdef CONFIG_POWER_PP5000_CONTROL
-/* 5V enable request bitmask from various tasks. */
-static uint32_t pwr_5v_en_req;
-static struct mutex pwr_5v_ctl_mtx;
-
-void power_5v_enable(task_id_t tid, int enable)
-{
- mutex_lock(&pwr_5v_ctl_mtx);
-
- if (enable) /* Set the bit indicating the request. */
- pwr_5v_en_req |= 1 << tid;
- else /* Clear the task's request bit. */
- pwr_5v_en_req &= ~(1 << tid);
-
- /*
- * If there are any outstanding requests for the rail to be enabled,
- * turn on the rail. Otherwise, turn it off.
- */
- if (pwr_5v_en_req)
- gpio_set_level(GPIO_EN_PP5000, 1);
- else
- gpio_set_level(GPIO_EN_PP5000, 0);
-
- mutex_unlock(&pwr_5v_ctl_mtx);
-}
-
-#define P5_SYSJUMP_TAG 0x5005 /* "P5" */
-static void restore_enable_5v_state(void)
-{
- const uint32_t *state;
- int size;
-
- state = (const uint32_t *) system_get_jump_tag(P5_SYSJUMP_TAG, 0,
- &size);
- if (state && size == sizeof(pwr_5v_en_req)) {
- mutex_lock(&pwr_5v_ctl_mtx);
- pwr_5v_en_req |= *state;
- mutex_unlock(&pwr_5v_ctl_mtx);
- }
-}
-DECLARE_HOOK(HOOK_INIT, restore_enable_5v_state, HOOK_PRIO_FIRST);
-
-static void preserve_enable_5v_state(void)
-{
- mutex_lock(&pwr_5v_ctl_mtx);
- system_add_jump_tag(P5_SYSJUMP_TAG, 0, sizeof(pwr_5v_en_req),
- &pwr_5v_en_req);
- mutex_unlock(&pwr_5v_ctl_mtx);
-}
-DECLARE_HOOK(HOOK_SYSJUMP, preserve_enable_5v_state, HOOK_PRIO_DEFAULT);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
diff --git a/power/ec_driven.c b/power/ec_driven.c
deleted file mode 100644
index 7c4a021561..0000000000
--- a/power/ec_driven.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * Dummy power module for Sensor HUB.
- *
- * This implements the following features:
- * when AP_IN_SUSPEND is low, in S0, otherwise S3.
- *
- */
-
-#include "chipset.h" /* This module implements chipset functions too */
-#include "common.h"
-#include "console.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "power.h"
-#include "task.h"
-#include "util.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-#define IN_SUSPEND POWER_SIGNAL_MASK(ECDRIVEN_SUSPEND_ASSERTED)
-
-enum power_state power_chipset_init(void)
-{
- return POWER_S3;
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- switch (state) {
- case POWER_S3:
- if (!(power_get_signals() & IN_SUSPEND)) {
- hook_notify(HOOK_CHIPSET_RESUME);
- return POWER_S0;
- }
- return state;
-
- case POWER_S0:
- if (power_get_signals() & IN_SUSPEND) {
- hook_notify(HOOK_CHIPSET_SUSPEND);
- return POWER_S3;
- }
- return state;
- default:
- CPRINTS("Unexpected state: $d", state);
- }
-
- return state;
-}
diff --git a/power/host_sleep.c b/power/host_sleep.c
deleted file mode 100644
index 673d421ca7..0000000000
--- a/power/host_sleep.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-#include "ec_commands.h"
-#include "host_command.h"
-#include "power.h"
-
-/* Track last reported sleep event */
-static enum host_sleep_event host_sleep_state;
-
-__overridable void power_chipset_handle_host_sleep_event(
- enum host_sleep_event state,
- struct host_sleep_event_context *ctx)
-{
- /* Default weak implementation -- no action required. */
-}
-
-static enum ec_status
-host_command_host_sleep_event(struct host_cmd_handler_args *args)
-{
- const struct ec_params_host_sleep_event_v1 *p = args->params;
- struct ec_response_host_sleep_event_v1 *r = args->response;
- struct host_sleep_event_context ctx;
- enum host_sleep_event state = p->sleep_event;
-
- host_sleep_state = state;
- ctx.sleep_transitions = 0;
- switch (state) {
- case HOST_SLEEP_EVENT_S0IX_SUSPEND:
- case HOST_SLEEP_EVENT_S3_SUSPEND:
- case HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND:
- ctx.sleep_timeout_ms = EC_HOST_SLEEP_TIMEOUT_DEFAULT;
-
- /* The original version contained only state. */
- if (args->version >= 1)
- ctx.sleep_timeout_ms =
- p->suspend_params.sleep_timeout_ms;
-
- break;
-
- default:
- break;
- }
-
- power_chipset_handle_host_sleep_event(host_sleep_state, &ctx);
- switch (state) {
- case HOST_SLEEP_EVENT_S0IX_RESUME:
- case HOST_SLEEP_EVENT_S3_RESUME:
- if (args->version >= 1) {
- r->resume_response.sleep_transitions =
- ctx.sleep_transitions;
-
- args->response_size = sizeof(*r);
- }
-
- break;
-
- default:
- break;
- }
-
- return EC_RES_SUCCESS;
-}
-DECLARE_HOST_COMMAND(EC_CMD_HOST_SLEEP_EVENT,
- host_command_host_sleep_event,
- EC_VER_MASK(0) | EC_VER_MASK(1));
-
-enum host_sleep_event power_get_host_sleep_state(void)
-{
- return host_sleep_state;
-}
-
-void power_set_host_sleep_state(enum host_sleep_event state)
-{
- host_sleep_state = state;
-}
-
diff --git a/power/intel_x86.c b/power/intel_x86.c
deleted file mode 100644
index c60c1f94e3..0000000000
--- a/power/intel_x86.c
+++ /dev/null
@@ -1,745 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Intel X86 chipset power control module for Chrome EC */
-
-#include "board_config.h"
-#include "charge_state.h"
-#include "chipset.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "intel_x86.h"
-#include "lpc.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "task.h"
-#include "util.h"
-#include "vboot.h"
-#include "wireless.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-#define CPRINTF(format, args...) cprintf(CC_CHIPSET, format, ## args)
-
-enum sys_sleep_state {
- SYS_SLEEP_S3,
- SYS_SLEEP_S4,
-#ifdef CONFIG_POWER_S0IX
- SYS_SLEEP_S0IX,
-#endif
-};
-
-static const int sleep_sig[] = {
- [SYS_SLEEP_S3] = SLP_S3_SIGNAL_L,
- [SYS_SLEEP_S4] = SLP_S4_SIGNAL_L,
-#ifdef CONFIG_POWER_S0IX
- [SYS_SLEEP_S0IX] = GPIO_PCH_SLP_S0_L,
-#endif
-};
-
-static int power_s5_up; /* Chipset is sequencing up or down */
-
-#ifdef CONFIG_CHARGER
-/* Flag to indicate if power up was inhibited due to low battery SOC level. */
-static int power_up_inhibited;
-
-/*
- * Check if AP power up should be inhibited.
- * 0 = Ok to boot up AP
- * 1 = AP power up is inhibited.
- */
-static int is_power_up_inhibited(void)
-{
- /* Defaulting to power button not pressed. */
- const int power_button_pressed = 0;
-
- return charge_prevent_power_on(power_button_pressed) ||
- charge_want_shutdown();
-}
-
-static void power_up_inhibited_cb(void)
-{
- if (!power_up_inhibited)
- return;
-
- if (is_power_up_inhibited()) {
- CPRINTS("power-up still inhibited");
- return;
- }
-
- CPRINTS("Battery SOC ok to boot AP!");
- power_up_inhibited = 0;
-
- chipset_exit_hard_off();
-}
-DECLARE_HOOK(HOOK_BATTERY_SOC_CHANGE, power_up_inhibited_cb, HOOK_PRIO_DEFAULT);
-#endif
-
-/* Get system sleep state through GPIOs or VWs */
-static inline int chipset_get_sleep_signal(enum sys_sleep_state state)
-{
- return power_signal_get_level(sleep_sig[state]);
-}
-
-#ifdef CONFIG_BOARD_HAS_RTC_RESET
-static void intel_x86_rtc_reset(void)
-{
- CPRINTS("Asserting RTCRST# to PCH");
- gpio_set_level(GPIO_PCH_RTCRST, 1);
- udelay(100);
- gpio_set_level(GPIO_PCH_RTCRST, 0);
-}
-
-static enum power_state power_wait_s5_rtc_reset(void)
-{
- static int s5_exit_tries;
-
- /* Wait for S5 exit and then attempt RTC reset */
- while ((power_get_signals() & IN_PCH_SLP_S4_DEASSERTED) == 0) {
- /* Handle RSMRST passthru event while waiting */
- common_intel_x86_handle_rsmrst(POWER_S5);
- if (task_wait_event(SECOND*4) == TASK_EVENT_TIMER) {
- CPRINTS("timeout waiting for S5 exit");
- chipset_force_g3();
-
- /* Assert RTCRST# and retry 5 times */
- intel_x86_rtc_reset();
-
- if (++s5_exit_tries > 4) {
- s5_exit_tries = 0;
- return POWER_G3; /* Stay off */
- }
-
- udelay(10 * MSEC);
- return POWER_G3S5; /* Power up again */
- }
- }
-
- s5_exit_tries = 0;
- return POWER_S5S3; /* Power up to next state */
-}
-#endif
-
-#ifdef CONFIG_POWER_S0IX
-/*
- * Backup copies of SCI and SMI mask to preserve across S0ix suspend/resume
- * cycle. If the host uses S0ix, BIOS is not involved during suspend and resume
- * operations and hence SCI/SMI masks are programmed only once during boot-up.
- *
- * These backup variables are set whenever host expresses its interest to
- * enter S0ix and then lpc_host_event_mask for SCI and SMI are cleared. When
- * host resumes from S0ix, masks from backup variables are copied over to
- * lpc_host_event_mask for SCI and SMI.
- */
-static host_event_t backup_sci_mask;
-static host_event_t backup_smi_mask;
-
-/*
- * Clear host event masks for SMI and SCI when host is entering S0ix. This is
- * done to prevent any SCI/SMI interrupts when the host is in suspend. Since
- * BIOS is not involved in the suspend path, EC needs to take care of clearing
- * these masks.
- */
-static void lpc_s0ix_suspend_clear_masks(void)
-{
- backup_sci_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SCI);
- backup_smi_mask = lpc_get_host_event_mask(LPC_HOST_EVENT_SMI);
-
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, 0);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, 0);
-}
-
-/*
- * Restore host event masks for SMI and SCI when host exits S0ix. This is done
- * because BIOS is not involved in the resume path and so EC needs to restore
- * the masks from backup variables.
- */
-static void lpc_s0ix_resume_restore_masks(void)
-{
- /*
- * No need to restore SCI/SMI masks if both backup_sci_mask and
- * backup_smi_mask are zero. This indicates that there was a failure to
- * enter S0ix(SLP_S0# assertion) and hence SCI/SMI masks were never
- * backed up.
- */
- if (!backup_sci_mask && !backup_smi_mask)
- return;
-
- lpc_set_host_event_mask(LPC_HOST_EVENT_SCI, backup_sci_mask);
- lpc_set_host_event_mask(LPC_HOST_EVENT_SMI, backup_smi_mask);
-
- backup_sci_mask = backup_smi_mask = 0;
-}
-
-enum s0ix_notify_type {
- S0IX_NOTIFY_NONE,
- S0IX_NOTIFY_SUSPEND,
- S0IX_NOTIFY_RESUME,
-};
-
-/* Flag to notify listeners about S0ix suspend/resume events. */
-enum s0ix_notify_type s0ix_notify = S0IX_NOTIFY_NONE;
-
-static void s0ix_transition(int check_state, int hook_id)
-{
- if (s0ix_notify != check_state)
- return;
-
- /* Clear masks before any hooks are run for suspend. */
- if (s0ix_notify == S0IX_NOTIFY_SUSPEND)
- lpc_s0ix_suspend_clear_masks();
-
- hook_notify(hook_id);
- s0ix_notify = S0IX_NOTIFY_NONE;
-}
-
-static void handle_chipset_reset(void)
-{
- if (chipset_in_state(CHIPSET_STATE_STANDBY)) {
- CPRINTS("chipset reset: exit s0ix");
- power_reset_host_sleep_state();
- task_wake(TASK_ID_CHIPSET);
- }
-}
-DECLARE_HOOK(HOOK_CHIPSET_RESET, handle_chipset_reset, HOOK_PRIO_FIRST);
-
-#ifdef CONFIG_POWER_TRACK_HOST_SLEEP_STATE
-#ifdef CONFIG_POWER_S0IX_FAILURE_DETECTION
-
-static uint16_t slp_s0ix_timeout;
-static uint32_t slp_s0ix_transitions;
-
-static void s0ix_transition_timeout(void);
-DECLARE_DEFERRED(s0ix_transition_timeout);
-
-static void s0ix_increment_transition(void)
-{
- if ((slp_s0ix_transitions & EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK) <
- EC_HOST_RESUME_SLEEP_TRANSITIONS_MASK)
- slp_s0ix_transitions += 1;
-}
-
-static void s0ix_suspend_transition(void)
-{
- s0ix_increment_transition();
- hook_call_deferred(&s0ix_transition_timeout_data, -1);
-}
-
-static void s0ix_resume_transition(void)
-{
- s0ix_increment_transition();
-
- /*
- * Start the timer again to ensure the AP doesn't get itself stuck in
- * a state where it's no longer in S0ix, but from the Linux perspective
- * is still suspended. Perhaps a bug in the SoC-internal periodic
- * housekeeping code might result in a situation like this.
- */
- if (slp_s0ix_timeout)
- hook_call_deferred(&s0ix_transition_timeout_data,
- (uint32_t)slp_s0ix_timeout * 1000);
-}
-
-static void s0ix_transition_timeout(void)
-{
- /* Mark the timeout. */
- slp_s0ix_transitions |= EC_HOST_RESUME_SLEEP_TIMEOUT;
- hook_call_deferred(&s0ix_transition_timeout_data, -1);
-
- /*
- * Wake up the AP so they don't just chill in a non-suspended state and
- * burn power. Overload a vaguely related event bit since event bits are
- * at a premium. If the system never entered S0ix, then manually set the
- * wake mask to pretend it did, so that the hang detect event wakes the
- * system.
- */
- if (power_get_state() == POWER_S0) {
- host_event_t s0ix_wake_mask;
-
- get_lazy_wake_mask(POWER_S0ix, &s0ix_wake_mask);
- lpc_set_host_event_mask(LPC_HOST_EVENT_WAKE, s0ix_wake_mask);
- }
-
- CPRINTS("Warning: Detected S0ix hang! Waking host up!");
- host_set_single_event(EC_HOST_EVENT_HANG_DETECT);
-}
-
-static void s0ix_start_suspend(struct host_sleep_event_context *ctx)
-{
- uint16_t timeout = ctx->sleep_timeout_ms;
-
- slp_s0ix_transitions = 0;
-
- /* Use zero internally to indicate no timeout. */
- if (timeout == EC_HOST_SLEEP_TIMEOUT_DEFAULT) {
- timeout = CONFIG_SLEEP_TIMEOUT_MS;
-
- } else if (timeout == EC_HOST_SLEEP_TIMEOUT_INFINITE) {
- slp_s0ix_timeout = 0;
- return;
- }
-
- slp_s0ix_timeout = timeout;
- hook_call_deferred(&s0ix_transition_timeout_data,
- (uint32_t)timeout * 1000);
-}
-
-static void s0ix_complete_resume(struct host_sleep_event_context *ctx)
-{
- hook_call_deferred(&s0ix_transition_timeout_data, -1);
- ctx->sleep_transitions = slp_s0ix_transitions;
-
- /*
- * If s0ix timed out and never transitioned, then the wake mask was
- * modified to its s0ix state, so that the event wakes the system.
- * Explicitly restore the wake mask to its S0 state now.
- */
- power_update_wake_mask();
-}
-
-static void s0ix_reset_tracking(void)
-{
- slp_s0ix_transitions = 0;
- slp_s0ix_timeout = 0;
-}
-
-#else /* !CONFIG_POWER_S0IX_FAILURE_DETECTION */
-
-#define s0ix_suspend_transition()
-#define s0ix_resume_transition()
-#define s0ix_start_suspend(_ctx)
-#define s0ix_complete_resume(_ctx)
-#define s0ix_reset_tracking()
-
-#endif /* CONFIG_POWER_S0IX_FAILURE_DETECTION */
-
-void power_reset_host_sleep_state(void)
-{
- power_set_host_sleep_state(HOST_SLEEP_EVENT_DEFAULT_RESET);
- s0ix_reset_tracking();
- power_chipset_handle_host_sleep_event(HOST_SLEEP_EVENT_DEFAULT_RESET,
- NULL);
-}
-
-#endif /* CONFIG_POWER_TRACK_HOST_SLEEP_STATE */
-#endif /* CONFIG_POWER_S0IX */
-
-void chipset_throttle_cpu(int throttle)
-{
-#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW
- throttle = !throttle;
-#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */
- if (chipset_in_state(CHIPSET_STATE_ON))
- gpio_set_level(GPIO_CPU_PROCHOT, throttle);
-}
-
-enum power_state power_chipset_init(void)
-{
- /*
- * If we're switching between images without rebooting, see if the x86
- * is already powered on; if so, leave it there instead of cycling
- * through G3.
- */
- if (system_jumped_to_this_image()) {
- if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
- /* Disable idle task deep sleep when in S0. */
- disable_sleep(SLEEP_MASK_AP_RUN);
- CPRINTS("already in S0");
- return POWER_S0;
- }
-
- /* Force all signals to their G3 states */
- chipset_force_g3();
- }
-
- return POWER_G3;
-}
-
-enum power_state common_intel_x86_power_handle_state(enum power_state state)
-{
- switch (state) {
- case POWER_G3:
- break;
-
- case POWER_S5:
-#ifdef CONFIG_BOARD_HAS_RTC_RESET
- /* Wait for S5 exit and attempt RTC reset if supported */
- if (power_s5_up)
- return power_wait_s5_rtc_reset();
-#endif
-
- if (chipset_get_sleep_signal(SYS_SLEEP_S4) == 1)
- return POWER_S5S3; /* Power up to next state */
- break;
-
- case POWER_S3:
- if (!power_has_signals(IN_PGOOD_ALL_CORE)) {
- /* Required rail went away */
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S3S5;
- } else if (chipset_get_sleep_signal(SYS_SLEEP_S3) == 1) {
- /* Power up to next state */
- return POWER_S3S0;
- } else if (chipset_get_sleep_signal(SYS_SLEEP_S4) == 0) {
- /* Power down to next state */
- return POWER_S3S5;
- }
- break;
-
- case POWER_S0:
- if (!power_has_signals(IN_PGOOD_ALL_CORE)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S0S3;
- } else if (chipset_get_sleep_signal(SYS_SLEEP_S3) == 0) {
- /* Power down to next state */
- return POWER_S0S3;
-#ifdef CONFIG_POWER_S0IX
- /*
- * SLP_S0 may assert in system idle scenario without a kernel
- * freeze call. This may cause interrupt storm since there is
- * no freeze/unfreeze of threads/process in the idle scenario.
- * Ignore the SLP_S0 assertions in idle scenario by checking
- * the host sleep state.
- */
- } else if (power_get_host_sleep_state()
- == HOST_SLEEP_EVENT_S0IX_SUSPEND &&
- chipset_get_sleep_signal(SYS_SLEEP_S0IX) == 0) {
- return POWER_S0S0ix;
- } else {
- s0ix_transition(S0IX_NOTIFY_RESUME,
- HOOK_CHIPSET_RESUME);
-#endif
- }
-
- break;
-
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0ix:
- /* System in S0 only if SLP_S0 and SLP_S3 are de-asserted */
- if ((chipset_get_sleep_signal(SYS_SLEEP_S0IX) == 1) &&
- (chipset_get_sleep_signal(SYS_SLEEP_S3) == 1)) {
- return POWER_S0ixS0;
- } else if (!power_has_signals(IN_PGOOD_ALL_CORE)) {
- return POWER_S0;
- }
-
- break;
-#endif
-
- case POWER_G3S5:
-#ifdef CONFIG_CHARGER
- {
- int tries = 0;
-
- /*
- * Allow charger to be initialized for upto defined tries,
- * in case we're trying to boot the AP with no battery.
- */
- while ((tries < CHARGER_INITIALIZED_TRIES) &&
- is_power_up_inhibited()) {
- msleep(CHARGER_INITIALIZED_DELAY_MS);
- tries++;
- }
-
- /*
- * Return to G3 if battery level is too low. Set
- * power_up_inhibited in order to check the eligibility to boot
- * AP up after battery SOC changes.
- */
- if (tries == CHARGER_INITIALIZED_TRIES) {
- CPRINTS("power-up inhibited");
- power_up_inhibited = 1;
- chipset_force_shutdown(
- CHIPSET_SHUTDOWN_BATTERY_INHIBIT);
- return POWER_G3;
- }
-
- power_up_inhibited = 0;
- }
-#endif
-
-#ifdef CONFIG_VBOOT_EFS
- /*
- * We have to test power readiness here (instead of S5->S3)
- * because when entering S5, EC enables EC_ROP_SLP_SUS pin
- * which causes (short-powered) system to brown out.
- */
- while (!system_can_boot_ap())
- msleep(200);
-#endif
-
-#ifdef CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK
- /*
- * Callback to do pre-initialization within the context of
- * chipset task.
- */
- chipset_pre_init_callback();
-#endif
-
- if (power_wait_signals(CHIPSET_G3S5_POWERUP_SIGNAL)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
- return POWER_G3;
- }
-
- power_s5_up = 1;
- return POWER_S5;
-
- case POWER_S5S3:
- if (!power_has_signals(IN_PGOOD_ALL_CORE)) {
- /* Required rail went away */
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S5G3;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
-#ifdef CONFIG_POWER_S0IX
- /*
- * Clearing the S0ix flag on the path to S0
- * to handle any reset conditions.
- */
- power_reset_host_sleep_state();
-#endif
- return POWER_S3;
-
- case POWER_S3S0:
- if (!power_has_signals(IN_PGOOD_ALL_CORE)) {
- /* Required rail went away */
- chipset_force_shutdown(CHIPSET_SHUTDOWN_POWERFAIL);
- return POWER_S3S5;
- }
-
- /* Enable wireless */
- wireless_set_state(WIRELESS_ON);
-
- lpc_s3_resume_clear_masks();
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_RESUME);
-
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- /*
- * Throttle CPU if necessary. This should only be asserted
- * when +VCCP is powered (it is by now).
- */
-#ifdef CONFIG_CPU_PROCHOT_ACTIVE_LOW
- gpio_set_level(GPIO_CPU_PROCHOT, 1);
-#else
- gpio_set_level(GPIO_CPU_PROCHOT, 0);
-#endif /* CONFIG_CPU_PROCHOT_ACTIVE_LOW */
-
- return POWER_S0;
-
- case POWER_S0S3:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SUSPEND);
-
- /* Suspend wireless */
- wireless_set_state(WIRELESS_SUSPEND);
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S3 or lower.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
-
-#ifdef CONFIG_POWER_S0IX
- /* re-init S0ix flag */
- power_reset_host_sleep_state();
-#endif
- return POWER_S3;
-
-#ifdef CONFIG_POWER_S0IX
- case POWER_S0S0ix:
-
- /*
- * Call hooks only if we haven't notified listeners of S0ix
- * suspend.
- */
- s0ix_transition(S0IX_NOTIFY_SUSPEND, HOOK_CHIPSET_SUSPEND);
- s0ix_suspend_transition();
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S0ix.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
- return POWER_S0ix;
-
- case POWER_S0ixS0:
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- s0ix_resume_transition();
- return POWER_S0;
-#endif
-
- case POWER_S3S5:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- /* Disable wireless */
- wireless_set_state(WIRELESS_OFF);
-
- /* Always enter into S5 state. The S5 state is required to
- * correctly handle global resets which have a bit of delay
- * while the SLP_Sx_L signals are asserted then deasserted.
- */
- power_s5_up = 0;
- return POWER_S5;
-
- case POWER_S5G3:
- return chipset_force_g3();
-
- default:
- break;
- }
-
- return state;
-}
-
-void intel_x86_rsmrst_signal_interrupt(enum gpio_signal signal)
-{
- int rsmrst_in = gpio_get_level(GPIO_RSMRST_L_PGOOD);
- int rsmrst_out = gpio_get_level(GPIO_PCH_RSMRST_L);
-
- /*
- * This function is called when rsmrst changes state. If rsmrst
- * has been asserted (high -> low) then pass this new state to PCH.
- */
- if (!rsmrst_in && (rsmrst_in != rsmrst_out))
- gpio_set_level(GPIO_PCH_RSMRST_L, rsmrst_in);
-
- /*
- * Call the main power signal interrupt handler to wake up the chipset
- * task which handles low->high rsmrst pass through.
- */
- power_signal_interrupt(signal);
-}
-
-void common_intel_x86_handle_rsmrst(enum power_state state)
-{
- /*
- * Pass through RSMRST asynchronously, as PCH may not react
- * immediately to power changes.
- */
- int rsmrst_in = gpio_get_level(GPIO_RSMRST_L_PGOOD);
- int rsmrst_out = gpio_get_level(GPIO_PCH_RSMRST_L);
-
- /* Nothing to do. */
- if (rsmrst_in == rsmrst_out)
- return;
-
-#ifdef CONFIG_BOARD_HAS_BEFORE_RSMRST
- board_before_rsmrst(rsmrst_in);
-#endif
-
-#ifdef CONFIG_CHIPSET_APL_GLK
- /* Only passthrough RSMRST_L de-assertion on power up */
- if (rsmrst_in && !power_s5_up)
- return;
-#elif defined(CONFIG_CHIPSET_X86_RSMRST_DELAY)
- /*
- * Wait at least 10ms between power signals going high
- * and deasserting RSMRST to PCH.
- */
- if (rsmrst_in)
- msleep(10);
-#endif
-
- gpio_set_level(GPIO_PCH_RSMRST_L, rsmrst_in);
-
- CPRINTS("Pass through GPIO_RSMRST_L_PGOOD: %d", rsmrst_in);
-}
-
-#ifdef CONFIG_POWER_TRACK_HOST_SLEEP_STATE
-
-__overridable void power_board_handle_host_sleep_event(
- enum host_sleep_event state)
-{
- /* Default weak implementation -- no action required. */
-}
-
-__override void power_chipset_handle_host_sleep_event(
- enum host_sleep_event state,
- struct host_sleep_event_context *ctx)
-{
- power_board_handle_host_sleep_event(state);
-
-#ifdef CONFIG_POWER_S0IX
- if (state == HOST_SLEEP_EVENT_S0IX_SUSPEND) {
- /*
- * Indicate to power state machine that a new host event for
- * s0ix suspend has been received and so chipset suspend
- * notification needs to be sent to listeners.
- */
- s0ix_notify = S0IX_NOTIFY_SUSPEND;
-
- s0ix_start_suspend(ctx);
- power_signal_enable_interrupt(sleep_sig[SYS_SLEEP_S0IX]);
- } else if (state == HOST_SLEEP_EVENT_S0IX_RESUME) {
- /*
- * Wake up chipset task and indicate to power state machine that
- * listeners need to be notified of chipset resume.
- */
- s0ix_notify = S0IX_NOTIFY_RESUME;
- task_wake(TASK_ID_CHIPSET);
- lpc_s0ix_resume_restore_masks();
- power_signal_disable_interrupt(sleep_sig[SYS_SLEEP_S0IX]);
- s0ix_complete_resume(ctx);
-
- } else if (state == HOST_SLEEP_EVENT_DEFAULT_RESET) {
- power_signal_disable_interrupt(sleep_sig[SYS_SLEEP_S0IX]);
- }
-#endif
-
-}
-
-#endif
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- /*
- * Irrespective of cold_reset value, always toggle SYS_RESET_L to
- * perform a chipset reset. RCIN# which was used earlier to trigger
- * a warm reset is known to not work in certain cases where the CPU
- * is in a bad state (crbug.com/721853).
- *
- * The EC cannot control warm vs cold reset of the chipset using
- * SYS_RESET_L; it's more of a request.
- */
- CPRINTS("%s: %d", __func__, reason);
-
- /*
- * Toggling SYS_RESET_L will not have any impact when it's already
- * low (i,e. Chipset is in reset state).
- */
- if (gpio_get_level(GPIO_SYS_RESET_L) == 0) {
- CPRINTS("Chipset is in reset state");
- return;
- }
-
- report_ap_reset(reason);
-
- gpio_set_level(GPIO_SYS_RESET_L, 0);
- /*
- * Debounce time for SYS_RESET_L is 16 ms. Wait twice that period
- * to be safe.
- */
- udelay(32 * MSEC);
- gpio_set_level(GPIO_SYS_RESET_L, 1);
-}
diff --git a/power/intel_x86.h b/power/intel_x86.h
deleted file mode 100644
index b54c60e2c3..0000000000
--- a/power/intel_x86.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Intel X86 chipset power control module for Chrome EC */
-
-
-#ifndef __CROS_EC_INTEL_X86_H
-#define __CROS_EC_INTEL_X86_H
-
-#include "espi.h"
-#include "power.h"
-
-/* Chipset specific header files */
-/* Geminilake and apollolake use same power sequencing. */
-#ifdef CONFIG_CHIPSET_APL_GLK
-#include "apollolake.h"
-#elif defined(CONFIG_CHIPSET_CANNONLAKE)
-#include "cannonlake.h"
-#elif defined(CONFIG_CHIPSET_COMETLAKE)
-#include "cometlake.h"
-#elif defined(CONFIG_CHIPSET_COMETLAKE_DISCRETE)
-#include "cometlake-discrete.h"
-#elif defined(CONFIG_CHIPSET_ICL_TGL)
-#include "icelake.h"
-#elif defined(CONFIG_CHIPSET_SKYLAKE)
-#include "skylake.h"
-#endif
-
-/* GPIO for power signal */
-#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S3
-#define SLP_S3_SIGNAL_L VW_SLP_S3_L
-#else
-#define SLP_S3_SIGNAL_L GPIO_PCH_SLP_S3_L
-#endif
-#ifdef CONFIG_HOSTCMD_ESPI_VW_SLP_S4
-#define SLP_S4_SIGNAL_L VW_SLP_S4_L
-#else
-#define SLP_S4_SIGNAL_L GPIO_PCH_SLP_S4_L
-#endif
-
-/**
- * Handle RSMRST signal.
- *
- * @param state Current chipset state.
- */
-void common_intel_x86_handle_rsmrst(enum power_state state);
-
-/**
- * Force chipset to G3 state.
- *
- * @return power_state New chipset state.
- */
-enum power_state chipset_force_g3(void);
-
-/**
- * Handle power states.
- *
- * @param state Current chipset state.
- * @return power_state New chipset state.
- */
-enum power_state common_intel_x86_power_handle_state(enum power_state state);
-
-#endif /* __CROS_EC_INTEL_X86_H */
diff --git a/power/mt817x.c b/power/mt817x.c
deleted file mode 100644
index 368712965b..0000000000
--- a/power/mt817x.c
+++ /dev/null
@@ -1,815 +0,0 @@
-/* Copyright 2015 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * MT817x SoC power sequencing module for Chrome EC
- *
- * This implements the following features:
- *
- * - Cold reset powers on the AP
- *
- * When powered off:
- * - Press pwron turns on the AP
- * - Hold pwron turns on the AP, and then 8s later turns it off and leaves
- * it off until pwron is released and pressed again
- *
- * When powered on:
- * - The PMIC PWRON signal is released <= 1 second after the power button is
- * released
- * - Holding pwron for 8s powers off the AP
- * - Pressing and releasing pwron within that 8s is ignored
- * - If POWER_GOOD is dropped by the AP, then we power the AP off
- * - If SUSPEND_L goes low, enter suspend mode.
- *
- */
-
-#include "battery.h"
-#include "chipset.h" /* ./common/chipset.c implements chipset functions too */
-#include "common.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "keyboard_scan.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "power_led.h"
-#include "system.h"
-#include "task.h"
-#include "test_util.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-#define INT_BOTH_PULL_UP (GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH)
-
-/* masks for power signals */
-#define IN_POWER_GOOD POWER_SIGNAL_MASK(MTK_POWER_GOOD)
-#define IN_SUSPEND POWER_SIGNAL_MASK(MTK_SUSPEND_ASSERTED)
-
-/* Long power key press to force shutdown */
-#define DELAY_FORCE_SHUTDOWN (8000 * MSEC) /* 8 seconds */
-
-/*
- * The power signal from SoC should be kept at least 50ms.
- */
-#define POWER_DEBOUNCE_TIME (50 * MSEC)
-
-/*
- * The suspend signal from SoC should be kept at least 50ms.
- */
-#define SUSPEND_DEBOUNCE_TIME (50 * MSEC)
-
-/*
- * The time to bootup the PMIC from power-off to power-on.
- */
-#define PMIC_PWRON_PRESS_TIME (5000 * MSEC)
-
-/*
- * The minimum time to assert the PMIC THERM pin is 32us. However,
- * it needs to be extended to about 50ms to let the 5V rail
- * dissipate fully.
- */
-#define PMIC_THERM_HOLD_TIME (50 * MSEC)
-
-/*
- * If the power key is pressed to turn on, then held for this long, we
- * power off.
- *
- * Normal case: User releases power button and chipset_task() goes
- * into the inner loop, waiting for next event to occur (power button
- * press or POWER_GOOD == 0).
- */
-#define DELAY_SHUTDOWN_ON_POWER_HOLD (8000 * MSEC) /* 8 seconds */
-
-/*
- * The hold time for pulling down the PMIC_WARM_RESET_H pin so that
- * the AP can entery the recovery mode (flash SPI flash from USB).
- */
-#define PMIC_WARM_RESET_H_HOLD_TIME (4 * MSEC)
-
-/*
- * The hold time for pulling down the SYSTEM_POWER_H pin.
- */
-#define PMIC_COLD_RESET_L_HOLD_TIME \
- (SUSPEND_DEBOUNCE_TIME + POWER_DEBOUNCE_TIME + (20 * MSEC))
-
-/*
- * The first time the PMIC sees power (AC or battery) it needs 200ms (+/-12%
- * oscillator tolerance) for the RTC startup. In addition there is a startup
- * time of approx. 0.5msec until V2_5 regulator starts up. */
-#define PMIC_RTC_STARTUP (225 * MSEC)
-
-/* Wait for 5V power source stable */
-#define PMIC_WAIT_FOR_5V_POWER_GOOD (1 * MSEC)
-
-/*
- * If POWER_GOOD is lost, wait for PMIC to turn off its power completely
- * before we turn off VBAT by set_system_power(0)
- */
-#define PMIC_POWER_OFF_DELAY (50 * MSEC)
-
-/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
-/* 1 if the power button was pressed last time we checked */
-static char power_button_was_pressed;
-
-/* 1 if lid-open event has been detected */
-static char lid_opened;
-
-/* time where we will power off, if power button still held down */
-static timestamp_t power_off_deadline;
-
-/* force AP power on (used for recovery keypress) */
-static int auto_power_on;
-
-enum power_request_t {
- POWER_REQ_NONE,
- POWER_REQ_OFF,
- POWER_REQ_ON,
-
- POWER_REQ_COUNT,
-};
-
-static enum power_request_t power_request;
-
-/**
- * Return values for check_for_power_off_event().
- */
-enum power_off_event_t {
- POWER_OFF_CANCEL,
- POWER_OFF_BY_POWER_BUTTON_PRESSED,
- POWER_OFF_BY_LONG_PRESS,
- POWER_OFF_BY_POWER_GOOD_LOST,
- POWER_OFF_BY_POWER_REQ,
-
- POWER_OFF_EVENT_COUNT,
-};
-
-/**
- * Return values for check_for_power_on_event().
- */
-enum power_on_event_t {
- POWER_ON_CANCEL,
- POWER_ON_BY_IN_POWER_GOOD,
- POWER_ON_BY_AUTO_POWER_ON,
- POWER_ON_BY_LID_OPEN,
- POWER_ON_BY_POWER_BUTTON_PRESSED,
- POWER_ON_BY_POWER_REQ_NONE,
-
- POWER_ON_EVENT_COUNT,
-};
-
-/**
- * Parameters of mtk_backlight_override().
- */
-enum blacklight_override_t {
- MTK_BACKLIGHT_FORCE_OFF,
- MTK_BACKLIGHT_CONTROL_BY_SOC,
-
- MTK_BACKLIGHT_OVERRIDE_COUNT,
-};
-
-/* Forward declaration */
-static void chipset_turn_off_power_rails(void);
-
-/**
- * Check the suspend signal is on after SUSPEND_DEBOUNCE_TIME to avoid transient
- * state.
- *
- * @return non-zero if SUSPEND is asserted.
- */
-static int is_suspend_asserted(void)
-{
-#ifdef BOARD_OAK
- if ((power_get_signals() & IN_SUSPEND) &&
- (system_get_board_version() < 4))
- usleep(SUSPEND_DEBOUNCE_TIME);
-#endif
-
- return power_get_signals() & IN_SUSPEND;
-}
-
-/**
- * Check the suspend signal is off after SUSPEND_DEBOUNCE_TIME to avoid
- * transient state.
- *
- * @return non-zero if SUSPEND is deasserted.
- */
-static int is_suspend_deasserted(void)
-{
-#ifdef BOARD_OAK
- if (!(power_get_signals() & IN_SUSPEND) &&
- (system_get_board_version() < 4))
- usleep(SUSPEND_DEBOUNCE_TIME);
-#endif
-
- return !(power_get_signals() & IN_SUSPEND);
-}
-
-/**
- * Check power good signal is on after POWER_DEBOUNCE_TIME to avoid transient
- * state.
- *
- * @return non-zero if POWER_GOOD is asserted.
- */
-static int is_power_good_asserted(void)
-{
- if (!gpio_get_level(GPIO_SYSTEM_POWER_H))
- return 0;
-#ifdef BOARD_OAK
- else if ((power_get_signals() & IN_POWER_GOOD) &&
- (system_get_board_version() < 4))
- usleep(POWER_DEBOUNCE_TIME);
-#endif
-
- return power_get_signals() & IN_POWER_GOOD;
-}
-
-/**
- * Check power good signal is off after POWER_DEBOUNCE_TIME to avoid transient
- * state.
- *
- * @return non-zero if POWER_GOOD is deasserted.
- */
-static int is_power_good_deasserted(void)
-{
-#ifdef BOARD_OAK
- /*
- * Warm reset key from servo board lets the POWER_GOOD signal
- * deasserted temporarily (about 1~2 seconds) on rev4.
- * In order to detect this case, check the AP_RESET_L status,
- * ignore the transient state if reset key is pressing.
- */
- if (system_get_board_version() >= 4) {
- if (0 == gpio_get_level(GPIO_AP_RESET_L))
- return 0;
- } else {
- if (!(power_get_signals() & IN_POWER_GOOD))
- usleep(POWER_DEBOUNCE_TIME);
- }
-#endif
- if (0 == gpio_get_level(GPIO_AP_RESET_L))
- return 0;
-
- return !(power_get_signals() & IN_POWER_GOOD);
-}
-
-/**
- * Set the system power signal.
- *
- * @param asserted off (=0) or on (=1)
- */
-static void set_system_power(int asserted)
-{
- CPRINTS("set_system_power(%d)", asserted);
- gpio_set_level(GPIO_SYSTEM_POWER_H, asserted);
-}
-
-/**
- * Set the PMIC PWRON signal.
- *
- * Note that asserting requires holding for PMIC_PWRON_PRESS_TIME.
- *
- * @param asserted Assert (=1) or deassert (=0) the signal. This is the
- * logical level of the pin, not the physical level.
- */
-static void set_pmic_pwron(int asserted)
-{
- timestamp_t poll_deadline;
- /* Signal is active-high */
- CPRINTS("set_pmic_pwron(%d)", asserted);
- /* Oak rev1 power-on sequence:
- * raise GPIO_SYSTEM_POWER_H
- * wait for 5V power good, timeout 1 second
- */
- if (asserted) {
- set_system_power(asserted);
- poll_deadline = get_time();
- poll_deadline.val += SECOND;
- while (asserted && !gpio_get_level(GPIO_5V_POWER_GOOD) &&
- get_time().val < poll_deadline.val)
- usleep(PMIC_WAIT_FOR_5V_POWER_GOOD);
- if (!gpio_get_level(GPIO_5V_POWER_GOOD))
- CPRINTS("5V power not ready");
- }
-
- gpio_set_level(GPIO_PMIC_PWRON_H, asserted);
-}
-
-/**
- * Set the WARM RESET signal.
- *
- * @param asserted off (=0) or on (=1)
- */
-static void set_warm_reset(int asserted)
-{
- board_set_ap_reset(asserted);
-}
-
-/**
- * Check for some event triggering the shutdown.
- *
- * It can be either a long power button press or a shutdown triggered from the
- * AP and detected by reading POWER_GOOD.
- *
- * @return non-zero if a shutdown should happen, 0 if not
- */
-static int check_for_power_off_event(void)
-{
- timestamp_t now;
- int pressed = 0;
-
- /*
- * Check for power button press.
- */
- if (power_button_is_pressed()) {
- pressed = POWER_OFF_BY_POWER_BUTTON_PRESSED;
- } else if (power_request == POWER_REQ_OFF) {
- power_request = POWER_REQ_NONE;
- /* return non-zero for shudown down */
- return POWER_OFF_BY_POWER_REQ;
- }
-
- now = get_time();
- if (pressed) {
- if (!power_button_was_pressed) {
- power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
- CPRINTS("power waiting for long press %u",
- power_off_deadline.le.lo);
- /* Ensure we will wake up to check the power key */
- timer_arm(power_off_deadline, TASK_ID_CHIPSET);
- } else if (timestamp_expired(power_off_deadline, &now)) {
- power_off_deadline.val = 0;
- CPRINTS("power off after long press now=%u, %u",
- now.le.lo, power_off_deadline.le.lo);
- return POWER_OFF_BY_LONG_PRESS;
- }
- } else if (power_button_was_pressed) {
- CPRINTS("power off cancel");
- timer_cancel(TASK_ID_CHIPSET);
- }
-
- power_button_was_pressed = pressed;
-
- /* POWER_GOOD released by AP : shutdown immediate */
- if (is_power_good_deasserted()) {
- /*
- * Cancel long press timer if power is lost and the power button
- * still press, otherwise EC will crash.
- */
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- CPRINTS("POWER_GOOD is lost");
- return POWER_OFF_BY_POWER_GOOD_LOST;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-/**
- * Set the LCD backlight enable pin and override the signal from SoC.
- *
- * @param asserted MTK_BACKLIGHT_FORCE_OFF, force off the panel backlight
- * MTK_BACKLIGHT_CONTROL_BY_SOC, leave the control to SOC
- */
-static void mtk_backlight_override(enum blacklight_override_t asserted)
-{
- /* Signal is active-low */
- gpio_set_level(GPIO_EC_BL_OVERRIDE, !asserted);
-}
-
-static void mtk_lid_event(void)
-{
- enum blacklight_override_t bl_override;
-
- /* Override the panel backlight enable signal from SoC,
- * force the backlight off on lid close.
- */
- bl_override = lid_is_open() ?
- MTK_BACKLIGHT_CONTROL_BY_SOC :
- MTK_BACKLIGHT_FORCE_OFF;
- mtk_backlight_override(bl_override);
-
- /* Power task only cares about lid-open events */
- if (!lid_is_open())
- return;
-
- lid_opened = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, mtk_lid_event, HOOK_PRIO_DEFAULT);
-
-enum power_state power_chipset_init(void)
-{
- int init_power_state;
- uint32_t reset_flags = system_get_reset_flags();
-
- /*
- * Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
- * the AP could stay in strange state.
- */
- if (!(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("not sysjump; forcing AP shutdown");
- chipset_turn_off_power_rails();
-
- /*
- * The warm reset triggers AP into the recovery mode (
- * flash SPI from USB).
- */
- chipset_reset(CHIPSET_RESET_UNKNOWN);
-
- init_power_state = POWER_G3;
- } else {
- /* In the SYSJUMP case, we check if the AP is on */
- if (is_power_good_asserted()) {
- CPRINTS("SOC ON");
- /*
- * Check and release PMIC power button signal,
- * if it's deferred callback function is not triggered
- * in RO before SYSJUMP.
- */
- if (gpio_get_level(GPIO_PMIC_PWRON_H))
- set_pmic_pwron(0);
-
- init_power_state = POWER_S0;
- if (is_suspend_asserted())
- enable_sleep(SLEEP_MASK_AP_RUN);
- else
- disable_sleep(SLEEP_MASK_AP_RUN);
- } else {
- CPRINTS("SOC OFF");
- init_power_state = POWER_G3;
- enable_sleep(SLEEP_MASK_AP_RUN);
- }
- }
-
- /* Leave power off only if requested by reset flags */
- if (!(reset_flags & EC_RESET_FLAG_AP_OFF) &&
- !(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("reset_flag 0x%x", reset_flags);
- auto_power_on = 1;
- }
-
- /*
- * Some batteries use clock stretching feature, which requires
- * more time to be stable. See http://crosbug.com/p/28289
- */
- battery_wait_for_stable();
-
- return init_power_state;
-}
-
-/*****************************************************************************/
-/* Chipset interface */
-
-static void chipset_turn_off_power_rails(void)
-{
- /* Release the power on pin, if it was asserted */
- set_pmic_pwron(0);
-
- /* system power off */
- usleep(PMIC_POWER_OFF_DELAY);
- set_system_power(0);
-}
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s: %d", __func__, reason);
- report_ap_reset(reason);
-
- chipset_turn_off_power_rails();
-
- /* clean-up internal variable */
- power_request = POWER_REQ_NONE;
-}
-
-/*****************************************************************************/
-
-/**
- * Power off the AP
- */
-static void power_off(void)
-{
- /* Check the power off status */
- if (!gpio_get_level(GPIO_SYSTEM_POWER_H))
- return;
-
- /* Call hooks before we drop power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
- /* switch off all rails */
- chipset_turn_off_power_rails();
-
- /* Change SUSPEND_L pin to high-Z to reduce power draw. */
- gpio_set_flags(power_signal_list[MTK_SUSPEND_ASSERTED].gpio,
- GPIO_INPUT);
-
- /* Change EC_INT to low */
- gpio_set_level(GPIO_EC_INT_L, 0);
-
- lid_opened = 0;
- enable_sleep(SLEEP_MASK_AP_RUN);
-#ifdef HAS_TASK_POWERLED
- powerled_set_state(POWERLED_STATE_OFF);
-#endif
- CPRINTS("power shutdown complete");
-}
-
-/**
- * Check if there has been a power-on event
- *
- * This checks all power-on event signals and returns non-zero if any have been
- * triggered (with debounce taken into account).
- *
- * @return non-zero if there has been a power-on event, 0 if not.
- */
-static int check_for_power_on_event(void)
-{
- int ap_off_flag;
-
- ap_off_flag = system_get_reset_flags() & EC_RESET_FLAG_AP_OFF;
- system_clear_reset_flags(EC_RESET_FLAG_AP_OFF);
- /* check if system is already ON */
- if (is_power_good_asserted()) {
- if (ap_off_flag) {
- CPRINTS("system is on, but EC_RESET_FLAG_AP_OFF is on");
- return POWER_ON_CANCEL;
- } else {
- CPRINTS("system is on, thus clear " "auto_power_on");
- /* no need to arrange another power on */
- auto_power_on = 0;
- return POWER_ON_BY_IN_POWER_GOOD;
- }
- } else {
- if (ap_off_flag) {
- CPRINTS("EC_RESET_FLAG_AP_OFF is on");
- power_off();
- return POWER_ON_CANCEL;
- }
-
- CPRINTS("POWER_GOOD is not asserted");
- }
-
- /* power on requested at EC startup for recovery */
- if (auto_power_on) {
- auto_power_on = 0;
- return POWER_ON_BY_AUTO_POWER_ON;
- }
-
- /* Check lid open */
- if (lid_opened) {
- lid_opened = 0;
- return POWER_ON_BY_LID_OPEN;
- }
-
- /* check for power button press */
- if (power_button_is_pressed())
- return POWER_ON_BY_POWER_BUTTON_PRESSED;
-
- if (power_request == POWER_REQ_ON) {
- power_request = POWER_REQ_NONE;
- return POWER_ON_BY_POWER_REQ_NONE;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-void release_pmic_pwron_deferred(void)
-{
- /* Release PMIC power button */
- set_pmic_pwron(0);
-}
-DECLARE_DEFERRED(release_pmic_pwron_deferred);
-
-/**
- * Power on the AP
- */
-static void power_on(void)
-{
- uint64_t t;
-
- /* Set pull-up and enable interrupt */
- gpio_set_flags(power_signal_list[MTK_SUSPEND_ASSERTED].gpio,
- GPIO_INPUT | GPIO_PULL_UP | GPIO_INT_BOTH);
-
- /* Make sure we de-assert and GPIO_PMIC_WARM_RESET_H pin. */
- set_warm_reset(0);
-
- /*
- * Before we push PMIC power button, wait for the PMI RTC ready, which
- * takes PMIC_RTC_STARTUP from the AC/battery is plugged in.
- */
- t = get_time().val;
- if (t < PMIC_RTC_STARTUP) {
- uint32_t wait = PMIC_RTC_STARTUP - t;
-
- CPRINTS("wait for %dms for PMIC RTC start-up", wait / MSEC);
- usleep(wait);
- }
-
- /*
- * When power_on() is called, we are at S5S3. Initialize components
- * to ready state before AP is up.
- */
- hook_notify(HOOK_CHIPSET_PRE_INIT);
-
- /* Push the power button */
- set_pmic_pwron(1);
- hook_call_deferred(&release_pmic_pwron_deferred_data,
- PMIC_PWRON_PRESS_TIME);
-
- /* enable interrupt */
- gpio_set_flags(GPIO_SUSPEND_L, INT_BOTH_PULL_UP);
-
-#ifdef BOARD_OAK
- if (system_get_board_version() <= 3)
- gpio_set_flags(GPIO_EC_INT_L, GPIO_OUTPUT | GPIO_OUT_HIGH);
- else
- gpio_set_flags(GPIO_EC_INT_L, GPIO_ODR_HIGH);
-#else
- gpio_set_flags(GPIO_EC_INT_L, GPIO_ODR_HIGH);
-#endif
-
- disable_sleep(SLEEP_MASK_AP_RUN);
-#ifdef HAS_TASK_POWERLED
- powerled_set_state(POWERLED_STATE_ON);
-#endif
- /* Call hooks now that AP is running */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- CPRINTS("AP running ...");
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- CPRINTS("%s: %d", __func__, reason);
- report_ap_reset(reason);
-
- set_warm_reset(1);
- usleep(PMIC_WARM_RESET_H_HOLD_TIME);
- /* deassert the reset signals */
- set_warm_reset(0);
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- int value;
- static int boot_from_g3;
-
- switch (state) {
- case POWER_G3:
- boot_from_g3 = check_for_power_on_event();
- if (boot_from_g3)
- return POWER_G3S5;
- break;
-
- case POWER_G3S5:
- return POWER_S5;
-
- case POWER_S5:
- if (boot_from_g3) {
- value = boot_from_g3;
- boot_from_g3 = 0;
- } else {
- value = check_for_power_on_event();
- }
-
- if (value) {
- CPRINTS("power on %d", value);
- return POWER_S5S3;
- }
- return state;
-
- case POWER_S5S3:
- power_on();
- if (power_wait_signals(IN_POWER_GOOD) == EC_SUCCESS) {
- CPRINTS("POWER_GOOD seen");
- power_button_was_pressed = 0;
- return POWER_S3;
- } else {
- CPRINTS("POWER_GOOD not seen in time");
- }
- set_pmic_pwron(0);
- return POWER_S5;
-
- case POWER_S3:
- if (is_power_good_deasserted()) {
- power_off();
- return POWER_S3S5;
- } else if (is_suspend_deasserted())
- return POWER_S3S0;
- return state;
-
- case POWER_S3S0:
- disable_sleep(SLEEP_MASK_AP_RUN);
-#ifdef HAS_TASK_POWERLED
- powerled_set_state(POWERLED_STATE_ON);
-#endif
- hook_notify(HOOK_CHIPSET_RESUME);
- return POWER_S0;
-
- case POWER_S0:
- value = check_for_power_off_event();
- if (value) {
- CPRINTS("power off %d", value);
- power_off();
- return POWER_S0S3;
- } else if (is_suspend_asserted())
- return POWER_S0S3;
- return state;
-
- case POWER_S0S3:
-#ifdef HAS_TASK_POWERLED
- if (lid_is_open())
- powerled_set_state(POWERLED_STATE_SUSPEND);
- else
- powerled_set_state(POWERLED_STATE_OFF);
-#endif
- /*
- * if the power button is pressing, we need cancel the long
- * press timer, otherwise EC will crash.
- */
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- /* Call hooks here since we don't know it prior to AP suspend */
- hook_notify(HOOK_CHIPSET_SUSPEND);
- enable_sleep(SLEEP_MASK_AP_RUN);
- return POWER_S3;
-
- case POWER_S3S5:
- power_button_wait_for_release(-1);
- power_button_was_pressed = 0;
- return POWER_S5;
-
- case POWER_S5G3:
- return POWER_G3;
- }
-
- return state;
-}
-
-static void powerbtn_mtk_changed(void)
-{
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, powerbtn_mtk_changed, HOOK_PRIO_DEFAULT);
-
-/*****************************************************************************/
-/* Console debug command */
-
-static const char *power_req_name[POWER_REQ_COUNT] = {
- "none",
- "off",
- "on",
-};
-
-/* Power states that we can report */
-enum power_state_t {
- PSTATE_UNKNOWN,
- PSTATE_OFF,
- PSTATE_SUSPEND,
- PSTATE_ON,
-
- PSTATE_COUNT,
-};
-
-static const char * const state_name[] = {
- "unknown",
- "off",
- "suspend",
- "on",
-};
-
-static int command_power(int argc, char **argv)
-{
- int v;
-
- if (argc < 2) {
- enum power_state_t state;
-
- state = PSTATE_UNKNOWN;
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- state = PSTATE_OFF;
- if (chipset_in_state(CHIPSET_STATE_SUSPEND))
- state = PSTATE_SUSPEND;
- if (chipset_in_state(CHIPSET_STATE_ON))
- state = PSTATE_ON;
- ccprintf("%s\n", state_name[state]);
-
- return EC_SUCCESS;
- }
-
- if (!parse_bool(argv[1], &v))
- return EC_ERROR_PARAM1;
-
- power_request = v ? POWER_REQ_ON : POWER_REQ_OFF;
- ccprintf("Requesting power %s\n", power_req_name[power_request]);
- task_wake(TASK_ID_CHIPSET);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(power, command_power,
- "on/off",
- "Turn AP power on/off");
diff --git a/power/mt8183.c b/power/mt8183.c
deleted file mode 100644
index 44012eeb6a..0000000000
--- a/power/mt8183.c
+++ /dev/null
@@ -1,486 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* mt8183 chipset power control module for Chrome EC */
-
-#include "charge_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "task.h"
-#include "timer.h"
-#include "util.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Input state flags */
-#define IN_PGOOD_PMIC POWER_SIGNAL_MASK(PMIC_PWR_GOOD)
-#define IN_SUSPEND_ASSERTED POWER_SIGNAL_MASK(AP_IN_S3_L)
-
-/* Rails required for S3 and S0 */
-#define IN_PGOOD_S0 (IN_PGOOD_PMIC)
-#define IN_PGOOD_S3 (IN_PGOOD_PMIC)
-
-/* All inputs in the right state for S0 */
-#define IN_ALL_S0 (IN_PGOOD_S0 & ~IN_SUSPEND_ASSERTED)
-
-/* Long power key press to force shutdown in S0. go/crosdebug */
-#define FORCED_SHUTDOWN_DELAY (10 * SECOND)
-
-/* Long power key press to boot from S5/G3 state. */
-#ifndef POWERBTN_BOOT_DELAY
-#define POWERBTN_BOOT_DELAY (1 * SECOND)
-#endif
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-#define PMIC_EN_PULSE_MS 50
-
-/* Maximum time it should for PMIC to turn on after toggling PMIC_EN_ODL. */
-#define PMIC_EN_TIMEOUT (300 * MSEC)
-
-/*
- * Amount of time we need to hold PMIC_FORCE_RESET_ODL to ensure PMIC is really
- * off and will not restart on its own.
- */
-#define PMIC_FORCE_RESET_TIME (10 * SECOND)
-
-/* Data structure for a GPIO operation for power sequencing */
-struct power_seq_op {
- /* enum gpio_signal in 8 bits */
- uint8_t signal;
- uint8_t level;
- /* Number of milliseconds to delay after setting signal to level */
- uint8_t delay;
-};
-BUILD_ASSERT(GPIO_COUNT < 256);
-
-/*
- * This is the power sequence for POWER_S5S3.
- * The entries in the table are handled sequentially from the top
- * to the bottom.
- */
-
-static const struct power_seq_op s5s3_power_seq[] = {
- /* Release PMIC watchdog. */
- { GPIO_PMIC_WATCHDOG_L, 1, 0 },
- /* Turn on AP. */
- { GPIO_AP_SYS_RST_L, 1, 2 },
-};
-
-/* The power sequence for POWER_S3S0 */
-static const struct power_seq_op s3s0_power_seq[] = {
-};
-
-/* The power sequence for POWER_S0S3 */
-static const struct power_seq_op s0s3_power_seq[] = {
-};
-
-/* The power sequence for POWER_S3S5 */
-static const struct power_seq_op s3s5_power_seq[] = {
- /* Turn off AP. */
- { GPIO_AP_SYS_RST_L, 0, 0 },
- /* Assert watchdog to PMIC (there may be a 1.6ms debounce) */
- { GPIO_PMIC_WATCHDOG_L, 0, 3 },
-};
-
-static int forcing_shutdown;
-
-void chipset_reset_request_interrupt(enum gpio_signal signal)
-{
- chipset_reset(CHIPSET_RESET_AP_REQ);
-}
-
-/*
- * Triggers on falling edge of AP watchdog line only. The falling edge can
- * happen in these 3 cases:
- * - AP asserts watchdog while the AP is on: this is a real AP-initiated reset.
- * - EC asserted GPIO_AP_SYS_RST_L, so the AP is in reset and AP watchdog falls
- * as well. This is _not_ a watchdog reset. We mask these cases by disabling
- * the interrupt just before shutting down the AP, and re-enabling it just
- * after starting the AP.
- * - PMIC has shut down (e.g. the AP powered off by itself), this is not a
- * watchdog reset either. This should be covered by the case above if the
- * EC reacts quickly enough, but we mask those cases as well by testing if
- * the PMIC is still on when the watchdog line falls.
- */
-void chipset_watchdog_interrupt(enum gpio_signal signal)
-{
- if (power_get_signals() & IN_PGOOD_PMIC)
- chipset_reset(CHIPSET_RESET_AP_WATCHDOG);
-}
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /*
- * Force power off. This condition will reset once the state machine
- * transitions to G3.
- */
- forcing_shutdown = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-
-void chipset_force_shutdown_button(void)
-{
- chipset_force_shutdown(CHIPSET_SHUTDOWN_BUTTON);
-}
-DECLARE_DEFERRED(chipset_force_shutdown_button);
-
-void chipset_exit_hard_off_button(void)
-{
- /* Power up from off */
- forcing_shutdown = 0;
- chipset_exit_hard_off();
-}
-DECLARE_DEFERRED(chipset_exit_hard_off_button);
-
-/* If chipset needs to be reset, EC also reboots to RO. */
-void chipset_reset(enum chipset_reset_reason reason)
-{
- int flags = SYSTEM_RESET_HARD;
-
- CPRINTS("%s: %d", __func__, reason);
- report_ap_reset(reason);
-
- cflush();
- if (reason == CHIPSET_RESET_AP_WATCHDOG)
- flags |= SYSTEM_RESET_AP_WATCHDOG;
-
- system_reset(flags);
-
- /* This should not be reachable. */
- while (1)
- ;
-}
-
-enum power_state power_chipset_init(void)
-{
- /* Enable reboot / sleep control inputs from AP */
- gpio_enable_interrupt(GPIO_WARM_RESET_REQ);
- gpio_enable_interrupt(GPIO_AP_IN_SLEEP_L);
-
- if (system_jumped_to_this_image()) {
- if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
- disable_sleep(SLEEP_MASK_AP_RUN);
- gpio_enable_interrupt(GPIO_AP_EC_WATCHDOG_L);
- CPRINTS("already in S0");
- return POWER_S0;
- }
- } else if (system_get_reset_flags() & EC_RESET_FLAG_AP_OFF) {
- /* Force shutdown from S5 if the PMIC is already up. */
- if (power_get_signals() & IN_PGOOD_PMIC) {
- forcing_shutdown = 1;
- return POWER_S5;
- }
- } else {
- /* Auto-power on */
- chipset_exit_hard_off();
- }
-
- /* Start from S5 if the PMIC is already up. */
- if (power_get_signals() & IN_PGOOD_PMIC)
- return POWER_S5;
-
- return POWER_G3;
-}
-
-/*
- * If we have to force reset the PMIC, we only need to do so for a few seconds,
- * then we need to release the GPIO to prevent leakage in G3.
- */
-static void release_pmic_force_reset(void)
-{
- CPRINTS("Releasing PMIC force reset");
- gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
-}
-DECLARE_DEFERRED(release_pmic_force_reset);
-
-/**
- * Step through the power sequence table and do corresponding GPIO operations.
- *
- * @param power_seq_ops The pointer to the power sequence table.
- * @param op_count The number of entries of power_seq_ops.
- */
-static void power_seq_run(const struct power_seq_op *power_seq_ops,
- int op_count)
-{
- int i;
-
- for (i = 0; i < op_count; i++) {
- gpio_set_level(power_seq_ops[i].signal,
- power_seq_ops[i].level);
- if (!power_seq_ops[i].delay)
- continue;
- msleep(power_seq_ops[i].delay);
- }
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- /*
- * Set if we already had a rising edge on AP_SYS_RST_L. If so, any
- * subsequent boot attempt will require an EC reset.
- */
- static int booted;
-
- /* Retry S5->S3 transition, if not zero. */
- static int s5s3_retry;
-
- /*
- * PMIC power went away (AP most likely decided to shut down):
- * transition to S5, G3.
- */
- static int ap_shutdown;
-
- switch (state) {
- case POWER_G3:
- /* Go back to S5->G3 if the PMIC unexpectedly starts again. */
- if (power_get_signals() & IN_PGOOD_PMIC)
- return POWER_S5G3;
- break;
-
- case POWER_S5:
- /*
- * If AP initiated shutdown, PMIC is off, and we can transition
- * to G3 immediately.
- */
- if (ap_shutdown) {
- ap_shutdown = 0;
- return POWER_S5G3;
- } else if (!forcing_shutdown) {
- /* Powering up. */
- s5s3_retry = 1;
- return POWER_S5S3;
- }
-
- /* Forcing shutdown */
-
- /* Long press has worked, transition to G3. */
- if (!(power_get_signals() & IN_PGOOD_PMIC))
- return POWER_S5G3;
-
- /*
- * Try to force PMIC shutdown with a long press. This takes 8s,
- * shorter than the common code S5->G3 timeout (10s).
- */
- CPRINTS("Forcing shutdown with long press.");
- gpio_set_level(GPIO_PMIC_EN_ODL, 0);
-
- /*
- * Stay in S5, common code will drop to G3 after timeout
- * if the long press does not work.
- */
- return POWER_S5;
-
- case POWER_S3:
- if (!power_has_signals(IN_PGOOD_S3) || forcing_shutdown)
- return POWER_S3S5;
- else if (!(power_get_signals() & IN_SUSPEND_ASSERTED))
- return POWER_S3S0;
- break;
-
- case POWER_S0:
- if (!power_has_signals(IN_PGOOD_S0) ||
- forcing_shutdown ||
- power_get_signals() & IN_SUSPEND_ASSERTED)
- return POWER_S0S3;
-
- break;
-
- case POWER_G3S5:
- forcing_shutdown = 0;
-
- hook_call_deferred(&release_pmic_force_reset_data, -1);
- gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 1);
-
- /* Power up to next state */
- return POWER_S5;
-
- case POWER_S5S3:
- hook_notify(HOOK_CHIPSET_PRE_INIT);
-
- /*
- * Release power button in case it was pressed by force shutdown
- * sequence.
- */
- gpio_set_level(GPIO_PMIC_EN_ODL, 1);
-
- /* If PMIC is off, switch it on by pulsing PMIC enable. */
- if (!(power_get_signals() & IN_PGOOD_PMIC)) {
- msleep(PMIC_EN_PULSE_MS);
- gpio_set_level(GPIO_PMIC_EN_ODL, 0);
- msleep(PMIC_EN_PULSE_MS);
- gpio_set_level(GPIO_PMIC_EN_ODL, 1);
- }
-
- /* If EC is in RW, or has already booted once, reboot to RO. */
- if (system_get_image_copy() != SYSTEM_IMAGE_RO || booted) {
- /*
- * TODO(b:109850749): How quickly does the EC come back
- * up? Would IN_PGOOD_PMIC be ready by the time we are
- * back? According to PMIC spec, it should take ~158 ms
- * after debounce (32 ms), minus PMIC_EN_PULSE_MS above.
- * It would be good to avoid another _EN pulse above.
- */
- chipset_reset(CHIPSET_RESET_AP_REQ);
- }
-
- /*
- * Wait for PMIC to bring up rails. Retry if it fails
- * (it may take 2 attempts on restart after we use
- * force reset).
- */
- if (power_wait_signals_timeout(IN_PGOOD_PMIC,
- PMIC_EN_TIMEOUT)) {
- if (s5s3_retry) {
- s5s3_retry = 0;
- return POWER_S5S3;
- }
- /* Give up, go back to G3. */
- return POWER_S5G3;
- }
-
- booted = 1;
- /* Enable S3 power supplies, release AP reset. */
- power_seq_run(s5s3_power_seq, ARRAY_SIZE(s5s3_power_seq));
- gpio_enable_interrupt(GPIO_AP_EC_WATCHDOG_L);
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- /* Power up to next state */
- return POWER_S3;
-
- case POWER_S3S0:
- power_seq_run(s3s0_power_seq, ARRAY_SIZE(s3s0_power_seq));
-
- if (power_wait_signals(IN_PGOOD_S0)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
- return POWER_S0S3;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_RESUME);
-
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- /* Power up to next state */
- return POWER_S0;
-
- case POWER_S0S3:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SUSPEND);
-
- /*
- * TODO(b:109850749): Check if we need some delay here to
- * "debounce" entering suspend (rk3399 uses 20ms delay).
- */
-
- power_seq_run(s0s3_power_seq, ARRAY_SIZE(s0s3_power_seq));
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S3 or lower.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
-
- /*
- * In case the power button is held awaiting power-off timeout,
- * power off immediately now that we're entering S3.
- */
- if (power_button_is_pressed()) {
- forcing_shutdown = 1;
- hook_call_deferred(&chipset_force_shutdown_button_data,
- -1);
- }
-
- return POWER_S3;
-
- case POWER_S3S5:
- /* PMIC has shutdown, transition to G3. */
- if (!(power_get_signals() & IN_PGOOD_PMIC))
- ap_shutdown = 1;
-
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- gpio_disable_interrupt(GPIO_AP_EC_WATCHDOG_L);
- power_seq_run(s3s5_power_seq, ARRAY_SIZE(s3s5_power_seq));
-
- /* Start shutting down */
- return POWER_S5;
-
- case POWER_S5G3:
- /* Release the power button, in case it was long pressed. */
- if (forcing_shutdown)
- gpio_set_level(GPIO_PMIC_EN_ODL, 1);
-
- /*
- * If PMIC is still not off, assert PMIC_FORCE_RESET_ODL.
- * This should only happen for forced shutdown where the AP is
- * not able to send a command to the PMIC, and where the long
- * power+home press did not work (if the PMIC is misconfigured).
- * Also, PMIC will lose RTC state, in that case.
- */
- if (power_get_signals() & IN_PGOOD_PMIC) {
- CPRINTS("Forcing PMIC off");
- gpio_set_level(GPIO_PMIC_FORCE_RESET_ODL, 0);
- msleep(5);
- hook_call_deferred(&release_pmic_force_reset_data,
- PMIC_FORCE_RESET_TIME);
-
- return POWER_S5G3;
- }
-
- return POWER_G3;
- }
-
- return state;
-}
-
-static void power_button_changed(void)
-{
- if (power_button_is_pressed()) {
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- hook_call_deferred(&chipset_exit_hard_off_button_data,
- POWERBTN_BOOT_DELAY);
-
- /* Delayed power down from S0/S3, cancel on PB release */
- hook_call_deferred(&chipset_force_shutdown_button_data,
- FORCED_SHUTDOWN_DELAY);
- } else {
- /* Power button released, cancel deferred shutdown/boot */
- hook_call_deferred(&chipset_exit_hard_off_button_data, -1);
- hook_call_deferred(&chipset_force_shutdown_button_data, -1);
- }
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, power_button_changed, HOOK_PRIO_DEFAULT);
-
-#ifdef CONFIG_LID_SWITCH
-static void lid_changed(void)
-{
- /* Power-up from off on lid open */
- if (lid_is_open() && chipset_in_state(CHIPSET_STATE_ANY_OFF))
- chipset_exit_hard_off();
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, lid_changed, HOOK_PRIO_DEFAULT);
-#endif
diff --git a/power/rk3288.c b/power/rk3288.c
deleted file mode 100644
index a44df2ffbc..0000000000
--- a/power/rk3288.c
+++ /dev/null
@@ -1,574 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * Rockchip SoC power sequencing module for Chrome EC
- *
- * This implements the following features:
- *
- * - Cold reset powers on the AP
- *
- * When powered off:
- * - Press pwron turns on the AP
- * - Hold pwron turns on the AP, and then 9s later turns it off and leaves
- * it off until pwron is released and pressed again
- *
- * When powered on:
- * - Holding pwron for 10.2s powers off the AP
- * - Pressing and releasing pwron within that 10.2s is ignored
- * - If POWER_GOOD is dropped by the pmic, then we cut off the pmic source
- * - If SUSPEND_L goes low, enter suspend mode.
- *
- */
-
-#include "battery.h"
-#include "charge_state.h"
-#include "chipset.h" /* This module implements chipset functions too */
-#include "clock.h"
-#include "common.h"
-#include "console.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "keyboard_scan.h"
-#include "power.h"
-#include "power_button.h"
-#include "power_led.h"
-#include "system.h"
-#include "task.h"
-#include "timer.h"
-#include "util.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* masks for power signals */
-#define IN_POWER_GOOD POWER_SIGNAL_MASK(RK_POWER_GOOD)
-#define IN_SUSPEND POWER_SIGNAL_MASK(RK_SUSPEND_ASSERTED)
-
-/* Long power key press to force shutdown */
-#define DELAY_FORCE_SHUTDOWN (8 * SECOND)
-
-/*
- * If the power key is pressed to turn on, then held for this long, we
- * power off.
- *
- * Normal case: User releases power button and chipset_task() goes
- * into the inner loop, waiting for next event to occur (power button
- * press or power good == 0).
- */
-#define DELAY_SHUTDOWN_ON_POWER_HOLD (8 * SECOND)
-
-/*
- * The hold time for pulling down the PMIC_WARM_RESET_L pin so that
- * the AP can entery the recovery mode (flash SPI flash from USB).
- */
-#define PMIC_WARM_RESET_L_HOLD_TIME (4 * MSEC)
-
-/*
- * Startup time for the PMIC source regulator.
- */
-#define PMIC_SOURCE_STARTUP_TIME (50 * MSEC)
-
-/*
- * Time before PMIC can be reset.
- */
-#define PMIC_STARTUP_MS 300
-
-/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
-/* 1 if the power button was pressed last time we checked */
-static char power_button_was_pressed;
-
-/* 1 if lid-open event has been detected */
-static char lid_opened;
-
-/* time where we will power off, if power button still held down */
-static timestamp_t power_off_deadline;
-
-/* force AP power on (used for recovery keypress) */
-static int auto_power_on;
-
-enum power_request_t {
- POWER_REQ_NONE,
- POWER_REQ_OFF,
- POWER_REQ_ON,
-
- POWER_REQ_COUNT,
-};
-
-static enum power_request_t power_request;
-
-
-/* Forward declaration */
-static void chipset_turn_off_power_rails(void);
-
-
-/**
- * Set the PMIC WARM RESET signal.
- *
- * @param asserted Resetting (=0) or idle (=1)
- */
-static void set_pmic_warm_reset(int asserted)
-{
- /* Signal is active-low */
- gpio_set_level(GPIO_PMIC_WARM_RESET_L, asserted ? 0 : 1);
-}
-
-
-/**
- * Set the PMIC PWRON signal.
- *
- * @param asserted Assert (=1) or deassert (=0) the signal.
- */
-static void set_pmic_pwron(int asserted)
-{
- /* Signal is active-high */
- gpio_set_level(GPIO_PMIC_PWRON, asserted ? 1 : 0);
-}
-
-/**
- * Set the PMIC source to force shutdown the AP.
- *
- * @param asserted Assert (=1) or deassert (=0) the signal.
- */
-static void set_pmic_source(int asserted)
-{
- /* Signal is active-high */
- gpio_set_level(GPIO_PMIC_SOURCE_PWREN, asserted ? 1 : 0);
-}
-
-/**
- * Check for some event triggering the shutdown.
- *
- * It can be either a long power button press or a shutdown triggered from the
- * AP and detected by reading POWER_GOOD.
- *
- * @return non-zero if a shutdown should happen, 0 if not
- */
-static int check_for_power_off_event(void)
-{
- timestamp_t now;
- int pressed = 0;
- int ret = 0;
-
- /*
- * Check for power button press.
- */
- if (power_button_is_pressed()) {
- pressed = 1;
- } else if (power_request == POWER_REQ_OFF) {
- power_request = POWER_REQ_NONE;
- return 4; /* return non-zero for shudown down */
- }
-
- now = get_time();
- if (pressed) {
- if (!power_button_was_pressed) {
- power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
- CPRINTS("power waiting for long press %u",
- power_off_deadline.le.lo);
- /* Ensure we will wake up to check the power key */
- timer_arm(power_off_deadline, TASK_ID_CHIPSET);
- } else if (timestamp_expired(power_off_deadline, &now)) {
- power_off_deadline.val = 0;
- CPRINTS("power off after long press now=%u, %u",
- now.le.lo, power_off_deadline.le.lo);
- return 2;
- }
- } else if (power_button_was_pressed) {
- CPRINTS("power off cancel");
- timer_cancel(TASK_ID_CHIPSET);
- }
-
- /* POWER_GOOD released by AP : shutdown immediately */
- if (!power_has_signals(IN_POWER_GOOD)) {
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
- ret = 3;
- }
-
- power_button_was_pressed = pressed;
-
- return ret;
-}
-
-static void rockchip_lid_event(void)
-{
- /* Power task only cares about lid-open events */
- if (!lid_is_open())
- return;
-
- lid_opened = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, rockchip_lid_event, HOOK_PRIO_DEFAULT);
-
-enum power_state power_chipset_init(void)
-{
- int init_power_state;
- uint32_t reset_flags = system_get_reset_flags();
-
- /*
- * Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
- * the AP could stay in strange state.
- */
- if (!(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("not sysjump; forcing AP shutdown");
- chipset_turn_off_power_rails();
-
- /*
- * The warm reset triggers AP into the RK recovery mode (
- * flash SPI from USB).
- */
- chipset_reset(CHIPSET_RESET_INIT);
-
- init_power_state = POWER_G3;
- } else {
- /* In the SYSJUMP case, we check if the AP is on */
- if (power_get_signals() & IN_POWER_GOOD)
- init_power_state = POWER_S0;
- else
- init_power_state = POWER_G3;
- }
-
- /* Leave power off only if requested by reset flags */
- if (!(reset_flags & EC_RESET_FLAG_AP_OFF) &&
- !(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("auto_power_on set due to reset_flag 0x%x",
- system_get_reset_flags());
- auto_power_on = 1;
- }
-
- /*
- * Some batteries use clock stretching feature, which requires
- * more time to be stable. See http://crosbug.com/p/28289
- */
- battery_wait_for_stable();
-
- return init_power_state;
-}
-
-/*****************************************************************************/
-/* Chipset interface */
-
-static void chipset_turn_off_power_rails(void)
-{
- /* Release the power on pin, if it was asserted */
- set_pmic_pwron(0);
- /* Close the pmic power source immediately */
- set_pmic_source(0);
-
- /* Keep AP and PMIC in reset the whole time */
- set_pmic_warm_reset(1);
-}
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
- chipset_turn_off_power_rails();
-
- /* clean-up internal variable */
- power_request = POWER_REQ_NONE;
-}
-
-/*****************************************************************************/
-
-/**
- * Check if there has been a power-on event
- *
- * This checks all power-on event signals and returns non-zero if any have been
- * triggered (with debounce taken into account).
- *
- * @return non-zero if there has been a power-on event, 0 if not.
- */
-static int check_for_power_on_event(void)
-{
- int ap_off_flag;
-
- ap_off_flag = system_get_reset_flags() & EC_RESET_FLAG_AP_OFF;
- system_clear_reset_flags(EC_RESET_FLAG_AP_OFF);
- /* check if system is already ON */
- if (power_get_signals() & IN_POWER_GOOD) {
- if (ap_off_flag) {
- CPRINTS(
- "system is on, but "
- "EC_RESET_FLAG_AP_OFF is on");
- return 0;
- } else {
- CPRINTS(
- "system is on, thus clear "
- "auto_power_on");
- /* no need to arrange another power on */
- auto_power_on = 0;
- return 1;
- }
- }
-
- /* power on requested at EC startup for recovery */
- if (auto_power_on) {
- auto_power_on = 0;
- return 2;
- }
-
- /* Check lid open */
- if (lid_opened) {
- lid_opened = 0;
- return 3;
- }
-
- /* check for power button press */
- if (power_button_is_pressed())
- return 4;
-
- if (power_request == POWER_REQ_ON) {
- power_request = POWER_REQ_NONE;
- return 5;
- }
-
- return 0;
-}
-
-/**
- * Power on the AP
- */
-static void power_on(void)
-{
- int i;
-
- set_pmic_source(1);
- usleep(PMIC_SOURCE_STARTUP_TIME);
-
- set_pmic_pwron(1);
- /*
- * BUG Workaround(crosbug.com/p/31635): usleep hangs in task when using
- * big delays.
- */
- for (i = 0; i < PMIC_STARTUP_MS; i++)
- usleep(1 * MSEC);
-
- set_pmic_warm_reset(0);
-}
-
-/**
- * Power off the AP
- */
-static void power_off(void)
-{
- unsigned int power_off_timeout = 100; /* ms */
-
- /* Call hooks before we drop power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
- /* switch off all rails */
- chipset_turn_off_power_rails();
- /* Change SUSPEND_L and EC_INT pin to high-Z to reduce power draw. */
- gpio_set_flags(GPIO_SUSPEND_L, GPIO_INPUT);
- gpio_set_flags(GPIO_EC_INT_L, GPIO_INPUT);
-
- /* Wait till we actually turn off to not mess up the state machine. */
- while (power_get_signals() & IN_POWER_GOOD) {
- msleep(1);
- power_off_timeout--;
- ASSERT(power_off_timeout);
- }
-
- lid_opened = 0;
- enable_sleep(SLEEP_MASK_AP_RUN);
- powerled_set_state(POWERLED_STATE_OFF);
-
- CPRINTS("power shutdown complete");
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- CPRINTS("assert GPIO_PMIC_WARM_RESET_L for %d ms",
- PMIC_WARM_RESET_L_HOLD_TIME / MSEC);
- set_pmic_warm_reset(1);
- usleep(PMIC_WARM_RESET_L_HOLD_TIME);
- set_pmic_warm_reset(0);
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- int value;
- static int boot_from_g3;
-
- switch (state) {
- case POWER_G3:
- boot_from_g3 = check_for_power_on_event();
- if (boot_from_g3)
- return POWER_G3S5;
- break;
-
- case POWER_G3S5:
- return POWER_S5;
-
- case POWER_S5:
- if (boot_from_g3) {
- value = boot_from_g3;
- boot_from_g3 = 0;
- } else {
- value = check_for_power_on_event();
- }
-
- if (value) {
- CPRINTS("power on %d", value);
- return POWER_S5S3;
- }
- return state;
-
- case POWER_S5S3:
- hook_notify(HOOK_CHIPSET_PRE_INIT);
-
- power_on();
-
- disable_sleep(SLEEP_MASK_AP_RUN);
- powerled_set_state(POWERLED_STATE_ON);
-
- if (power_wait_signals(IN_POWER_GOOD) == EC_SUCCESS) {
- CPRINTS("POWER_GOOD seen");
- if (power_button_wait_for_release(
- DELAY_SHUTDOWN_ON_POWER_HOLD) ==
- EC_SUCCESS) {
- power_button_was_pressed = 0;
- set_pmic_pwron(0);
-
- /* setup misc gpio for S3/S0 functionality */
- gpio_set_flags(GPIO_SUSPEND_L, GPIO_INPUT
- | GPIO_INT_BOTH | GPIO_PULL_DOWN);
- gpio_set_flags(GPIO_EC_INT_L, GPIO_OUTPUT
- | GPIO_OUT_HIGH);
-
- /* Call hooks now that AP is running */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- return POWER_S3;
- } else {
- CPRINTS("long-press button, shutdown");
- power_off();
- /*
- * Since the AP may be up already, return S0S3
- * state to go through the suspend hook.
- */
- return POWER_S0S3;
- }
- } else {
- CPRINTS("POWER_GOOD not seen in time");
- }
-
- chipset_turn_off_power_rails();
- return POWER_S5;
-
- case POWER_S3:
- if (!(power_get_signals() & IN_POWER_GOOD))
- return POWER_S3S5;
- else if (!(power_get_signals() & IN_SUSPEND))
- return POWER_S3S0;
- return state;
-
- case POWER_S3S0:
- powerled_set_state(POWERLED_STATE_ON);
- hook_notify(HOOK_CHIPSET_RESUME);
- return POWER_S0;
-
- case POWER_S0:
- value = check_for_power_off_event();
- if (value) {
- CPRINTS("power off %d", value);
- power_off();
- return POWER_S0S3;
- } else if (power_get_signals() & IN_SUSPEND)
- return POWER_S0S3;
- return state;
-
- case POWER_S0S3:
- if (lid_is_open())
- powerled_set_state(POWERLED_STATE_SUSPEND);
- else
- powerled_set_state(POWERLED_STATE_OFF);
- /* Call hooks here since we don't know it prior to AP suspend */
- hook_notify(HOOK_CHIPSET_SUSPEND);
- return POWER_S3;
-
- case POWER_S3S5:
- power_button_wait_for_release(-1);
- power_button_was_pressed = 0;
- return POWER_S5;
-
- case POWER_S5G3:
- return POWER_G3;
- }
-
- return state;
-}
-
-static void powerbtn_rockchip_changed(void)
-{
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, powerbtn_rockchip_changed,
- HOOK_PRIO_DEFAULT);
-
-/*****************************************************************************/
-/* Console debug command */
-
-static const char *power_req_name[POWER_REQ_COUNT] = {
- "none",
- "off",
- "on",
-};
-
-/* Power states that we can report */
-enum power_state_t {
- PSTATE_UNKNOWN,
- PSTATE_OFF,
- PSTATE_SUSPEND,
- PSTATE_ON,
-
- PSTATE_COUNT,
-};
-
-static const char * const state_name[] = {
- "unknown",
- "off",
- "suspend",
- "on",
-};
-
-static int command_power(int argc, char **argv)
-{
- int v;
-
- if (argc < 2) {
- enum power_state_t state;
-
- state = PSTATE_UNKNOWN;
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- state = PSTATE_OFF;
- if (chipset_in_state(CHIPSET_STATE_SUSPEND))
- state = PSTATE_SUSPEND;
- if (chipset_in_state(CHIPSET_STATE_ON))
- state = PSTATE_ON;
- ccprintf("%s\n", state_name[state]);
-
- return EC_SUCCESS;
- }
-
- if (!parse_bool(argv[1], &v))
- return EC_ERROR_PARAM1;
-
- power_request = v ? POWER_REQ_ON : POWER_REQ_OFF;
- ccprintf("Requesting power %s\n", power_req_name[power_request]);
- task_wake(TASK_ID_CHIPSET);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(power, command_power,
- "on/off",
- "Turn AP power on/off");
diff --git a/power/rk3399.c b/power/rk3399.c
deleted file mode 100644
index 9f146fccf9..0000000000
--- a/power/rk3399.c
+++ /dev/null
@@ -1,607 +0,0 @@
-/* Copyright 2013 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* rk3399 chipset power control module for Chrome EC */
-
-/*
- * The description of each CONFIG_CHIPSET_POWER_SEQ_VERSION:
- *
- * Version 0: Initial/default revision for clamshell / convertible.
- * Version 1: Simplified power tree for tablet / detachable.
- */
-
-#include "charge_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "task.h"
-#include "timer.h"
-#include "usb_charge.h"
-#include "util.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Input state flags */
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
- #define IN_PGOOD_PP1250_S3 POWER_SIGNAL_MASK(PP1250_S3_PWR_GOOD)
- #define IN_PGOOD_PP900_S0 POWER_SIGNAL_MASK(PP900_S0_PWR_GOOD)
-#else
- #define IN_PGOOD_PP5000 POWER_SIGNAL_MASK(PP5000_PWR_GOOD)
- #define IN_PGOOD_SYS POWER_SIGNAL_MASK(SYS_PWR_GOOD)
-#endif
-
-#define IN_PGOOD_AP POWER_SIGNAL_MASK(AP_PWR_GOOD)
-#define IN_SUSPEND_DEASSERTED POWER_SIGNAL_MASK(SUSPEND_DEASSERTED)
-
-/* Rails requires for S3 and S0 */
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
- #define IN_PGOOD_S3 (IN_PGOOD_PP1250_S3)
- #define IN_PGOOD_S0 (IN_PGOOD_S3 | IN_PGOOD_PP900_S0 | IN_PGOOD_AP)
- /* This board can optionally wake-on-USB in S3 */
- #define S3_USB_WAKE
- /* This board has non-INT power signal pins */
- #define POWER_SIGNAL_POLLING
- /* This board supports CR50 deep sleep mode */
- #define CR50_DEEP_SLEEP
- /*
- * If AP_PWR_GOOD assertion does not trigger an interrupt, poll the
- * signal every 5ms, up to 200 times (~ 1 second timeout).
- */
- #define PGOOD_S0_POLL_TIMEOUT (5 * MSEC)
- #define PGOOD_S0_POLL_TRIES 200
-#else
- #define IN_PGOOD_S3 (IN_PGOOD_PP5000)
- #define IN_PGOOD_S0 (IN_PGOOD_S3 | IN_PGOOD_AP | IN_PGOOD_SYS)
-#endif
-
-/* All inputs in the right state for S0 */
-#define IN_ALL_S0 (IN_PGOOD_S0 | IN_SUSPEND_DEASSERTED)
-
-/* Long power key press to force shutdown in S0 */
-#define FORCED_SHUTDOWN_DELAY (8 * SECOND)
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-/* Data structure for a GPIO operation for power sequencing */
-struct power_seq_op {
- /* enum gpio_signal in 8 bits */
- uint8_t signal;
- uint8_t level;
- /* Number of milliseconds to delay after setting signal to level */
- uint8_t delay;
-};
-BUILD_ASSERT(GPIO_COUNT < 256);
-
-/*
- * This is the power sequence for POWER_S5S3.
- * The entries in the table are handled sequentially from the top
- * to the bottom.
- */
-
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
-static const struct power_seq_op s5s3_power_seq[] = {
- { GPIO_PP900_S3_EN, 1, 2 },
- { GPIO_PP3300_S3_EN, 1, 2 },
- { GPIO_PP1800_S3_EN, 1, 2 },
- { GPIO_PP1250_S3_EN, 1, 2 },
-};
-#else
-static const struct power_seq_op s5s3_power_seq[] = {
- { GPIO_PPVAR_LOGIC_EN, 1, 0 },
- { GPIO_PP900_AP_EN, 1, 0 },
- { GPIO_PP900_PCIE_EN, 1, 2 },
- { GPIO_PP900_PMU_EN, 1, 0 },
- { GPIO_PP900_PLL_EN, 1, 0 },
- { GPIO_PP900_USB_EN, 1, 2 },
- { GPIO_SYS_RST_L, 0, 0 },
- { GPIO_PP1800_PMU_EN_L, 0, 2 },
- { GPIO_LPDDR_PWR_EN, 1, 2 },
- { GPIO_PP1800_USB_EN_L, 0, 2 },
- { GPIO_PP3300_USB_EN_L, 0, 0 },
- { GPIO_PP5000_EN, 1, 0 },
- { GPIO_PP3300_TRACKPAD_EN_L, 0, 1 },
- { GPIO_PP1800_LID_EN_L, 0, 0 },
- { GPIO_PP1800_SIXAXIS_EN_L, 0, 2 },
- { GPIO_PP1800_SENSOR_EN_L, 0, 0 },
-};
-#endif
-
-/* The power sequence for POWER_S3S0 */
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
-static const struct power_seq_op s3s0_power_seq[] = {
- { GPIO_AP_CORE_EN, 1, 2 },
- { GPIO_PP1800_S0_EN, 1, 0 },
-};
-#else
-static const struct power_seq_op s3s0_power_seq[] = {
- { GPIO_PPVAR_CLOGIC_EN, 1, 2 },
- { GPIO_PP900_DDRPLL_EN, 1, 2 },
- { GPIO_PP1800_AP_AVDD_EN_L, 0, 2 },
- { GPIO_AP_CORE_EN, 1, 2 },
- { GPIO_PP1800_S0_EN_L, 0, 2 },
- { GPIO_PP3300_S0_EN_L, 0, 0 },
-};
-#endif
-
-#ifdef S3_USB_WAKE
-/* Sigs that may already be on in S3, if we need to wake-on-USB */
-static const struct power_seq_op s3s0_usb_wake_power_seq[] = {
- { GPIO_PP900_S0_EN, 1, 2 },
- { GPIO_PP1800_USB_EN, 1, 2 },
- { GPIO_PP3300_S0_EN, 1, 2 },
-};
-#endif
-
-/* The power sequence for POWER_S0S3 */
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
-static const struct power_seq_op s0s3_power_seq[] = {
- { GPIO_AP_CORE_EN, 0, 20 },
-};
-#else
-static const struct power_seq_op s0s3_power_seq[] = {
- { GPIO_PP3300_S0_EN_L, 1, 20 },
- { GPIO_PP1800_S0_EN_L, 1, 1 },
- { GPIO_AP_CORE_EN, 0, 20 },
- { GPIO_PP1800_AP_AVDD_EN_L, 1, 1 },
- { GPIO_PP900_DDRPLL_EN, 0, 1 },
- { GPIO_PPVAR_CLOGIC_EN, 0, 0 },
-};
-#endif
-
-#ifdef S3_USB_WAKE
-/* Sigs that need to be left on in S3, if we need to wake-on-USB */
-static const struct power_seq_op s0s3_usb_wake_power_seq[] = {
- { GPIO_PP3300_S0_EN, 0, 20 },
- { GPIO_PP1800_S0_EN, 0, 1 },
- { GPIO_PP1800_USB_EN, 0, 1 },
- { GPIO_PP900_S0_EN, 0, 0 },
-};
-#endif
-
-/* The power sequence for POWER_S3S5 */
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
-static const struct power_seq_op s3s5_power_seq[] = {
- { GPIO_SYS_RST_L, 0, 0 },
- { GPIO_PP1250_S3_EN, 0, 2 },
- { GPIO_PP1800_S3_EN, 0, 2 },
- { GPIO_PP3300_S3_EN, 0, 2 },
- { GPIO_PP900_S3_EN, 0, 0 },
-};
-#else
-static const struct power_seq_op s3s5_power_seq[] = {
- { GPIO_PP1800_SENSOR_EN_L, 1, 0},
- { GPIO_PP1800_SIXAXIS_EN_L, 1, 0},
- { GPIO_PP1800_LID_EN_L, 1, 0 },
- { GPIO_PP3300_TRACKPAD_EN_L, 1, 0 },
- { GPIO_PP5000_EN, 0, 0 },
- { GPIO_PP3300_USB_EN_L, 1, 20 },
- { GPIO_PP1800_USB_EN_L, 1, 10 },
- { GPIO_LPDDR_PWR_EN, 0, 20 },
- { GPIO_PP1800_PMU_EN_L, 1, 2 },
- { GPIO_PP900_PLL_EN, 0, 0 },
- { GPIO_PP900_PMU_EN, 0, 0 },
- { GPIO_PP900_USB_EN, 0, 6 },
- { GPIO_PP900_PCIE_EN, 0, 0 },
- { GPIO_PP900_AP_EN, 0, 0 },
- { GPIO_PPVAR_LOGIC_EN, 0, 0 },
-};
-#endif
-
-static int forcing_shutdown;
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /*
- * Force power off. This condition will reset once the state machine
- * transitions to G3.
- */
- forcing_shutdown = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-
-#define SYS_RST_HOLD_US (1 * MSEC)
-void chipset_reset(enum chipset_reset_reason reason)
-{
-#ifdef CONFIG_CMD_RTC
- /* Print out the RTC to help correlate resets in logs. */
- print_system_rtc(CC_CHIPSET);
-#endif
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* Pulse SYS_RST */
- gpio_set_level(GPIO_SYS_RST_L, 0);
- if (in_interrupt_context())
- udelay(SYS_RST_HOLD_US);
- else
- usleep(SYS_RST_HOLD_US);
- gpio_set_level(GPIO_SYS_RST_L, 1);
-}
-
-enum power_state power_chipset_init(void)
-{
- if (system_jumped_to_this_image()) {
- if ((power_get_signals() & IN_ALL_S0) == IN_ALL_S0) {
- disable_sleep(SLEEP_MASK_AP_RUN);
- CPRINTS("already in S0");
- return POWER_S0;
- }
- } else if (!(system_get_reset_flags() & EC_RESET_FLAG_AP_OFF))
- /* Auto-power on */
- chipset_exit_hard_off();
-
- return POWER_G3;
-}
-
-static void force_shutdown(void)
-{
- forcing_shutdown = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_DEFERRED(force_shutdown);
-
-/*
- * Debounce PGOOD_AP if we lose it suddenly during S0, since output voltage
- * transitions may cause spurious pulses.
- */
-#define PGOOD_AP_DEBOUNCE_TIMEOUT (100 * MSEC)
-
-/*
- * The AP informs the EC of its S0 / S3 state through IN_SUSPEND_DEASSERTED /
- * AP_EC_S3_S0_L. Latency between deassertion and power rails coming up must
- * be minimized, so check for deassertion at various stages of our suspend
- * power sequencing, and immediately transition out of suspend if necessary.
- */
-#define SLEEP_INTERVAL_MS 5
-#define MSLEEP_CHECK_ABORTED_SUSPEND(msec) \
- do { \
- int sleep_remain = msec; \
- do { \
- msleep(MIN(sleep_remain, SLEEP_INTERVAL_MS)); \
- sleep_remain -= SLEEP_INTERVAL_MS; \
- if (!forcing_shutdown && \
- power_get_signals() & IN_SUSPEND_DEASSERTED) { \
- CPRINTS("suspend aborted"); \
- return POWER_S3S0; \
- } \
- } while (sleep_remain > 0); \
- } while (0)
-BUILD_ASSERT(POWER_S3S0 != 0);
-
-/**
- * Step through the power sequence table and do corresponding GPIO operations.
- *
- * @param power_seq_ops The pointer to the power sequence table.
- * @param op_count The number of entries of power_seq_ops.
- * @return non-zero if suspend aborted during POWER_S0S3, 0 otherwise.
- */
-static int power_seq_run(const struct power_seq_op *power_seq_ops, int op_count)
-{
- int i;
-
- for (i = 0; i < op_count; i++) {
- gpio_set_level(power_seq_ops[i].signal,
- power_seq_ops[i].level);
- if (!power_seq_ops[i].delay)
- continue;
- if ((power_seq_ops == s0s3_power_seq)
-#ifdef S3_USB_WAKE
- || (power_seq_ops == s0s3_usb_wake_power_seq)
-#endif
- )
- MSLEEP_CHECK_ABORTED_SUSPEND(power_seq_ops[i].delay);
- else
- msleep(power_seq_ops[i].delay);
- }
- return 0;
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
-#ifndef CR50_DEEP_SLEEP
- static int sys_reset_asserted;
-#endif
-#ifdef S3_USB_WAKE
- static int usb_wake_enabled;
-#endif
- int tries = 0;
-
- switch (state) {
- case POWER_G3:
- break;
-
- case POWER_S5:
- if (forcing_shutdown)
- return POWER_S5G3;
- else
- return POWER_S5S3;
- break;
-
- case POWER_S3:
- if (!power_has_signals(IN_PGOOD_S3) || forcing_shutdown)
- return POWER_S3S5;
- else if (power_get_signals() & IN_SUSPEND_DEASSERTED)
- return POWER_S3S0;
- break;
-
- case POWER_S0:
- if (!power_has_signals(IN_PGOOD_S3) ||
- forcing_shutdown ||
- !(power_get_signals() & IN_SUSPEND_DEASSERTED))
- return POWER_S0S3;
-
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION != 1
- /*
- * Wait up to PGOOD_AP_DEBOUNCE_TIMEOUT for IN_PGOOD_AP to
- * come back before transitioning back to S3. PGOOD_SYS can
- * also glitch, with a glitch duration < 1ms, so debounce
- * it here as well.
- */
- if (power_wait_signals_timeout(IN_PGOOD_AP | IN_PGOOD_SYS,
- PGOOD_AP_DEBOUNCE_TIMEOUT)
- == EC_ERROR_TIMEOUT)
- return POWER_S0S3;
-
- /*
- * power_wait_signals_timeout() can block and consume task
- * wake events, so re-verify the state of the world.
- */
- if (!power_has_signals(IN_PGOOD_S3) ||
- forcing_shutdown ||
- !(power_get_signals() & IN_SUSPEND_DEASSERTED))
- return POWER_S0S3;
-#endif
-
- break;
-
- case POWER_G3S5:
- forcing_shutdown = 0;
-
- /*
- * Allow time for charger to be initialized, in case we're
- * trying to boot the AP with no battery.
- */
- while (charge_prevent_power_on(0) &&
- tries++ < CHARGER_INITIALIZED_TRIES) {
- msleep(CHARGER_INITIALIZED_DELAY_MS);
- }
-
- /* Return to G3 if battery level is too low. */
- if (charge_want_shutdown() ||
- tries > CHARGER_INITIALIZED_TRIES) {
- CPRINTS("power-up inhibited");
- chipset_force_shutdown(
- CHIPSET_SHUTDOWN_BATTERY_INHIBIT);
- return POWER_G3;
- }
-
- /* Power up to next state */
- return POWER_S5;
-
- case POWER_S5S3:
- power_seq_run(s5s3_power_seq, ARRAY_SIZE(s5s3_power_seq));
-
-#ifndef CR50_DEEP_SLEEP
- /*
- * Assert SYS_RST now, to be released in S3S0, to avoid
- * resetting the TPM soon after power-on.
- */
- sys_reset_asserted = 1;
-#endif
-
- if (power_wait_signals(IN_PGOOD_S3)) {
- chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
- return POWER_S3S5;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- /* Power up to next state */
- return POWER_S3;
-
- case POWER_S3S0:
-#ifdef S3_USB_WAKE
- /* Bring up S3 USB wake rails, if they are down */
- if (!usb_wake_enabled)
- power_seq_run(s3s0_usb_wake_power_seq,
- ARRAY_SIZE(s3s0_usb_wake_power_seq));
- usb_wake_enabled = 0;
-#endif
- power_seq_run(s3s0_power_seq, ARRAY_SIZE(s3s0_power_seq));
-
-#ifndef CR50_DEEP_SLEEP
- /* Release SYS_RST if we came from S5 */
- if (sys_reset_asserted) {
-#endif
- msleep(10);
- gpio_set_level(GPIO_SYS_RST_L, 1);
-
-#ifndef CR50_DEEP_SLEEP
- sys_reset_asserted = 0;
- }
-#endif
-
-#ifdef POWER_SIGNAL_POLLING
- /*
- * Poll power signals every PGOOD_S0_POLL_TIMEOUT us, since
- * AP_PWR_GOOD assertion doesn't trigger a power signal
- * interrupt.
- */
- while (power_wait_signals_timeout(IN_PGOOD_S0,
- PGOOD_S0_POLL_TIMEOUT) == EC_ERROR_TIMEOUT &&
- ++tries < PGOOD_S0_POLL_TRIES)
- ;
-
- if (tries >= PGOOD_S0_POLL_TRIES) {
- CPRINTS("power timeout on input; "
- "wanted 0x%04x, got 0x%04x",
- IN_PGOOD_S0, power_get_signals() & IN_PGOOD_S0);
-#else
- if (power_wait_signals(IN_PGOOD_S0)) {
-#endif /* POWER_SIGNAL_POLLING */
- chipset_force_shutdown(CHIPSET_SHUTDOWN_WAIT);
- return POWER_S0S3;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_RESUME);
-
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- /* Power up to next state */
- return POWER_S0;
-
- case POWER_S0S3:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SUSPEND);
- MSLEEP_CHECK_ABORTED_SUSPEND(20);
-
- if (power_seq_run(s0s3_power_seq, ARRAY_SIZE(s0s3_power_seq)))
- return POWER_S3S0;
-
-#ifdef S3_USB_WAKE
- /* Leave up rails needed for S3 USB wake, if requested */
- usb_wake_enabled = (power_get_host_sleep_state() ==
- HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND);
- if (!usb_wake_enabled &&
- power_seq_run(s0s3_usb_wake_power_seq,
- ARRAY_SIZE(s0s3_usb_wake_power_seq)))
- return POWER_S3S0;
-#endif
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S3 or lower.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
-
- /*
- * In case the power button is held awaiting power-off timeout,
- * power off immediately now that we're entering S3.
- */
- if (power_button_is_pressed()) {
- forcing_shutdown = 1;
- hook_call_deferred(&force_shutdown_data, -1);
- }
-
- return POWER_S3;
-
- case POWER_S3S5:
-#ifdef S3_USB_WAKE
- /* Make sure all S3 rails are off */
- if (usb_wake_enabled) {
- power_seq_run(s0s3_usb_wake_power_seq,
- ARRAY_SIZE(s0s3_usb_wake_power_seq));
- usb_wake_enabled = 0;
- }
-#endif
-
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- power_seq_run(s3s5_power_seq, ARRAY_SIZE(s3s5_power_seq));
-
- /* Start shutting down */
- return POWER_S5;
-
- case POWER_S5G3:
- return POWER_G3;
- }
-
- return state;
-}
-
-static void power_button_changed(void)
-{
- static uint8_t tablet_boot_on_button_release;
-
- if (power_button_is_pressed()) {
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION != 1
- /* Power up from off */
- chipset_exit_hard_off();
-#else
- tablet_boot_on_button_release = 1;
-#endif
- }
- /* Delayed power down from S0/S3, cancel on PB release */
- hook_call_deferred(&force_shutdown_data,
- FORCED_SHUTDOWN_DELAY);
- } else {
-#if CONFIG_CHIPSET_POWER_SEQ_VERSION == 1
- if (tablet_boot_on_button_release) {
- /* Power up from off */
- chipset_exit_hard_off();
- tablet_boot_on_button_release = 0;
- }
-#endif
- /* Power button released, cancel deferred shutdown */
- hook_call_deferred(&force_shutdown_data, -1);
- }
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, power_button_changed, HOOK_PRIO_DEFAULT);
-
-#ifdef CONFIG_LID_SWITCH
-static void lid_changed(void)
-{
- /* Power-up from off on lid open */
- if (lid_is_open() && chipset_in_state(CHIPSET_STATE_ANY_OFF))
- chipset_exit_hard_off();
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, lid_changed, HOOK_PRIO_DEFAULT);
-#endif
-
-#ifdef POWER_SIGNAL_POLLING
-/*
- * Polling for non-INT power signal pins.
- * Call power_signal_interrupt() when the GPIO status of those pins changes.
- */
-static void power_signal_changed(void)
-{
- static uint8_t in_signals; /* Current power signal status */
- uint8_t inew = 0;
- const struct power_signal_info *s = power_signal_list;
- int i;
-
- BUILD_ASSERT(POWER_SIGNAL_COUNT <= 8);
-
- for (i = 0; i < POWER_SIGNAL_COUNT; i++, s++) {
- /* Skip if this is an INT pin. */
- if (s->gpio < GPIO_IH_COUNT)
- continue;
-
- if (power_signal_is_asserted(s))
- inew |= 1 << i;
- }
-
- if (inew != in_signals) {
- /*
- * Pass a fake power gpio_signal to power_signal_interrupt().
- * Note that here we make power_signal_interrupt() reentrant.
- */
- power_signal_interrupt(POWER_SIGNAL_COUNT);
- in_signals = inew;
- }
-}
-DECLARE_HOOK(HOOK_TICK, power_signal_changed, HOOK_PRIO_DEFAULT);
-#endif
diff --git a/power/sc7180.c b/power/sc7180.c
deleted file mode 100644
index 21be404e2c..0000000000
--- a/power/sc7180.c
+++ /dev/null
@@ -1,880 +0,0 @@
-/* Copyright 2019 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * SC7180 SoC power sequencing module for Chrome EC
- *
- * This implements the following features:
- *
- * - Cold reset powers on the AP
- *
- * When powered off:
- * - Press power button turns on the AP
- * - Hold power button turns on the AP, and then 8s later turns it off and
- * leaves it off until pwron is released and pressed again
- * - Lid open turns on the AP
- *
- * When powered on:
- * - Holding power button for 8s powers off the AP
- * - Pressing and releasing pwron within that 8s is ignored
- * - If POWER_GOOD is dropped by the AP, then we power the AP off
- */
-
-#include "charge_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "task.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Masks for power signals */
-#define IN_POWER_GOOD POWER_SIGNAL_MASK(SC7180_POWER_GOOD)
-#define IN_AP_RST_ASSERTED POWER_SIGNAL_MASK(SC7180_AP_RST_ASSERTED)
-
-
-/* Long power key press to force shutdown */
-#define DELAY_FORCE_SHUTDOWN (8 * SECOND)
-
-/*
- * If the power button is pressed to turn on, then held for this long, we
- * power off.
- *
- * Normal case: User releases power button and chipset_task() goes
- * into the inner loop, waiting for next event to occur (power button
- * press or POWER_GOOD == 0).
- */
-#define DELAY_SHUTDOWN_ON_POWER_HOLD (8 * SECOND)
-
-/*
- * After trigger PMIC power sequence, how long it triggers AP to turn on
- * or off. Observed that the worst case is ~150ms. Pick a safe vale.
- */
-#define PMIC_POWER_AP_RESPONSE_TIMEOUT (350 * MSEC)
-
-/*
- * After force off the switch cap, how long the PMIC/AP totally off.
- * Observed that the worst case is 2s. Pick a safe vale.
- */
-#define FORCE_OFF_RESPONSE_TIMEOUT (4 * SECOND)
-
-/* Wait for polling the AP on signal */
-#define PMIC_POWER_AP_WAIT (1 * MSEC)
-
-/* The length of an issued low pulse to the PM845_RESIN_L signal */
-#define PMIC_RESIN_PULSE_LENGTH (20 * MSEC)
-
-/* The timeout of the check if the system can boot AP */
-#define CAN_BOOT_AP_CHECK_TIMEOUT (500 * MSEC)
-
-/* Wait for polling if the system can boot AP */
-#define CAN_BOOT_AP_CHECK_WAIT (100 * MSEC)
-
-/* The timeout of the check if the switchcap outputs good voltage */
-#define SWITCHCAP_PG_CHECK_TIMEOUT (50 * MSEC)
-
-/* Wait for polling if the switchcap outputs good voltage */
-#define SWITCHCAP_PG_CHECK_WAIT (5 * MSEC)
-
-/* Delay between power-on the system and power-on the PMIC */
-#define SYSTEM_POWER_ON_DELAY (10 * MSEC)
-
-/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
-/* 1 if the power button was pressed last time we checked */
-static char power_button_was_pressed;
-
-/* 1 if lid-open event has been detected */
-static char lid_opened;
-
-/* 1 if AP_RST_L and PS_HOLD is overdriven by EC */
-static char ap_rst_overdriven;
-
-/* Time where we will power off, if power button still held down */
-static timestamp_t power_off_deadline;
-
-/* Force AP power on (used for recovery keypress) */
-static int auto_power_on;
-
-enum power_request_t {
- POWER_REQ_NONE,
- POWER_REQ_OFF,
- POWER_REQ_ON,
- POWER_REQ_RESET,
-
- POWER_REQ_COUNT,
-};
-
-static enum power_request_t power_request;
-
-/**
- * Return values for check_for_power_off_event().
- */
-enum power_off_event_t {
- POWER_OFF_CANCEL,
- POWER_OFF_BY_POWER_BUTTON_PRESSED,
- POWER_OFF_BY_LONG_PRESS,
- POWER_OFF_BY_POWER_GOOD_LOST,
- POWER_OFF_BY_POWER_REQ_OFF,
- POWER_OFF_BY_POWER_REQ_RESET,
-
- POWER_OFF_EVENT_COUNT,
-};
-
-/**
- * Return values for check_for_power_on_event().
- */
-enum power_on_event_t {
- POWER_ON_CANCEL,
- POWER_ON_BY_IN_POWER_GOOD,
- POWER_ON_BY_AUTO_POWER_ON,
- POWER_ON_BY_LID_OPEN,
- POWER_ON_BY_POWER_BUTTON_PRESSED,
- POWER_ON_BY_POWER_REQ_ON,
- POWER_ON_BY_POWER_REQ_RESET,
-
- POWER_ON_EVENT_COUNT,
-};
-
-/* Issue a request to initiate a reset sequence */
-static void request_cold_reset(void)
-{
- power_request = POWER_REQ_RESET;
- task_wake(TASK_ID_CHIPSET);
-}
-
-/* AP-requested reset GPIO interrupt handlers */
-static void chipset_reset_request_handler(void)
-{
- CPRINTS("AP wants reset");
- chipset_reset(CHIPSET_RESET_AP_REQ);
-}
-DECLARE_DEFERRED(chipset_reset_request_handler);
-
-void chipset_reset_request_interrupt(enum gpio_signal signal)
-{
- hook_call_deferred(&chipset_reset_request_handler_data, 0);
-}
-
-void chipset_warm_reset_interrupt(enum gpio_signal signal)
-{
- /*
- * The warm_reset signal is pulled-up by a rail from PMIC. If the
- * warm_reset drops, it means:
- * * Servo or Cr50 holds the signal, or
- * * its pull-up rail POWER_GOOD drops.
- */
- if (!gpio_get_level(GPIO_WARM_RESET_L)) {
- if (gpio_get_level(GPIO_POWER_GOOD)) {
- /*
- * Servo or Cr50 holds the WARM_RESET_L signal.
- *
- * Overdrive AP_RST_L to hold AP. Overdrive PS_HOLD to
- * emulate AP being up to trick the PMIC into thinking
- * there’s nothing weird going on.
- */
- ap_rst_overdriven = 1;
- gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
- GPIO_SEL_1P8V | GPIO_OUT_HIGH);
- gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
- GPIO_SEL_1P8V | GPIO_OUT_LOW);
- } else {
- /*
- * The pull-up rail POWER_GOOD drops.
- *
- * High-Z both AP_RST_L and PS_HOLD to restore their
- * states.
- */
- gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
- GPIO_SEL_1P8V);
- gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
- GPIO_SEL_1P8V);
- ap_rst_overdriven = 0;
- }
- } else {
- if (ap_rst_overdriven) {
- /*
- * Servo or Cr50 releases the WARM_RESET_L signal.
- *
- * Cold reset the PMIC, doing S0->S5->S0 transition,
- * by issuing a request to initiate a reset sequence,
- * to recover the system. The transition to S5 makes
- * POWER_GOOD drop that triggers an interrupt to
- * high-Z both AP_RST_L and PS_HOLD.
- */
- request_cold_reset();
- }
- /* If not overdriven, just a normal power-up, do nothing. */
- }
-
- power_signal_interrupt(signal);
-}
-
-static void sc7180_lid_event(void)
-{
- /* Power task only cares about lid-open events */
- if (!lid_is_open())
- return;
-
- lid_opened = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, sc7180_lid_event, HOOK_PRIO_DEFAULT);
-
-static void sc7180_powerbtn_changed(void)
-{
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, sc7180_powerbtn_changed,
- HOOK_PRIO_DEFAULT);
-
-/**
- * Wait the switchcap GPIO0 PVC_PG signal asserted.
- *
- * When the output voltage is over the threshold PVC_PG_ADJ,
- * the PVC_PG is asserted.
- *
- * PVG_PG_ADJ is configured to 3.0V.
- * GPIO0 is configured as PVC_PG.
- *
- * @param enable 1 to wait the PMIC/AP on.
- 0 to wait the PMIC/AP off.
- */
-static void wait_switchcap_power_good(int enable)
-{
- timestamp_t poll_deadline;
-
- poll_deadline = get_time();
- poll_deadline.val += SWITCHCAP_PG_CHECK_TIMEOUT;
- while (enable != gpio_get_level(GPIO_DA9313_GPIO0) &&
- get_time().val < poll_deadline.val) {
- usleep(SWITCHCAP_PG_CHECK_WAIT);
- }
-
- /*
- * Check the timeout case. Just show a message. More check later
- * will switch the power state.
- */
- if (enable != gpio_get_level(GPIO_DA9313_GPIO0)) {
- if (enable)
- CPRINTS("SWITCHCAP NO POWER GOOD!");
- else
- CPRINTS("SWITCHCAP STILL POWER GOOD!");
- }
-
-}
-
-/**
- * Get the state of the system power signals.
- *
- * @return 1 if the system is powered, 0 if not
- */
-static int is_system_powered(void)
-{
- return gpio_get_level(GPIO_SWITCHCAP_ON);
-}
-
-/**
- * Get the PMIC/AP power signal.
- *
- * We treat the PMIC chips and the AP as a whole here. Don't deal with
- * the individual chip.
- *
- * @return 1 if the PMIC/AP is powered, 0 if not
- */
-static int is_pmic_pwron(void)
-{
- /* Use POWER_GOOD to indicate PMIC/AP is on/off */
- return gpio_get_level(GPIO_POWER_GOOD);
-}
-
-/**
- * Wait the PMIC/AP power-on state.
- *
- * @param enable 1 to wait the PMIC/AP on.
- 0 to wait the PMIC/AP off.
- * @param timeout Number of microsecond of timeout.
- */
-static void wait_pmic_pwron(int enable, unsigned int timeout)
-{
- timestamp_t poll_deadline;
-
- /* Check the AP power status */
- if (enable == is_pmic_pwron())
- return;
-
- poll_deadline = get_time();
- poll_deadline.val += timeout;
- while (enable != is_pmic_pwron() &&
- get_time().val < poll_deadline.val) {
- usleep(PMIC_POWER_AP_WAIT);
- }
-
- /* Check the timeout case */
- if (enable != is_pmic_pwron()) {
- if (enable)
- CPRINTS("AP POWER NOT READY!");
- else
- CPRINTS("AP POWER STILL UP!");
- }
-}
-
-/**
- * Set the state of the system power signals.
- *
- * The system power signals are the enable pins of SwitchCap and VBOB.
- * They control the power of the set of PMIC chips and the AP.
- *
- * @param enable 1 to enable or 0 to disable
- */
-static void set_system_power(int enable)
-{
- CPRINTS("%s(%d)", __func__, enable);
- gpio_set_level(GPIO_SWITCHCAP_ON, enable);
- wait_switchcap_power_good(enable);
- /* TODO: VBOB_EN GPIO is NC, just a backup. Remove it later. */
- gpio_set_level(GPIO_VBOB_EN, enable);
- if (enable) {
- usleep(SYSTEM_POWER_ON_DELAY);
- } else {
- /* Ensure POWER_GOOD drop to low if it is a forced shutdown */
- wait_pmic_pwron(0, FORCE_OFF_RESPONSE_TIMEOUT);
- }
-}
-
-/**
- * Set the PMIC/AP power-on state.
- *
- * It triggers the PMIC/AP power-on and power-off sequence.
- *
- * @param enable 1 to power the PMIC/AP on.
- 0 to power the PMIC/AP off.
- */
-static void set_pmic_pwron(int enable)
-{
- CPRINTS("%s(%d)", __func__, enable);
-
- /* Check the PMIC/AP power state */
- if (enable == is_pmic_pwron())
- return;
-
- /*
- * Power-on sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL, which is a power-on trigger
- * 2. PMIC supplies power to POWER_GOOD
- * 3. Release PMIC_KPD_PWR_ODL
- *
- * Power-off sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off
- * trigger (requiring reprogramming PMIC registers to make
- * PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger)
- * 2. PMIC stops supplying power to POWER_GOOD (requiring
- * reprogramming PMIC to set the stage-1 and stage-2 reset timers to
- * 0 such that the pull down happens just after the deboucing time
- * of the trigger, like 2ms)
- * 3. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L
- *
- * If the above PMIC registers not programmed or programmed wrong, it
- * falls back to the next functions, which cuts off the system power.
- */
-
- gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0);
- if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
- wait_pmic_pwron(enable, PMIC_POWER_AP_RESPONSE_TIMEOUT);
- gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1);
- if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
-}
-
-enum power_state power_chipset_init(void)
-{
- int init_power_state;
- uint32_t reset_flags = system_get_reset_flags();
-
- /* Enable interrupts */
- gpio_enable_interrupt(GPIO_AP_RST_REQ);
- gpio_enable_interrupt(GPIO_WARM_RESET_L);
- gpio_enable_interrupt(GPIO_POWER_GOOD);
-
- /*
- * Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
- * the AP could stay in strange state.
- */
- if (!(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("not sysjump; forcing system shutdown");
- set_system_power(0);
- init_power_state = POWER_G3;
- } else {
- /* In the SYSJUMP case, we check if the AP is on */
- if (power_get_signals() & IN_POWER_GOOD) {
- CPRINTS("SOC ON");
- init_power_state = POWER_S0;
- } else {
- CPRINTS("SOC OFF");
- init_power_state = POWER_G3;
- }
- }
-
- /* Leave power off only if requested by reset flags */
- if (!(reset_flags & EC_RESET_FLAG_AP_OFF) &&
- !(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("auto_power_on set due to reset_flag 0x%x",
- system_get_reset_flags());
- auto_power_on = 1;
- }
-
- if (battery_is_present() == BP_YES) {
- /*
- * (crosbug.com/p/28289): Wait battery stable.
- * Some batteries use clock stretching feature, which requires
- * more time to be stable.
- */
- battery_wait_for_stable();
- }
-
- return init_power_state;
-}
-
-/*****************************************************************************/
-
-/**
- * Power off the AP
- */
-static void power_off(void)
-{
- /* Check the power off status */
- if (!is_system_powered())
- return;
-
- /* Call hooks before we drop power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- /* Do a graceful way to shutdown PMIC/AP first */
- set_pmic_pwron(0);
-
- /* Disable signal interrupts, as they are floating when switchcap off */
- power_signal_disable_interrupt(GPIO_AP_RST_L);
- power_signal_disable_interrupt(GPIO_PMIC_FAULT_L);
-
- /* Force to switch off all rails */
- set_system_power(0);
-
- /* Turn off the 3.3V and 5V rails. */
- gpio_set_level(GPIO_EN_PP3300_A, 0);
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 0);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 0);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
-
- lid_opened = 0;
- enable_sleep(SLEEP_MASK_AP_RUN);
- CPRINTS("power shutdown complete");
-}
-
-/**
- * Check if the power is enough to boot the AP.
- */
-static int power_is_enough(void)
-{
- timestamp_t poll_deadline;
-
- /* If powered by adapter only, wait a while for PD negoiation. */
- poll_deadline = get_time();
- poll_deadline.val += CAN_BOOT_AP_CHECK_TIMEOUT;
-
- /*
- * Wait for PD negotiation. If a system with drained battery, don't
- * waste the time and exit the loop.
- */
- while (!system_can_boot_ap() && !charge_want_shutdown() &&
- get_time().val < poll_deadline.val) {
- usleep(CAN_BOOT_AP_CHECK_WAIT);
- }
-
- return system_can_boot_ap() && !charge_want_shutdown();
-}
-
-/**
- * Power on the AP
- */
-static void power_on(void)
-{
- /*
- * If no enough power, return and the state machine will transition
- * back to S5.
- */
- if (!power_is_enough())
- return;
-
- /*
- * When power_on() is called, we are at S5S3. Initialize components
- * to ready state before AP is up.
- */
- hook_notify(HOOK_CHIPSET_PRE_INIT);
-
- /* Enable the 3.3V and 5V rail. */
- gpio_set_level(GPIO_EN_PP3300_A, 1);
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 1);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 1);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
-
- set_system_power(1);
-
- /* Enable signal interrupts */
- power_signal_enable_interrupt(GPIO_AP_RST_L);
- power_signal_enable_interrupt(GPIO_PMIC_FAULT_L);
-
- set_pmic_pwron(1);
-
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- CPRINTS("AP running ...");
-}
-
-/**
- * Check if there has been a power-on event
- *
- * This checks all power-on event signals and returns non-zero if any have been
- * triggered (with debounce taken into account).
- *
- * @return non-zero if there has been a power-on event, 0 if not.
- */
-static uint8_t check_for_power_on_event(void)
-{
- int ap_off_flag;
-
- ap_off_flag = system_get_reset_flags() & EC_RESET_FLAG_AP_OFF;
- system_clear_reset_flags(EC_RESET_FLAG_AP_OFF);
- /* check if system is already ON */
- if (power_get_signals() & IN_POWER_GOOD) {
- if (ap_off_flag) {
- CPRINTS("system is on, but EC_RESET_FLAG_AP_OFF is on");
- return POWER_ON_CANCEL;
- }
- CPRINTS("system is on, thus clear auto_power_on");
- /* no need to arrange another power on */
- auto_power_on = 0;
- return POWER_ON_BY_IN_POWER_GOOD;
- }
- if (ap_off_flag) {
- CPRINTS("EC_RESET_FLAG_AP_OFF is on");
- power_off();
- return POWER_ON_CANCEL;
- }
-
- CPRINTS("POWER_GOOD is not asserted");
-
- /* power on requested at EC startup for recovery */
- if (auto_power_on) {
- auto_power_on = 0;
- return POWER_ON_BY_AUTO_POWER_ON;
- }
-
- /* Check lid open */
- if (lid_opened) {
- lid_opened = 0;
- return POWER_ON_BY_LID_OPEN;
- }
-
- /* check for power button press */
- if (power_button_is_pressed())
- return POWER_ON_BY_POWER_BUTTON_PRESSED;
-
- if (power_request == POWER_REQ_ON) {
- power_request = POWER_REQ_NONE;
- return POWER_ON_BY_POWER_REQ_ON;
- }
-
- if (power_request == POWER_REQ_RESET) {
- power_request = POWER_REQ_NONE;
- return POWER_ON_BY_POWER_REQ_RESET;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-/**
- * Check for some event triggering the shutdown.
- *
- * It can be either a long power button press or a shutdown triggered from the
- * AP and detected by reading POWER_GOOD.
- *
- * @return non-zero if a shutdown should happen, 0 if not
- */
-static uint8_t check_for_power_off_event(void)
-{
- timestamp_t now;
- int pressed = 0;
-
- /*
- * Check for power button press.
- */
- if (power_button_is_pressed()) {
- pressed = POWER_OFF_BY_POWER_BUTTON_PRESSED;
- } else if (power_request == POWER_REQ_OFF) {
- power_request = POWER_REQ_NONE;
- return POWER_OFF_BY_POWER_REQ_OFF;
- } else if (power_request == POWER_REQ_RESET) {
- /*
- * The power_request flag will be cleared later
- * in check_for_power_on_event() in S5.
- */
- return POWER_OFF_BY_POWER_REQ_RESET;
- }
-
- now = get_time();
- if (pressed) {
- if (!power_button_was_pressed) {
- power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
- CPRINTS("power waiting for long press %u",
- power_off_deadline.le.lo);
- /* Ensure we will wake up to check the power key */
- timer_arm(power_off_deadline, TASK_ID_CHIPSET);
- } else if (timestamp_expired(power_off_deadline, &now)) {
- power_off_deadline.val = 0;
- CPRINTS("power off after long press now=%u, %u",
- now.le.lo, power_off_deadline.le.lo);
- return POWER_OFF_BY_LONG_PRESS;
- }
- } else if (power_button_was_pressed) {
- CPRINTS("power off cancel");
- timer_cancel(TASK_ID_CHIPSET);
- }
-
- power_button_was_pressed = pressed;
-
- /* POWER_GOOD released by AP : shutdown immediately */
- if (!power_has_signals(IN_POWER_GOOD)) {
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- CPRINTS("POWER_GOOD is lost");
- return POWER_OFF_BY_POWER_GOOD_LOST;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-/*****************************************************************************/
-/* Chipset interface */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* Issue a request to initiate a power-off sequence */
- power_request = POWER_REQ_OFF;
- task_wake(TASK_ID_CHIPSET);
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- int rv;
-
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* The host command is used to hard reset AP. Check b/119261783 */
- if (reason == CHIPSET_RESET_HOST_CMD) {
- request_cold_reset();
- return;
- }
-
- /*
- * Warm reset sequence:
- * 1. Issue a low pulse to PM845_RESIN_L, which triggers PMIC
- * to do a warm reset (requiring reprogramming PMIC registers
- * to make PM845_RESIN_L as a warm reset trigger).
- * 2. PMIC then issues a low pulse to AP_RST_L to reset AP.
- * EC monitors the signal to see any low pulse.
- * 2.1. If a low pulse found, done.
- * 2.2. If a low pulse not found (the above PMIC registers
- * not programmed or programmed wrong), issue a request
- * to initiate a cold reset power sequence.
- */
-
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
- usleep(PMIC_RESIN_PULSE_LENGTH);
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
-
- rv = power_wait_signals_timeout(IN_AP_RST_ASSERTED,
- PMIC_POWER_AP_RESPONSE_TIMEOUT);
- /* Exception case: PMIC not work as expected, request a cold reset */
- if (rv != EC_SUCCESS)
- request_cold_reset();
-}
-
-/**
- * Power handler for steady states
- *
- * @param state Current power state
- * @return Updated power state
- */
-enum power_state power_handle_state(enum power_state state)
-{
- uint8_t value;
- static uint8_t boot_from_g3, shutdown_from_s0;
-
- switch (state) {
- case POWER_G3:
- boot_from_g3 = check_for_power_on_event();
- if (boot_from_g3)
- return POWER_G3S5;
- break;
-
- case POWER_G3S5:
- return POWER_S5;
-
- case POWER_S5:
- if (boot_from_g3) {
- value = boot_from_g3;
- boot_from_g3 = 0;
- } else {
- value = check_for_power_on_event();
- }
-
- if (value) {
- CPRINTS("power on %d", value);
- return POWER_S5S3;
- }
- break;
-
- case POWER_S5S3:
- /*
- * Wait for power button release before actually boot AP.
- * It may be a long-hold power button with volume buttons
- * to trigger the recovery button. We don't want AP up
- * during the long-hold.
- */
- power_button_wait_for_release(-1);
-
- power_on();
- if (power_wait_signals(IN_POWER_GOOD) != EC_SUCCESS) {
- CPRINTS("POWER_GOOD not seen in time");
- set_system_power(0);
- return POWER_S5;
- }
-
- CPRINTS("POWER_GOOD seen");
- /* Call hooks now that AP is running */
- hook_notify(HOOK_CHIPSET_STARTUP);
- return POWER_S3;
-
- case POWER_S3:
- if (shutdown_from_s0) {
- value = shutdown_from_s0;
- shutdown_from_s0 = 0;
- } else {
- value = check_for_power_off_event();
- }
-
- if (value) {
- CPRINTS("power off %d", value);
- return POWER_S3S5;
- }
- /* Go to S3S0 directly, as don't know if it is in suspend */
- return POWER_S3S0;
-
- case POWER_S3S0:
- hook_notify(HOOK_CHIPSET_RESUME);
- return POWER_S0;
-
- case POWER_S0:
- shutdown_from_s0 = check_for_power_off_event();
- if (shutdown_from_s0)
- return POWER_S0S3;
- break;
-
- case POWER_S0S3:
- /*
- * If the power button is pressing, we need cancel the long
- * press timer, otherwise EC will crash.
- */
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- /* Call hooks here since we don't know it prior to AP suspend */
- hook_notify(HOOK_CHIPSET_SUSPEND);
- return POWER_S3;
-
- case POWER_S3S5:
- power_off();
- /*
- * Wait forever for the release of the power button; otherwise,
- * this power button press will then trigger a power-on in S5.
- */
- power_button_wait_for_release(-1);
- power_button_was_pressed = 0;
- return POWER_S5;
-
- case POWER_S5G3:
- return POWER_G3;
- }
-
- return state;
-}
-
-/*****************************************************************************/
-/* Console debug command */
-
-static const char *power_req_name[POWER_REQ_COUNT] = {
- "none",
- "off",
- "on",
-};
-
-/* Power states that we can report */
-enum power_state_t {
- PSTATE_UNKNOWN,
- PSTATE_OFF,
- PSTATE_ON,
- PSTATE_COUNT,
-};
-
-static const char * const state_name[] = {
- "unknown",
- "off",
- "on",
-};
-
-static int command_power(int argc, char **argv)
-{
- int v;
-
- if (argc < 2) {
- enum power_state_t state;
-
- state = PSTATE_UNKNOWN;
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- state = PSTATE_OFF;
- if (chipset_in_state(CHIPSET_STATE_ON))
- state = PSTATE_ON;
- ccprintf("%s\n", state_name[state]);
-
- return EC_SUCCESS;
- }
-
- if (!parse_bool(argv[1], &v))
- return EC_ERROR_PARAM1;
-
- power_request = v ? POWER_REQ_ON : POWER_REQ_OFF;
- ccprintf("Requesting power %s\n", power_req_name[power_request]);
- task_wake(TASK_ID_CHIPSET);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(power, command_power,
- "on/off",
- "Turn AP power on/off");
diff --git a/power/sdm845.c b/power/sdm845.c
deleted file mode 100644
index ac5b814ad3..0000000000
--- a/power/sdm845.c
+++ /dev/null
@@ -1,879 +0,0 @@
-/* Copyright 2018 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * SDM845 SoC power sequencing module for Chrome EC
- *
- * This implements the following features:
- *
- * - Cold reset powers on the AP
- *
- * When powered off:
- * - Press power button turns on the AP
- * - Hold power button turns on the AP, and then 8s later turns it off and
- * leaves it off until pwron is released and pressed again
- * - Lid open turns on the AP
- *
- * When powered on:
- * - Holding power button for 8s powers off the AP
- * - Pressing and releasing pwron within that 8s is ignored
- * - If POWER_GOOD is dropped by the AP, then we power the AP off
- */
-
-#include "charge_state.h"
-#include "chipset.h"
-#include "common.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "task.h"
-#include "util.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-/* Masks for power signals */
-#define IN_POWER_GOOD POWER_SIGNAL_MASK(SDM845_POWER_GOOD)
-#define IN_AP_RST_ASSERTED POWER_SIGNAL_MASK(SDM845_AP_RST_ASSERTED)
-
-
-/* Long power key press to force shutdown */
-#define DELAY_FORCE_SHUTDOWN (8 * SECOND)
-
-/*
- * If the power button is pressed to turn on, then held for this long, we
- * power off.
- *
- * Normal case: User releases power button and chipset_task() goes
- * into the inner loop, waiting for next event to occur (power button
- * press or POWER_GOOD == 0).
- */
-#define DELAY_SHUTDOWN_ON_POWER_HOLD (8 * SECOND)
-
-/*
- * After trigger PMIC power sequence, how long it triggers AP to turn on
- * or off. Observed that the worst case is ~150ms. Pick a safe vale.
- */
-#define PMIC_POWER_AP_RESPONSE_TIMEOUT (350 * MSEC)
-
-/*
- * After force off the switch cap, how long the PMIC/AP totally off.
- * Observed that the worst case is 2s. Pick a safe vale.
- */
-#define FORCE_OFF_RESPONSE_TIMEOUT (4 * SECOND)
-
-/* Wait for polling the AP on signal */
-#define PMIC_POWER_AP_WAIT (1 * MSEC)
-
-/* The length of an issued low pulse to the PM845_RESIN_L signal */
-#define PMIC_RESIN_PULSE_LENGTH (20 * MSEC)
-
-/* The timeout of the check if the system can boot AP */
-#define CAN_BOOT_AP_CHECK_TIMEOUT (500 * MSEC)
-
-/* Wait for polling if the system can boot AP */
-#define CAN_BOOT_AP_CHECK_WAIT (100 * MSEC)
-
-/* The timeout of the check if the switchcap outputs good voltage */
-#define SWITCHCAP_PG_CHECK_TIMEOUT (50 * MSEC)
-
-/* Wait for polling if the switchcap outputs good voltage */
-#define SWITCHCAP_PG_CHECK_WAIT (5 * MSEC)
-
-/* Delay between power-on the system and power-on the PMIC */
-#define SYSTEM_POWER_ON_DELAY (10 * MSEC)
-
-/* TODO(crosbug.com/p/25047): move to HOOK_POWER_BUTTON_CHANGE */
-/* 1 if the power button was pressed last time we checked */
-static char power_button_was_pressed;
-
-/* 1 if lid-open event has been detected */
-static char lid_opened;
-
-/* 1 if AP_RST_L and PS_HOLD is overdriven by EC */
-static char ap_rst_overdriven;
-
-/* Time where we will power off, if power button still held down */
-static timestamp_t power_off_deadline;
-
-/* Force AP power on (used for recovery keypress) */
-static int auto_power_on;
-
-enum power_request_t {
- POWER_REQ_NONE,
- POWER_REQ_OFF,
- POWER_REQ_ON,
- POWER_REQ_RESET,
-
- POWER_REQ_COUNT,
-};
-
-static enum power_request_t power_request;
-
-/**
- * Return values for check_for_power_off_event().
- */
-enum power_off_event_t {
- POWER_OFF_CANCEL,
- POWER_OFF_BY_POWER_BUTTON_PRESSED,
- POWER_OFF_BY_LONG_PRESS,
- POWER_OFF_BY_POWER_GOOD_LOST,
- POWER_OFF_BY_POWER_REQ_OFF,
- POWER_OFF_BY_POWER_REQ_RESET,
-
- POWER_OFF_EVENT_COUNT,
-};
-
-/**
- * Return values for check_for_power_on_event().
- */
-enum power_on_event_t {
- POWER_ON_CANCEL,
- POWER_ON_BY_IN_POWER_GOOD,
- POWER_ON_BY_AUTO_POWER_ON,
- POWER_ON_BY_LID_OPEN,
- POWER_ON_BY_POWER_BUTTON_PRESSED,
- POWER_ON_BY_POWER_REQ_ON,
- POWER_ON_BY_POWER_REQ_RESET,
-
- POWER_ON_EVENT_COUNT,
-};
-
-/* Issue a request to initiate a reset sequence */
-static void request_cold_reset(void)
-{
- power_request = POWER_REQ_RESET;
- task_wake(TASK_ID_CHIPSET);
-}
-
-/* AP-requested reset GPIO interrupt handlers */
-static void chipset_reset_request_handler(void)
-{
- CPRINTS("AP wants reset");
- chipset_reset(CHIPSET_RESET_AP_REQ);
-}
-DECLARE_DEFERRED(chipset_reset_request_handler);
-
-void chipset_reset_request_interrupt(enum gpio_signal signal)
-{
- hook_call_deferred(&chipset_reset_request_handler_data, 0);
-}
-
-void chipset_warm_reset_interrupt(enum gpio_signal signal)
-{
- /*
- * The warm_reset signal is pulled-up by a rail from PMIC. If the
- * warm_reset drops, it means:
- * * Servo or Cr50 holds the signal, or
- * * its pull-up rail POWER_GOOD drops.
- */
- if (!gpio_get_level(GPIO_WARM_RESET_L)) {
- if (gpio_get_level(GPIO_POWER_GOOD)) {
- /*
- * Servo or Cr50 holds the WARM_RESET_L signal.
- *
- * Overdrive AP_RST_L to hold AP. Overdrive PS_HOLD to
- * emulate AP being up to trick the PMIC into thinking
- * there’s nothing weird going on.
- */
- ap_rst_overdriven = 1;
- gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
- GPIO_SEL_1P8V | GPIO_OUT_HIGH);
- gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
- GPIO_SEL_1P8V | GPIO_OUT_LOW);
- } else {
- /*
- * The pull-up rail POWER_GOOD drops.
- *
- * High-Z both AP_RST_L and PS_HOLD to restore their
- * states.
- */
- gpio_set_flags(GPIO_AP_RST_L, GPIO_INT_BOTH |
- GPIO_SEL_1P8V);
- gpio_set_flags(GPIO_PS_HOLD, GPIO_INT_BOTH |
- GPIO_SEL_1P8V);
- ap_rst_overdriven = 0;
- }
- } else {
- if (ap_rst_overdriven) {
- /*
- * Servo or Cr50 releases the WARM_RESET_L signal.
- *
- * Cold reset the PMIC, doing S0->S5->S0 transition,
- * by issuing a request to initiate a reset sequence,
- * to recover the system. The transition to S5 makes
- * POWER_GOOD drop that triggers an interrupt to
- * high-Z both AP_RST_L and PS_HOLD.
- */
- request_cold_reset();
- }
- /* If not overdriven, just a normal power-up, do nothing. */
- }
-
- power_signal_interrupt(signal);
-}
-
-static void sdm845_lid_event(void)
-{
- /* Power task only cares about lid-open events */
- if (!lid_is_open())
- return;
-
- lid_opened = 1;
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_LID_CHANGE, sdm845_lid_event, HOOK_PRIO_DEFAULT);
-
-static void powerbtn_sdm845_changed(void)
-{
- task_wake(TASK_ID_CHIPSET);
-}
-DECLARE_HOOK(HOOK_POWER_BUTTON_CHANGE, powerbtn_sdm845_changed,
- HOOK_PRIO_DEFAULT);
-
-/**
- * Wait the switchcap GPIO0 PVC_PG signal asserted.
- *
- * When the output voltage is over the threshold PVC_PG_ADJ,
- * the PVC_PG is asserted.
- *
- * PVG_PG_ADJ is configured to 3.0V.
- * GPIO0 is configured as PVC_PG.
- *
- * @param enable 1 to wait the PMIC/AP on.
- 0 to wait the PMIC/AP off.
- */
-static void wait_switchcap_power_good(int enable)
-{
- timestamp_t poll_deadline;
-
- poll_deadline = get_time();
- poll_deadline.val += SWITCHCAP_PG_CHECK_TIMEOUT;
- while (enable != gpio_get_level(GPIO_DA9313_GPIO0) &&
- get_time().val < poll_deadline.val) {
- usleep(SWITCHCAP_PG_CHECK_WAIT);
- }
-
- /*
- * Check the timeout case. Just show a message. More check later
- * will switch the power state.
- */
- if (enable != gpio_get_level(GPIO_DA9313_GPIO0)) {
- if (enable)
- CPRINTS("SWITCHCAP NO POWER GOOD!");
- else
- CPRINTS("SWITCHCAP STILL POWER GOOD!");
- }
-
-}
-
-/**
- * Get the state of the system power signals.
- *
- * @return 1 if the system is powered, 0 if not
- */
-static int is_system_powered(void)
-{
- return gpio_get_level(GPIO_SWITCHCAP_ON_L);
-}
-
-/**
- * Get the PMIC/AP power signal.
- *
- * We treat the PMIC chips and the AP as a whole here. Don't deal with
- * the individual chip.
- *
- * @return 1 if the PMIC/AP is powered, 0 if not
- */
-static int is_pmic_pwron(void)
-{
- /* Use POWER_GOOD to indicate PMIC/AP is on/off */
- return gpio_get_level(GPIO_POWER_GOOD);
-}
-
-/**
- * Wait the PMIC/AP power-on state.
- *
- * @param enable 1 to wait the PMIC/AP on.
- 0 to wait the PMIC/AP off.
- * @param timeout Number of microsecond of timeout.
- */
-static void wait_pmic_pwron(int enable, unsigned int timeout)
-{
- timestamp_t poll_deadline;
-
- /* Check the AP power status */
- if (enable == is_pmic_pwron())
- return;
-
- poll_deadline = get_time();
- poll_deadline.val += timeout;
- while (enable != is_pmic_pwron() &&
- get_time().val < poll_deadline.val) {
- usleep(PMIC_POWER_AP_WAIT);
- }
-
- /* Check the timeout case */
- if (enable != is_pmic_pwron()) {
- if (enable)
- CPRINTS("AP POWER NOT READY!");
- else
- CPRINTS("AP POWER STILL UP!");
- }
-}
-
-/**
- * Set the state of the system power signals.
- *
- * The system power signals are the enable pins of SwitchCap and VBOB.
- * They control the power of the set of PMIC chips and the AP.
- *
- * @param enable 1 to enable or 0 to disable
- */
-static void set_system_power(int enable)
-{
- CPRINTS("%s(%d)", __func__, enable);
- gpio_set_level(GPIO_SWITCHCAP_ON_L, enable);
- wait_switchcap_power_good(enable);
- gpio_set_level(GPIO_VBOB_EN, enable);
- if (enable) {
- usleep(SYSTEM_POWER_ON_DELAY);
- } else {
- /* Ensure POWER_GOOD drop to low if it is a forced shutdown */
- wait_pmic_pwron(0, FORCE_OFF_RESPONSE_TIMEOUT);
- }
-}
-
-/**
- * Set the PMIC/AP power-on state.
- *
- * It triggers the PMIC/AP power-on and power-off sequence.
- *
- * @param enable 1 to power the PMIC/AP on.
- 0 to power the PMIC/AP off.
- */
-static void set_pmic_pwron(int enable)
-{
- CPRINTS("%s(%d)", __func__, enable);
-
- /* Check the PMIC/AP power state */
- if (enable == is_pmic_pwron())
- return;
-
- /*
- * Power-on sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL, which is a power-on trigger
- * 2. PM845 supplies power to POWER_GOOD
- * 3. Release PMIC_KPD_PWR_ODL
- *
- * Power-off sequence:
- * 1. Hold down PMIC_KPD_PWR_ODL and PM845_RESIN_L, which is a power-off
- * trigger (requiring reprogramming PMIC registers to make
- * PMIC_KPD_PWR_ODL + PM845_RESIN_L as a shutdown trigger)
- * 2. PM845 stops supplying power to POWER_GOOD (requiring
- * reprogramming PMIC to set the stage-1 and stage-2 reset timers to
- * 0 such that the pull down happens just after the deboucing time
- * of the trigger, like 2ms)
- * 3. Release PMIC_KPD_PWR_ODL and PM845_RESIN_L
- *
- * If the above PMIC registers not programmed or programmed wrong, it
- * falls back to the next functions, which cuts off the system power.
- */
-
- gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 0);
- if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
- wait_pmic_pwron(enable, PMIC_POWER_AP_RESPONSE_TIMEOUT);
- gpio_set_level(GPIO_PMIC_KPD_PWR_ODL, 1);
- if (!enable)
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
-}
-
-enum power_state power_chipset_init(void)
-{
- int init_power_state;
- uint32_t reset_flags = system_get_reset_flags();
-
- /* Enable interrupts */
- gpio_enable_interrupt(GPIO_AP_RST_REQ);
- gpio_enable_interrupt(GPIO_WARM_RESET_L);
- gpio_enable_interrupt(GPIO_POWER_GOOD);
-
- /*
- * Force the AP shutdown unless we are doing SYSJUMP. Otherwise,
- * the AP could stay in strange state.
- */
- if (!(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("not sysjump; forcing system shutdown");
- set_system_power(0);
- init_power_state = POWER_G3;
- } else {
- /* In the SYSJUMP case, we check if the AP is on */
- if (power_get_signals() & IN_POWER_GOOD) {
- CPRINTS("SOC ON");
- init_power_state = POWER_S0;
- } else {
- CPRINTS("SOC OFF");
- init_power_state = POWER_G3;
- }
- }
-
- /* Leave power off only if requested by reset flags */
- if (!(reset_flags & EC_RESET_FLAG_AP_OFF) &&
- !(reset_flags & EC_RESET_FLAG_SYSJUMP)) {
- CPRINTS("auto_power_on set due to reset_flag 0x%x",
- system_get_reset_flags());
- auto_power_on = 1;
- }
-
- if (battery_is_present() == BP_YES) {
- /*
- * (crosbug.com/p/28289): Wait battery stable.
- * Some batteries use clock stretching feature, which requires
- * more time to be stable.
- */
- battery_wait_for_stable();
- }
-
- return init_power_state;
-}
-
-/*****************************************************************************/
-
-/**
- * Power off the AP
- */
-static void power_off(void)
-{
- /* Check the power off status */
- if (!is_system_powered())
- return;
-
- /* Call hooks before we drop power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- /* Do a graceful way to shutdown PMIC/AP first */
- set_pmic_pwron(0);
-
- /* Disable signal interrupts, as they are floating when switchcap off */
- power_signal_disable_interrupt(GPIO_AP_RST_L);
- power_signal_disable_interrupt(GPIO_PMIC_FAULT_L);
-
- /* Force to switch off all rails */
- set_system_power(0);
-
- /* Turn off the 3.3V and 5V rails. */
- gpio_set_level(GPIO_EN_PP3300_A, 0);
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 0);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 0);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
-
- lid_opened = 0;
- enable_sleep(SLEEP_MASK_AP_RUN);
- CPRINTS("power shutdown complete");
-}
-
-/**
- * Check if the power is enough to boot the AP.
- */
-static int power_is_enough(void)
-{
- timestamp_t poll_deadline;
-
- /* If powered by adapter only, wait a while for PD negoiation. */
- poll_deadline = get_time();
- poll_deadline.val += CAN_BOOT_AP_CHECK_TIMEOUT;
-
- /*
- * Wait for PD negotiation. If a system with drained battery, don't
- * waste the time and exit the loop.
- */
- while (!system_can_boot_ap() && !charge_want_shutdown() &&
- get_time().val < poll_deadline.val) {
- usleep(CAN_BOOT_AP_CHECK_WAIT);
- }
-
- return system_can_boot_ap() && !charge_want_shutdown();
-}
-
-/**
- * Power on the AP
- */
-static void power_on(void)
-{
- /*
- * If no enough power, return and the state machine will transition
- * back to S5.
- */
- if (!power_is_enough())
- return;
-
- /*
- * When power_on() is called, we are at S5S3. Initialize components
- * to ready state before AP is up.
- */
- hook_notify(HOOK_CHIPSET_PRE_INIT);
-
- /* Enable the 3.3V and 5V rail. */
- gpio_set_level(GPIO_EN_PP3300_A, 1);
-#ifdef CONFIG_POWER_PP5000_CONTROL
- power_5v_enable(task_get_current(), 1);
-#else /* !defined(CONFIG_POWER_PP5000_CONTROL) */
- gpio_set_level(GPIO_EN_PP5000, 1);
-#endif /* defined(CONFIG_POWER_PP5000_CONTROL) */
-
- set_system_power(1);
-
- /* Enable signal interrupts */
- power_signal_enable_interrupt(GPIO_AP_RST_L);
- power_signal_enable_interrupt(GPIO_PMIC_FAULT_L);
-
- set_pmic_pwron(1);
-
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- CPRINTS("AP running ...");
-}
-
-/**
- * Check if there has been a power-on event
- *
- * This checks all power-on event signals and returns non-zero if any have been
- * triggered (with debounce taken into account).
- *
- * @return non-zero if there has been a power-on event, 0 if not.
- */
-static uint8_t check_for_power_on_event(void)
-{
- int ap_off_flag;
-
- ap_off_flag = system_get_reset_flags() & EC_RESET_FLAG_AP_OFF;
- system_clear_reset_flags(EC_RESET_FLAG_AP_OFF);
- /* check if system is already ON */
- if (power_get_signals() & IN_POWER_GOOD) {
- if (ap_off_flag) {
- CPRINTS("system is on, but EC_RESET_FLAG_AP_OFF is on");
- return POWER_ON_CANCEL;
- }
- CPRINTS("system is on, thus clear auto_power_on");
- /* no need to arrange another power on */
- auto_power_on = 0;
- return POWER_ON_BY_IN_POWER_GOOD;
- }
- if (ap_off_flag) {
- CPRINTS("EC_RESET_FLAG_AP_OFF is on");
- power_off();
- return POWER_ON_CANCEL;
- }
-
- CPRINTS("POWER_GOOD is not asserted");
-
- /* power on requested at EC startup for recovery */
- if (auto_power_on) {
- auto_power_on = 0;
- return POWER_ON_BY_AUTO_POWER_ON;
- }
-
- /* Check lid open */
- if (lid_opened) {
- lid_opened = 0;
- return POWER_ON_BY_LID_OPEN;
- }
-
- /* check for power button press */
- if (power_button_is_pressed())
- return POWER_ON_BY_POWER_BUTTON_PRESSED;
-
- if (power_request == POWER_REQ_ON) {
- power_request = POWER_REQ_NONE;
- return POWER_ON_BY_POWER_REQ_ON;
- }
-
- if (power_request == POWER_REQ_RESET) {
- power_request = POWER_REQ_NONE;
- return POWER_ON_BY_POWER_REQ_RESET;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-/**
- * Check for some event triggering the shutdown.
- *
- * It can be either a long power button press or a shutdown triggered from the
- * AP and detected by reading POWER_GOOD.
- *
- * @return non-zero if a shutdown should happen, 0 if not
- */
-static uint8_t check_for_power_off_event(void)
-{
- timestamp_t now;
- int pressed = 0;
-
- /*
- * Check for power button press.
- */
- if (power_button_is_pressed()) {
- pressed = POWER_OFF_BY_POWER_BUTTON_PRESSED;
- } else if (power_request == POWER_REQ_OFF) {
- power_request = POWER_REQ_NONE;
- return POWER_OFF_BY_POWER_REQ_OFF;
- } else if (power_request == POWER_REQ_RESET) {
- /*
- * The power_request flag will be cleared later
- * in check_for_power_on_event() in S5.
- */
- return POWER_OFF_BY_POWER_REQ_RESET;
- }
-
- now = get_time();
- if (pressed) {
- if (!power_button_was_pressed) {
- power_off_deadline.val = now.val + DELAY_FORCE_SHUTDOWN;
- CPRINTS("power waiting for long press %u",
- power_off_deadline.le.lo);
- /* Ensure we will wake up to check the power key */
- timer_arm(power_off_deadline, TASK_ID_CHIPSET);
- } else if (timestamp_expired(power_off_deadline, &now)) {
- power_off_deadline.val = 0;
- CPRINTS("power off after long press now=%u, %u",
- now.le.lo, power_off_deadline.le.lo);
- return POWER_OFF_BY_LONG_PRESS;
- }
- } else if (power_button_was_pressed) {
- CPRINTS("power off cancel");
- timer_cancel(TASK_ID_CHIPSET);
- }
-
- power_button_was_pressed = pressed;
-
- /* POWER_GOOD released by AP : shutdown immediately */
- if (!power_has_signals(IN_POWER_GOOD)) {
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- CPRINTS("POWER_GOOD is lost");
- return POWER_OFF_BY_POWER_GOOD_LOST;
- }
-
- return POWER_OFF_CANCEL;
-}
-
-/*****************************************************************************/
-/* Chipset interface */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* Issue a request to initiate a power-off sequence */
- power_request = POWER_REQ_OFF;
- task_wake(TASK_ID_CHIPSET);
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- int rv;
-
- CPRINTS("%s(%d)", __func__, reason);
- report_ap_reset(reason);
-
- /* The host command is used to hard reset AP. Check b/119261783 */
- if (reason == CHIPSET_RESET_HOST_CMD) {
- request_cold_reset();
- return;
- }
-
- /*
- * Warm reset sequence:
- * 1. Issue a low pulse to PM845_RESIN_L, which triggers PMIC
- * to do a warm reset (requiring reprogramming PMIC registers
- * to make PM845_RESIN_L as a warm reset trigger).
- * 2. PMIC then issues a low pulse to AP_RST_L to reset AP.
- * EC monitors the signal to see any low pulse.
- * 2.1. If a low pulse found, done.
- * 2.2. If a low pulse not found (the above PMIC registers
- * not programmed or programmed wrong), issue a request
- * to initiate a cold reset power sequence.
- */
-
- gpio_set_level(GPIO_PM845_RESIN_L, 0);
- usleep(PMIC_RESIN_PULSE_LENGTH);
- gpio_set_level(GPIO_PM845_RESIN_L, 1);
-
- rv = power_wait_signals_timeout(IN_AP_RST_ASSERTED,
- PMIC_POWER_AP_RESPONSE_TIMEOUT);
- /* Exception case: PMIC not work as expected, request a cold reset */
- if (rv != EC_SUCCESS)
- request_cold_reset();
-}
-
-/**
- * Power handler for steady states
- *
- * @param state Current power state
- * @return Updated power state
- */
-enum power_state power_handle_state(enum power_state state)
-{
- uint8_t value;
- static uint8_t boot_from_g3, shutdown_from_s0;
-
- switch (state) {
- case POWER_G3:
- boot_from_g3 = check_for_power_on_event();
- if (boot_from_g3)
- return POWER_G3S5;
- break;
-
- case POWER_G3S5:
- return POWER_S5;
-
- case POWER_S5:
- if (boot_from_g3) {
- value = boot_from_g3;
- boot_from_g3 = 0;
- } else {
- value = check_for_power_on_event();
- }
-
- if (value) {
- CPRINTS("power on %d", value);
- return POWER_S5S3;
- }
- break;
-
- case POWER_S5S3:
- /*
- * Wait for power button release before actually boot AP.
- * It may be a long-hold power button with volume buttons
- * to trigger the recovery button. We don't want AP up
- * during the long-hold.
- */
- power_button_wait_for_release(-1);
-
- power_on();
- if (power_wait_signals(IN_POWER_GOOD) != EC_SUCCESS) {
- CPRINTS("POWER_GOOD not seen in time");
- set_system_power(0);
- return POWER_S5;
- }
-
- CPRINTS("POWER_GOOD seen");
- /* Call hooks now that AP is running */
- hook_notify(HOOK_CHIPSET_STARTUP);
- return POWER_S3;
-
- case POWER_S3:
- if (shutdown_from_s0) {
- value = shutdown_from_s0;
- shutdown_from_s0 = 0;
- } else {
- value = check_for_power_off_event();
- }
-
- if (value) {
- CPRINTS("power off %d", value);
- return POWER_S3S5;
- }
- /* Go to S3S0 directly, as don't know if it is in suspend */
- return POWER_S3S0;
-
- case POWER_S3S0:
- hook_notify(HOOK_CHIPSET_RESUME);
- return POWER_S0;
-
- case POWER_S0:
- shutdown_from_s0 = check_for_power_off_event();
- if (shutdown_from_s0)
- return POWER_S0S3;
- break;
-
- case POWER_S0S3:
- /*
- * If the power button is pressing, we need cancel the long
- * press timer, otherwise EC will crash.
- */
- if (power_button_was_pressed)
- timer_cancel(TASK_ID_CHIPSET);
-
- /* Call hooks here since we don't know it prior to AP suspend */
- hook_notify(HOOK_CHIPSET_SUSPEND);
- return POWER_S3;
-
- case POWER_S3S5:
- power_off();
- /*
- * Wait forever for the release of the power button; otherwise,
- * this power button press will then trigger a power-on in S5.
- */
- power_button_wait_for_release(-1);
- power_button_was_pressed = 0;
- return POWER_S5;
-
- case POWER_S5G3:
- return POWER_G3;
- }
-
- return state;
-}
-
-/*****************************************************************************/
-/* Console debug command */
-
-static const char *power_req_name[POWER_REQ_COUNT] = {
- "none",
- "off",
- "on",
-};
-
-/* Power states that we can report */
-enum power_state_t {
- PSTATE_UNKNOWN,
- PSTATE_OFF,
- PSTATE_ON,
- PSTATE_COUNT,
-};
-
-static const char * const state_name[] = {
- "unknown",
- "off",
- "on",
-};
-
-static int command_power(int argc, char **argv)
-{
- int v;
-
- if (argc < 2) {
- enum power_state_t state;
-
- state = PSTATE_UNKNOWN;
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF))
- state = PSTATE_OFF;
- if (chipset_in_state(CHIPSET_STATE_ON))
- state = PSTATE_ON;
- ccprintf("%s\n", state_name[state]);
-
- return EC_SUCCESS;
- }
-
- if (!parse_bool(argv[1], &v))
- return EC_ERROR_PARAM1;
-
- power_request = v ? POWER_REQ_ON : POWER_REQ_OFF;
- ccprintf("Requesting power %s\n", power_req_name[power_request]);
- task_wake(TASK_ID_CHIPSET);
-
- return EC_SUCCESS;
-}
-DECLARE_CONSOLE_COMMAND(power, command_power,
- "on/off",
- "Turn AP power on/off");
diff --git a/power/skylake.c b/power/skylake.c
deleted file mode 100644
index d51f6079ff..0000000000
--- a/power/skylake.c
+++ /dev/null
@@ -1,193 +0,0 @@
-/* Copyright 2015 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Skylake IMVP8 / ROP PMIC chipset power control module for Chrome EC */
-
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "intel_x86.h"
-#include "lpc.h"
-#include "panic.h"
-#include "power_button.h"
-#include "system.h"
-#include "timer.h"
-
-/* Console output macros */
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-
-static int forcing_shutdown; /* Forced shutdown in progress? */
-
-/* Power signals list. Must match order of enum power_signal. */
-const struct power_signal_info power_signal_list[] = {
-#ifdef CONFIG_POWER_S0IX
- [X86_SLP_S0_DEASSERTED] = {
- GPIO_PCH_SLP_S0_L,
- POWER_SIGNAL_ACTIVE_HIGH | POWER_SIGNAL_DISABLE_AT_BOOT,
- "SLP_S0_DEASSERTED",
- },
-#endif
- [X86_SLP_S3_DEASSERTED] = {
- SLP_S3_SIGNAL_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S3_DEASSERTED",
- },
- [X86_SLP_S4_DEASSERTED] = {
- SLP_S4_SIGNAL_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_S4_DEASSERTED",
- },
- [X86_SLP_SUS_DEASSERTED] = {
- GPIO_PCH_SLP_SUS_L,
- POWER_SIGNAL_ACTIVE_HIGH,
- "SLP_SUS_DEASSERTED",
- },
- [X86_RSMRST_L_PWRGD] = {
- GPIO_RSMRST_L_PGOOD,
- POWER_SIGNAL_ACTIVE_HIGH,
- "RSMRST_N_PWRGD",
- },
- [X86_PMIC_DPWROK] = {
- GPIO_PMIC_DPWROK,
- POWER_SIGNAL_ACTIVE_HIGH,
- "PMIC_DPWROK",
- },
-};
-BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT);
-
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s()", __func__);
-
- /*
- * Force off. Sending a reset command to the PMIC will power off
- * the EC, so simulate a long power button press instead. This
- * condition will reset once the state machine transitions to G3.
- * Consider reducing the latency here by changing the power off
- * hold time on the PMIC.
- */
- if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
- report_ap_reset(reason);
- forcing_shutdown = 1;
- power_button_pch_press();
- }
-}
-
-__attribute__((weak)) void chipset_set_pmic_slp_sus_l(int level)
-{
- gpio_set_level(GPIO_PMIC_SLP_SUS_L, level);
-}
-
-enum power_state chipset_force_g3(void)
-{
- CPRINTS("Forcing fake G3.");
-
- chipset_set_pmic_slp_sus_l(0);
-
- return POWER_G3;
-}
-
-static void handle_slp_sus(enum power_state state)
-{
- /* If we're down or going down don't do anythin with SLP_SUS_L. */
- if (state == POWER_G3 || state == POWER_S5G3)
- return;
-
- /* Always mimic PCH SLP_SUS request for all other states. */
- chipset_set_pmic_slp_sus_l(gpio_get_level(GPIO_PCH_SLP_SUS_L));
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
- /*
- * If eSPI_Reset# pin is asserted without SLP_SUS# being asserted, then
- * it means that there is an unexpected power loss (global reset
- * event). In this case, check if shutdown was being forced by pressing
- * power button. If yes, release power button.
- */
- if ((power_get_signals() & IN_PCH_SLP_SUS_DEASSERTED) &&
- forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- enum power_state new_state;
-
- /* Process RSMRST_L state changes. */
- common_intel_x86_handle_rsmrst(state);
-
- if (state == POWER_S5 && forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-
- new_state = common_intel_x86_power_handle_state(state);
-
- /* Process SLP_SUS_L state changes after a new state is decided. */
- handle_slp_sus(new_state);
-
- return new_state;
-}
-
-/* Workaround for flags getting lost with power cycle */
-__attribute__((weak)) int board_has_working_reset_flags(void)
-{
- return 1;
-}
-
-#ifdef CONFIG_CHIPSET_HAS_PLATFORM_PMIC_RESET
-void chipset_handle_reboot(void)
-{
- int flags;
-
- if (system_jumped_to_this_image())
- return;
-
- /* Interrogate current reset flags from previous reboot. */
- flags = system_get_reset_flags();
-
- /*
- * Do not make PMIC re-sequence the power rails if the following reset
- * conditions are not met.
- */
- if (!(flags &
- (EC_RESET_FLAG_WATCHDOG | EC_RESET_FLAG_SOFT |
- EC_RESET_FLAG_HARD)))
- return;
-
- /* Preserve AP off request. */
- if (flags & EC_RESET_FLAG_AP_OFF) {
- /* Do not issue PMIC reset if board cannot save reset flags */
- if (!board_has_working_reset_flags()) {
- ccprintf("Skip PMIC reset due to board issue.\n");
- cflush();
- return;
- }
- chip_save_reset_flags(EC_RESET_FLAG_AP_OFF);
- }
-
-#ifdef CONFIG_CHIP_PANIC_BACKUP
- /* Ensure panic data if any is backed up. */
- chip_panic_data_backup();
-#endif
-
- ccprintf("Restarting system with PMIC.\n");
- /* Flush console */
- cflush();
-
- /* Bring down all rails but RTC rail (including EC power). */
- gpio_set_level(GPIO_EC_PLATFORM_RST, 1);
- while (1)
- ; /* wait here */
-}
-#ifndef CONFIG_VBOOT_EFS
-DECLARE_HOOK(HOOK_INIT, chipset_handle_reboot, HOOK_PRIO_FIRST);
-#endif
-#endif /* CONFIG_CHIPSET_HAS_PLATFORM_RESET */
diff --git a/power/skylake.h b/power/skylake.h
deleted file mode 100644
index c8a656c6c5..0000000000
--- a/power/skylake.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/* Copyright 2016 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Skylake IMVP8 / ROP PMIC chipset power control module for Chrome EC */
-
-#ifndef __CROS_EC_SKYLAKE_H
-#define __CROS_EC_SKYLAKE_H
-
-/*
- * Input state flags.
- * TODO: Normalize the power signal masks from board defines to SoC headers.
- */
-#define IN_PCH_SLP_S3_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S3_DEASSERTED)
-#define IN_PCH_SLP_S4_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_S4_DEASSERTED)
-#define IN_PCH_SLP_SUS_DEASSERTED POWER_SIGNAL_MASK(X86_SLP_SUS_DEASSERTED)
-
-#define IN_ALL_PM_SLP_DEASSERTED (IN_PCH_SLP_S3_DEASSERTED | \
- IN_PCH_SLP_S4_DEASSERTED | \
- IN_PCH_SLP_SUS_DEASSERTED)
-
-/*
- * DPWROK is NC / stuffing option on initial boards.
- * TODO(shawnn): Figure out proper control signals.
- */
-#define IN_PGOOD_ALL_CORE 0
-
-#define IN_ALL_S0 (IN_PGOOD_ALL_CORE | IN_ALL_PM_SLP_DEASSERTED)
-
-#define CHIPSET_G3S5_POWERUP_SIGNAL IN_PCH_SLP_SUS_DEASSERTED
-
-#define CHARGER_INITIALIZED_DELAY_MS 100
-#define CHARGER_INITIALIZED_TRIES 40
-
-/* Power signals list */
-enum power_signal {
-#ifdef CONFIG_POWER_S0IX
- X86_SLP_S0_DEASSERTED,
-#endif
- X86_SLP_S3_DEASSERTED,
- X86_SLP_S4_DEASSERTED,
- X86_SLP_SUS_DEASSERTED,
- X86_RSMRST_L_PWRGD,
- X86_PMIC_DPWROK,
-
- /* Number of X86 signals */
- POWER_SIGNAL_COUNT
-};
-
-/*
- * Board can define this function to indicate to the skylake
- * power code that it does not have working reset flags.
- */
-int board_has_working_reset_flags(void);
-
-#endif /* __CROS_EC_SKYLAKE_H */
diff --git a/power/stoney.c b/power/stoney.c
deleted file mode 100644
index 9bbfc75d33..0000000000
--- a/power/stoney.c
+++ /dev/null
@@ -1,286 +0,0 @@
-/* Copyright 2017 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/* Stoney power sequencing module for Chrome EC */
-
-#include "chipset.h"
-#include "common.h"
-#include "console.h"
-#include "ec_commands.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "lid_switch.h"
-#include "power.h"
-#include "power_button.h"
-#include "system.h"
-#include "timer.h"
-#include "usb_charge.h"
-#include "util.h"
-#include "wireless.h"
-#include "registers.h"
-
-/* Console output macros */
-#define CPUTS(outstr) cputs(CC_CHIPSET, outstr)
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ##args)
-
-#define IN_S5_PGOOD POWER_SIGNAL_MASK(X86_S5_PGOOD)
-
-static int forcing_shutdown; /* Forced shutdown in progress? */
-
-void chipset_force_shutdown(enum chipset_shutdown_reason reason)
-{
- CPRINTS("%s()", __func__);
-
- if (!chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
- forcing_shutdown = 1;
- power_button_pch_press();
- report_ap_reset(reason);
- }
-}
-
-static void chipset_force_g3(void)
-{
- /* Disable system power ("*_A" rails) in G3. */
- gpio_set_level(GPIO_EN_PWR_A, 0);
-}
-
-void chipset_reset(enum chipset_reset_reason reason)
-{
- CPRINTS("%s: %d", __func__, reason);
-
- if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) {
- CPRINTS("Can't reset: SOC is off");
- return;
- }
-
- report_ap_reset(reason);
- /*
- * Send a pulse to SYS_RST to trigger a warm reset.
- */
- gpio_set_level(GPIO_SYS_RESET_L, 0);
- usleep(32 * MSEC);
- gpio_set_level(GPIO_SYS_RESET_L, 1);
-}
-
-void chipset_throttle_cpu(int throttle)
-{
- CPRINTS("%s(%d)", __func__, throttle);
- if (IS_ENABLED(CONFIG_CPU_PROCHOT_ACTIVE_LOW))
- throttle = !throttle;
-
- if (chipset_in_state(CHIPSET_STATE_ON))
- gpio_set_level(GPIO_CPU_PROCHOT, throttle);
-}
-
-void chipset_handle_espi_reset_assert(void)
-{
- /*
- * eSPI_Reset# pin being asserted without RSMRST# being asserted
- * means there is an unexpected power loss (global reset event).
- * In this case, check if the shutdown is forced by the EC (due
- * to battery, thermal, or console command). The forced shutdown
- * initiates a power button press that we need to release.
- *
- * NOTE: S5_PGOOD input is passed through to the RSMRST# output to
- * the AP.
- */
- if ((power_get_signals() & IN_S5_PGOOD) && forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-}
-
-enum power_state power_chipset_init(void)
-{
- /* Pause in S5 when shutting down. */
- power_set_pause_in_s5(1);
-
- /*
- * If we're switching between images without rebooting, see if the x86
- * is already powered on; if so, leave it there instead of cycling
- * through G3.
- */
- if (system_jumped_to_this_image()) {
- if (gpio_get_level(GPIO_S0_PGOOD)) {
- /* Disable idle task deep sleep when in S0. */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- CPRINTS("already in S0");
- return POWER_S0;
- }
-
- CPRINTS("forcing G3");
- chipset_force_g3();
- }
- return POWER_G3;
-}
-
-static void handle_pass_through(enum gpio_signal pin_in,
- enum gpio_signal pin_out)
-{
- /*
- * Pass through asynchronously, as SOC may not react
- * immediately to power changes.
- */
- int in_level = gpio_get_level(pin_in);
- int out_level = gpio_get_level(pin_out);
-
- /*
- * Only pass through high S0_PGOOD (S0 power) when S5_PGOOD (S5 power)
- * is also high (S0_PGOOD is pulled high in G3 when S5_PGOOD is low).
- */
- if ((pin_in == GPIO_S0_PGOOD) && !gpio_get_level(GPIO_S5_PGOOD))
- in_level = 0;
-
- /* Nothing to do. */
- if (in_level == out_level)
- return;
-
- /*
- * SOC requires a delay of 1ms with stable power before
- * asserting PWR_GOOD.
- */
- if ((pin_in == GPIO_S0_PGOOD) && in_level)
- msleep(1);
-
- gpio_set_level(pin_out, in_level);
-
- CPRINTS("Pass through %s: %d", gpio_get_name(pin_in), in_level);
-}
-
-enum power_state power_handle_state(enum power_state state)
-{
- handle_pass_through(GPIO_S5_PGOOD, GPIO_PCH_RSMRST_L);
-
- handle_pass_through(GPIO_S0_PGOOD, GPIO_PCH_SYS_PWROK);
-
- if (state == POWER_S5 && forcing_shutdown) {
- power_button_pch_release();
- forcing_shutdown = 0;
- }
-
- switch (state) {
- case POWER_G3:
- break;
-
- case POWER_G3S5:
- /* Exit SOC G3 */
- /* Enable system power ("*_A" rails) in S5. */
- gpio_set_level(GPIO_EN_PWR_A, 1);
-
- /*
- * Callback to do pre-initialization within the context of
- * chipset task.
- */
- if (IS_ENABLED(CONFIG_CHIPSET_HAS_PRE_INIT_CALLBACK))
- chipset_pre_init_callback();
-
- if (power_wait_signals(IN_S5_PGOOD)) {
- chipset_force_g3();
- return POWER_G3;
- }
-
- CPRINTS("Exit SOC G3");
-
- return POWER_S5;
-
- case POWER_S5:
- if (!power_has_signals(IN_S5_PGOOD)) {
- /* Required rail went away */
- return POWER_S5G3;
- } else if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 1) {
- /* Power up to next state */
- return POWER_S5S3;
- }
- break;
-
- case POWER_S5S3:
- if (!power_has_signals(IN_S5_PGOOD)) {
- /* Required rail went away */
- return POWER_S5G3;
- }
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_STARTUP);
-
- return POWER_S3;
-
- case POWER_S3:
- if (!power_has_signals(IN_S5_PGOOD)) {
- /* Required rail went away */
- return POWER_S5G3;
- } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 1) {
- /* Power up to next state */
- return POWER_S3S0;
- } else if (gpio_get_level(GPIO_PCH_SLP_S5_L) == 0) {
- /* Power down to next state */
- return POWER_S3S5;
- }
- break;
-
- case POWER_S3S0:
- if (!power_has_signals(IN_S5_PGOOD)) {
- /* Required rail went away */
- return POWER_S5G3;
- }
-
- /* Enable wireless */
- wireless_set_state(WIRELESS_ON);
-
- /* Call hooks now that rails are up */
- hook_notify(HOOK_CHIPSET_RESUME);
-
- /*
- * Disable idle task deep sleep. This means that the low
- * power idle task will not go into deep sleep while in S0.
- */
- disable_sleep(SLEEP_MASK_AP_RUN);
-
- return POWER_S0;
-
- case POWER_S0:
- if (!power_has_signals(IN_S5_PGOOD)) {
- /* Required rail went away */
- return POWER_S5G3;
- } else if (gpio_get_level(GPIO_PCH_SLP_S3_L) == 0) {
- /* Power down to next state */
- return POWER_S0S3;
- }
- break;
-
- case POWER_S0S3:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SUSPEND);
-
- /* Suspend wireless */
- wireless_set_state(WIRELESS_SUSPEND);
-
- /*
- * Enable idle task deep sleep. Allow the low power idle task
- * to go into deep sleep in S3 or lower.
- */
- enable_sleep(SLEEP_MASK_AP_RUN);
-
- return POWER_S3;
-
- case POWER_S3S5:
- /* Call hooks before we remove power rails */
- hook_notify(HOOK_CHIPSET_SHUTDOWN);
-
- /* Disable wireless */
- wireless_set_state(WIRELESS_OFF);
-
- return POWER_S5;
-
- case POWER_S5G3:
- chipset_force_g3();
-
- return POWER_G3;
-
- default:
- break;
- }
- return state;
-}