diff options
author | Scott Chao <scott_chao@wistron.corp-partner.google.com> | 2021-07-06 14:09:29 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-07-08 00:40:25 +0000 |
commit | f47ba9d07c3b8aecd6afb7948b65d25c76a75359 (patch) | |
tree | e8b45398bfb1c75fc515d070399ba15c3b0f9c2e | |
parent | 25ea852e1ebcc10166b730037c137a556b69c16b (diff) | |
download | chrome-ec-f47ba9d07c3b8aecd6afb7948b65d25c76a75359.tar.gz |
primus: sync brya GPIO configuration
BUG=none
BRANCH=none
TEST=make -j BOARD=primus
Signed-off-by: Scott Chao <scott_chao@wistron.corp-partner.google.com>
Change-Id: Icfc741f4d1439a33ce801ff0382d42763c7e78b6
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3007875
Reviewed-by: Boris Mittelberg <bmbm@google.com>
-rw-r--r-- | board/primus/gpio.inc | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/board/primus/gpio.inc b/board/primus/gpio.inc index 5b1980004e..8d9ae44b80 100644 --- a/board/primus/gpio.inc +++ b/board/primus/gpio.inc @@ -19,15 +19,15 @@ GPIO_INT(SEQ_EC_RSMRST_ODL, PIN(E, 2), GPIO_INT_BOTH, power_signal_ GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_SUS_L, PIN(F, 1), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SYS_SLP_S0IX_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_BOTH, retimer_interrupt) -GPIO_INT(USB_C0_PPC_INT_ODL, PIN(F, 5), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USB_C0_BC12_INT_ODL, PIN(C, 6), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C0_TCPC_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C0_RT_INT_ODL, PIN(B, 1), GPIO_INT_FALLING, retimer_interrupt) +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, ppc_interrupt) /* USB C1 gpio pins are mapped to schematic USB C2 */ -GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USB_C1_BC12_INT_ODL, PIN(0, 2), GPIO_INT_BOTH, bc12_interrupt) -GPIO_INT(USB_C1_PPC_INT_ODL, PIN(7, 0), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USB_C1_RT_INT_ODL, PIN(4, 1), GPIO_INT_BOTH, retimer_interrupt) +GPIO_INT(USB_C1_TCPC_INT_ODL, PIN(A, 2), GPIO_INT_FALLING, tcpc_alert_event) +GPIO_INT(USB_C1_BC12_INT_ODL, PIN(0, 2), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_PPC_INT_ODL, PIN(7, 0), GPIO_INT_FALLING, ppc_interrupt) +GPIO_INT(USB_C1_RT_INT_ODL, PIN(4, 1), GPIO_INT_FALLING, retimer_interrupt) /* USED GPIOs: */ GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) @@ -58,7 +58,7 @@ GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW) GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_INPUT) +GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_ODR_HIGH) GPIO(EC_PROCHOT_ODL, PIN(5, 7), GPIO_ODR_HIGH) GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) |