diff options
author | Jeremy Bettis <jbettis@google.com> | 2021-11-08 16:07:48 -0700 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-11-12 23:24:47 +0000 |
commit | 99e0cf6844fa96d006fcdaae151f4f5c70f9c9ca (patch) | |
tree | af26e2bdb6f7116e48b6569befe6cb680c64c963 | |
parent | 13509b3f821bbab7431b1d7e247012fa278684b1 (diff) | |
download | chrome-ec-99e0cf6844fa96d006fcdaae151f4f5c70f9c9ca.tar.gz |
zephyr: Configure tcpci gpio alerts in test
Add GPIOs to overlay.dts.
Setup GPIO interrupts in gpio_map.h.
Implement tcpc_alert_event. This should probably be in a zephyr stub
instead, but today, this is board specific.
Add init hook to enable the usbc interrupts.
Interrupts have to be enabled by a driver or board, and these are
normally enabled by the board.
BRANCH=None
BUG=b:201314530
TEST=Observed in gdb.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Change-Id: I23bb328ffd5402e923abf8464395ca1dd2dd86de
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3269060
Tested-by: Jeremy Bettis <jbettis@chromium.org>
Auto-Submit: Jeremy Bettis <jbettis@chromium.org>
Commit-Queue: Keith Short <keithshort@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>
-rw-r--r-- | zephyr/test/drivers/include/gpio_map.h | 6 | ||||
-rw-r--r-- | zephyr/test/drivers/overlay.dts | 24 | ||||
-rw-r--r-- | zephyr/test/drivers/src/stubs.c | 61 |
3 files changed, 88 insertions, 3 deletions
diff --git a/zephyr/test/drivers/include/gpio_map.h b/zephyr/test/drivers/include/gpio_map.h index 1f67138bd2..5253b0155a 100644 --- a/zephyr/test/drivers/include/gpio_map.h +++ b/zephyr/test/drivers/include/gpio_map.h @@ -20,6 +20,10 @@ #define CONFIG_TEMP_SENSOR_POWER_GPIO GPIO_PG_EC_DSW_PWROK #define EC_CROS_GPIO_INTERRUPTS \ - GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) + GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt) \ + GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) \ + GPIO_INT(GPIO_USB_C1_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING, \ + tcpc_alert_event) #endif /* __ZEPHYR_GPIO_MAP_H */ diff --git a/zephyr/test/drivers/overlay.dts b/zephyr/test/drivers/overlay.dts index c247caab05..fc0ddc0a6e 100644 --- a/zephyr/test/drivers/overlay.dts +++ b/zephyr/test/drivers/overlay.dts @@ -64,6 +64,26 @@ enum-name = "GPIO_USB_C1_FRS_EN"; label = "USB_C1_FRS_EN"; }; + usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { + gpios = <&gpio0 9 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; + label = "USB_C0_TCPC_INT_ODL"; + }; + usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl { + gpios = <&gpio0 10 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; + label = "USB_C1_TCPC_INT_ODL"; + }; + usb_c0_tcpc_rst_l { + gpios = <&gpio0 11 (GPIO_OUT_HIGH | GPIO_INPUT)>; + enum-name = "GPIO_USB_C0_TCPC_RST_L"; + label = "USB_C0_TCPC_RST_L"; + }; + usb_c1_tcpc_rst_l { + gpios = <&gpio0 12 (GPIO_OUT_HIGH | GPIO_INPUT)>; + enum-name = "GPIO_USB_C1_TCPC_RST_L"; + label = "USB_C1_TCPC_RST_L"; + }; }; named-i2c-ports { compatible = "named-i2c-ports"; @@ -454,6 +474,7 @@ status = "okay"; reg = <0xb>; label = "TCPCI_PS8XXX_EMUL"; + alert_gpio = <&usb_c1_tcpc_int_odl>; }; ps8xxx_emul: ps8xxx_emul { @@ -518,7 +539,7 @@ }; &gpio0 { - ngpios = <9>; + ngpios = <13>; }; &i2c0 { @@ -607,6 +628,7 @@ status = "okay"; reg = <0x82>; label = "TCPCI_EMUL"; + alert_gpio = <&usb_c0_tcpc_int_odl>; }; }; diff --git a/zephyr/test/drivers/src/stubs.c b/zephyr/test/drivers/src/stubs.c index 523c8a5011..68aab8ba12 100644 --- a/zephyr/test/drivers/src/stubs.c +++ b/zephyr/test/drivers/src/stubs.c @@ -11,6 +11,7 @@ #include "charger/isl923x_public.h" #include "charger/isl9241_public.h" #include "config.h" +#include "hooks.h" #include "i2c/i2c.h" #include "power.h" #include "ppc/sn5s330_public.h" @@ -240,7 +241,23 @@ void system_hibernate(uint32_t seconds, uint32_t microseconds) uint16_t tcpc_get_alert_status(void) { - return 0; + uint16_t status = 0; + + /* + * Check which port has the ALERT line set and ignore if that TCPC has + * its reset line active. + */ + if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C0_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_0; + } + + if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL)) { + if (gpio_get_level(GPIO_USB_C1_TCPC_RST_L) != 0) + status |= PD_STATUS_TCPC_ALERT_1; + } + + return status; } enum power_state power_chipset_init(void) @@ -271,3 +288,45 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) /* Power signals list. Must match order of enum power_signal. */ const struct power_signal_info power_signal_list[] = {}; + +void tcpc_alert_event(enum gpio_signal signal) +{ + int port; + + switch (signal) { + case GPIO_USB_C0_TCPC_INT_ODL: + port = 0; + break; + case GPIO_USB_C1_TCPC_INT_ODL: + port = 1; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +/* TODO: This code should really be generic, and run based on something in + * the dts. + */ +static void usbc_interrupt_init(void) +{ + /* Enable TCPC interrupts. */ + gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); + + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); + + /* Reset generic TCPCI on port 0. */ + gpio_set_level(GPIO_USB_C0_TCPC_RST_L, 0); + msleep(1); + gpio_set_level(GPIO_USB_C0_TCPC_RST_L, 1); + + /* Reset PS8XXX on port 1. */ + gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 0); + msleep(PS8XXX_RESET_DELAY_MS); + gpio_set_level(GPIO_USB_C1_TCPC_RST_L, 1); +} +DECLARE_HOOK(HOOK_INIT, usbc_interrupt_init, HOOK_PRIO_INIT_I2C + 1); |