diff options
| author | Denis Brockus <dbrockus@chromium.org> | 2020-02-05 15:43:34 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-02-06 19:17:20 +0000 |
| commit | b1743225b0da0f24a860581e90b999615fbfced5 (patch) | |
| tree | de24666c969f091c31d12557623a396b426a5991 | |
| parent | 5a98268b9634e4996e4a69f624c09d896645a4a2 (diff) | |
| download | chrome-ec-b1743225b0da0f24a860581e90b999615fbfced5.tar.gz | |
trembyle: adjust gain on USB-A ps8811 for gen2 speeds
BUG=b:138600008
BRANCH=none
TEST=verify gen2 speeds on ps8811 equipt USB-A connections
Change-Id: I5226fccf2460009dd7f873ca6869b57048bd65fc
Signed-off-by: Denis Brockus <dbrockus@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2040096
Reviewed-by: Edward Hill <ecgh@chromium.org>
Commit-Queue: Edward Hill <ecgh@chromium.org>
Tested-by: Edward Hill <ecgh@chromium.org>
| -rw-r--r-- | baseboard/zork/baseboard.c | 25 | ||||
| -rw-r--r-- | baseboard/zork/baseboard.h | 2 | ||||
| -rw-r--r-- | driver/retimer/ps8811.h | 50 |
3 files changed, 77 insertions, 0 deletions
diff --git a/baseboard/zork/baseboard.c b/baseboard/zork/baseboard.c index 555afaaa31..682abc778d 100644 --- a/baseboard/zork/baseboard.c +++ b/baseboard/zork/baseboard.c @@ -24,6 +24,7 @@ #include "driver/ppc/nx20p348x.h" #include "driver/retimer/pi3dpx1207.h" #include "driver/retimer/ps8802.h" +#include "driver/retimer/ps8811.h" #include "driver/retimer/ps8818.h" #include "driver/tcpm/ps8xxx.h" #include "driver/tcpm/nct38xx.h" @@ -473,6 +474,30 @@ void bc12_interrupt(enum gpio_signal signal) } /***************************************************************************** + * USB-A Retimer tuning + */ + +/* PS8811 gain tuning */ +static void ps8811_tuning_init(void) +{ + int rv; + + /* USB-A0 can run with default settings */ + + /* USB-A1 needs to increase gain to get over MB/DB connector */ + rv = i2c_write8(I2C_PORT_USBA1, + PS8811_I2C_ADDR_FLAGS + PS8811_REG_PAGE1, + PS8811_REG1_USB_BEQ_LEVEL, + PS8811_BEQ_I2C_LEVEL_UP_13DB | + PS8811_BEQ_PIN_LEVEL_UP_18DB); + if (rv) { + CPRINTSUSB("C1: PS8811 not present or failing to set gain"); + return; + } +} +DECLARE_HOOK(HOOK_INIT, ps8811_tuning_init, HOOK_PRIO_INIT_I2C + 1); + +/***************************************************************************** * Custom Zork USB-C1 Retimer/MUX driver */ diff --git a/baseboard/zork/baseboard.h b/baseboard/zork/baseboard.h index 759a78240a..693ee1507d 100644 --- a/baseboard/zork/baseboard.h +++ b/baseboard/zork/baseboard.h @@ -195,7 +195,9 @@ #define CONFIG_UART_TX_BUF_SIZE 4096 #define I2C_PORT_TCPC0 NPCX_I2C_PORT0_0 +#define I2C_PORT_USBA0 NPCX_I2C_PORT0_0 #define I2C_PORT_TCPC1 NPCX_I2C_PORT1_0 +#define I2C_PORT_USBA1 NPCX_I2C_PORT1_0 #define I2C_PORT_BATTERY NPCX_I2C_PORT2_0 #define I2C_PORT_CHARGER I2C_PORT_BATTERY #define I2C_PORT_USB_MUX NPCX_I2C_PORT3_0 diff --git a/driver/retimer/ps8811.h b/driver/retimer/ps8811.h new file mode 100644 index 0000000000..13a83c045d --- /dev/null +++ b/driver/retimer/ps8811.h @@ -0,0 +1,50 @@ +/* Copyright 2020 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * PS8811 retimer. + */ + +#ifndef __CROS_EC_USB_RETIMER_PS8811_H +#define __CROS_EC_USB_RETIMER_PS8811_H + +/* + * PS8811 uses 7-bit I2C addresses 0x72 to 0x73 (ADDR=HH). + * Page 0 = 0x72, Page 1 = 0x73. + */ +#define PS8811_I2C_ADDR_FLAGS 0x72 + +/* + * PAGE 1 Register Definitions + */ +#define PS8811_REG_PAGE1 0x01 + +#define PS8811_REG1_USB_BEQ_LEVEL 0x05 +#define PS8811_BEQ_PIN_LEVEL_UP_9DB 0x00 +#define PS8811_BEQ_PIN_LEVEL_UP_10_5DB 0x01 +#define PS8811_BEQ_PIN_LEVEL_UP_12DB 0x02 +#define PS8811_BEQ_PIN_LEVEL_UP_13DB 0x03 +#define PS8811_BEQ_PIN_LEVEL_UP_16DB 0x04 +#define PS8811_BEQ_PIN_LEVEL_UP_17DB 0x05 +#define PS8811_BEQ_PIN_LEVEL_UP_18DB 0x06 +#define PS8811_BEQ_PIN_LEVEL_UP_19DB 0x07 +#define PS8811_BEQ_PIN_LEVEL_UP_20DB 0x08 +#define PS8811_BEQ_PIN_LEVEL_UP_21DB 0x09 +#define PS8811_BEQ_PIN_LEVEL_UP_23DB 0x0A +#define PS8811_BEQ_I2C_LEVEL_UP_9DB 0x00 +#define PS8811_BEQ_I2C_LEVEL_UP_10_5DB 0x10 +#define PS8811_BEQ_I2C_LEVEL_UP_12DB 0x20 +#define PS8811_BEQ_I2C_LEVEL_UP_13DB 0x30 +#define PS8811_BEQ_I2C_LEVEL_UP_16DB 0x40 +#define PS8811_BEQ_I2C_LEVEL_UP_17DB 0x50 +#define PS8811_BEQ_I2C_LEVEL_UP_18DB 0x60 +#define PS8811_BEQ_I2C_LEVEL_UP_19DB 0x70 +#define PS8811_BEQ_I2C_LEVEL_UP_20DB 0x80 +#define PS8811_BEQ_I2C_LEVEL_UP_21DB 0x90 +#define PS8811_BEQ_I2C_LEVEL_UP_23DB 0xA0 + +#define PS8811_REG1_USB_BEQ_CONFIG 0x06 +#define PS8811_BEQ_CONFIG_REG_ENABLE BIT(0) + + +#endif /* __CROS_EC_USB_RETIMER_PS8802_H */ |