diff options
author | Randall Spangler <rspangler@chromium.org> | 2013-05-21 12:34:11 -0700 |
---|---|---|
committer | ChromeBot <chrome-bot@google.com> | 2013-05-24 16:27:49 -0700 |
commit | c2dec851510aec1d20d15409a81a5288260a36ea (patch) | |
tree | 6d080f1f989a86767dd69c67b8095b487123e984 | |
parent | 1d28ca7cf1d8ec5f552dce7e84123735f6aecb14 (diff) | |
download | chrome-ec-c2dec851510aec1d20d15409a81a5288260a36ea.tar.gz |
More low-level flash interface cleanup
Setting at-boot protection always used the same start/range
(RO+PSTATE), so no point in passing that to the physical layer as
params.
flash_dataptr() should take a pointer to const data.
No functional changes; just rearranging code.
BUG=chrome-os-partner:15613
BRANCH=none
TEST=build pit, link, spring
- flashinfo -> (no flags)
- enable WP (via screw or dut-control)
- flashinfo -> wp_gpio_asserted
- flashwp enable
- flashinfo -> wp_gpio_asserted ro_at_boot
- flashwp now
- flashinfo -> wp_gpio_asserted ro_at_boot all_now (and possibly ro_now)
- flashwp disable -> fails
- flashinfo -> wp_gpio_asserted ro_at_boot all_now
- reboot ap-off
- flashinfo -> wp_gpio_asserted ro_at_boot ro_now
- disable WP (via screw or dut-control)
- reboot
- flashinfo -> ro_at_boot
- flashwp disable
- flashinfo -> (no flags)
Change-Id: Ifd6553dc907fa6fafce81b56af0c648ac6d6bee1
Signed-off-by: Randall Spangler <rspangler@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/56628
-rw-r--r-- | chip/lm4/flash.c | 2 | ||||
-rw-r--r-- | chip/stm32/flash-stm32f100.c | 13 | ||||
-rw-r--r-- | chip/stm32/flash-stm32l15x.c | 6 | ||||
-rw-r--r-- | common/flash_common.c | 30 | ||||
-rw-r--r-- | include/flash.h | 49 |
5 files changed, 51 insertions, 49 deletions
diff --git a/chip/lm4/flash.c b/chip/lm4/flash.c index 2c5e0f9127..e7b4064665 100644 --- a/chip/lm4/flash.c +++ b/chip/lm4/flash.c @@ -225,7 +225,7 @@ int flash_pre_init(void) if (reset_flags & RESET_FLAG_SYSJUMP) return EC_SUCCESS; - if ((prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED)) { + if (prot_flags & EC_FLASH_PROTECT_GPIO_ASSERTED) { /* * Write protect is asserted. If we want RO flash protected, * protect it now. diff --git a/chip/stm32/flash-stm32f100.c b/chip/stm32/flash-stm32f100.c index 1c22ed4f0b..ff6e01e8e0 100644 --- a/chip/stm32/flash-stm32f100.c +++ b/chip/stm32/flash-stm32f100.c @@ -47,6 +47,10 @@ static int entire_flash_locked; #define FLASH_SYSJUMP_TAG 0x5750 /* "WP" - Write Protect */ #define FLASH_HOOK_VERSION 1 /* The previous write protect state before sys jump */ +/* + * TODO: check if STM32L code works here too - that is, check if entire flash + * is locked by attempting to lock it rather than keeping a global variable. + */ struct flash_wp_state { int entire_flash_locked; }; @@ -359,8 +363,7 @@ uint32_t flash_physical_get_protect_flags(void) return flags; } -int flash_physical_set_protect_at_boot(int start_bank, int bank_count, - int enable) +int flash_physical_protect_ro_at_boot(int enable) { int block; int i; @@ -369,7 +372,9 @@ int flash_physical_set_protect_at_boot(int start_bank, int bank_count, for (i = 0; i < 4; ++i) original_val[i] = val[i] = read_optb(i * 2 + 8); - for (block = start_bank; block < start_bank + bank_count; block++) { + for (block = RO_BANK_OFFSET; + block < RO_BANK_OFFSET + RO_BANK_COUNT + PSTATE_BANK_COUNT; + block++) { int byte_off = STM32_OPTB_WRP_OFF(block/8) / 2 - 4; if (enable) val[byte_off] = val[byte_off] & (~(1 << (block % 8))); @@ -466,7 +471,7 @@ int flash_pre_init(void) * update to the write protect register and reboot so * it takes effect. */ - flash_protect_ro_at_boot(1); + flash_physical_protect_ro_at_boot(1); need_reset = 1; } diff --git a/chip/stm32/flash-stm32l15x.c b/chip/stm32/flash-stm32l15x.c index 04ca0eddd3..51453d4198 100644 --- a/chip/stm32/flash-stm32l15x.c +++ b/chip/stm32/flash-stm32l15x.c @@ -312,11 +312,11 @@ int flash_physical_get_protect(int block) return STM32_FLASH_WRPR & (1 << block); } -int flash_physical_set_protect_at_boot(int start_bank, int bank_count, - int enable) +int flash_physical_protect_ro_at_boot(int enable) { uint32_t prot; - uint32_t mask = ((1 << bank_count) - 1) << start_bank; + uint32_t mask = ((1 << (RO_BANK_COUNT + PSTATE_BANK_COUNT)) - 1) + << RO_BANK_OFFSET; int rv; /* Read the current protection status */ diff --git a/common/flash_common.c b/common/flash_common.c index 15f8fac3d1..430bcaead8 100644 --- a/common/flash_common.c +++ b/common/flash_common.c @@ -30,6 +30,22 @@ struct persist_state { #define PERSIST_FLAG_PROTECT_RO 0x02 /** + * Get the physical memory address of a flash offset + * + * This is used for direct flash access. We assume that the flash is + * contiguous from this start address through to the end of the usable + * flash. + * + * @param offset Flash offset to get address of + * @param dataptrp Returns pointer to memory address of flash offset + * @return pointer to flash memory offset, if ok, else NULL + */ +static const char *flash_physical_dataptr(int offset) +{ + return (char *)((uintptr_t)CONFIG_FLASH_BASE + offset); +} + +/** * Read persistent state into pstate. * * @param pstate Destination for persistent state @@ -77,7 +93,7 @@ static int flash_write_pstate(const struct persist_state *pstate) (const char *)pstate); } -int flash_dataptr(int offset, int size_req, int align, char **ptrp) +int flash_dataptr(int offset, int size_req, int align, const char **ptrp) { if (offset < 0 || size_req < 0 || offset + size_req > CONFIG_FLASH_SIZE || @@ -93,9 +109,10 @@ int flash_dataptr(int offset, int size_req, int align, char **ptrp) #ifndef CHIP_VARIANT_stm32l15x int flash_is_erased(uint32_t offset, int size) { - uint32_t *ptr; + const uint32_t *ptr; - if (flash_dataptr(offset, size, sizeof(uint32_t), (char **)&ptr) < 0) + if (flash_dataptr(offset, size, sizeof(uint32_t), + (const char **)&ptr) < 0) return 0; for (size /= sizeof(uint32_t); size > 0; size -= 4, ptr++) @@ -167,9 +184,7 @@ int flash_protect_ro_at_boot(int enable) * This assumes PSTATE immediately follows RO, which it does on * all STM32 platforms (which are the only ones with this config). */ - flash_physical_set_protect_at_boot(RO_BANK_OFFSET, - RO_BANK_COUNT + PSTATE_BANK_COUNT, - new_flags); + flash_physical_protect_ro_at_boot(new_flags); #endif return EC_SUCCESS; @@ -469,7 +484,8 @@ static int flash_command_read(struct host_cmd_handler_args *args) { const struct ec_params_flash_read *p = args->params; - if (flash_dataptr(p->offset, p->size, 1, (char **)&args->response) < 0) + if (flash_dataptr(p->offset, p->size, 1, + (const char **)&args->response) < 0) return EC_RES_ERROR; args->response_size = p->size; diff --git a/include/flash.h b/include/flash.h index 55f0b0fba8..4bcbb8eb8f 100644 --- a/include/flash.h +++ b/include/flash.h @@ -32,33 +32,6 @@ /* Low-level methods, for use by flash_common. */ /** - * Get the physical memory address of a flash offset - * - * This is used for direct flash access. We assume that the flash is - * contiguous from this start address through to the end of the usable - * flash. - * - * @param offset Flash offset to get address of - * @param dataptrp Returns pointer to memory address of flash offset - * @return pointer to flash memory offset, if ok, else NULL - */ -static inline char *flash_physical_dataptr(int offset) -{ - return (char *)((uintptr_t)CONFIG_FLASH_BASE + offset); -} - -/** - * Check if a region of flash is erased - * - * It is assumed that an erased region has all bits set to 1. - * - * @param offset Flash offset to check - * @param size Number of bytes to check (word-aligned) - * @return 1 if erased, 0 if not erased - */ -int flash_is_erased(uint32_t offset, int size); - -/** * Write to physical flash. * * Offset and size must be a multiple of CONFIG_FLASH_WRITE_SIZE. @@ -97,15 +70,12 @@ int flash_physical_get_protect(int bank); uint32_t flash_physical_get_protect_flags(void); /** - * Set physical write protect status for the next boot. + * Enable/disable protecting RO firmware and pstate at boot. * - * @param start_bank Start bank - * @param bank_count Number of banks to protect * @param enable Enable (non-zero) or disable (zero) protection * @return non-zero if error. */ -int flash_physical_set_protect_at_boot(int start_bank, int bank_count, - int enable); +int flash_physical_protect_ro_at_boot(int enable); /** * Protect flash now. @@ -127,7 +97,18 @@ int flash_physical_protect_now(int all); int flash_physical_force_reload(void); /*****************************************************************************/ -/* Low-level persistent state code for use by flash modules. */ +/* Low-level common code for use by flash modules. */ + +/** + * Check if a region of flash is erased + * + * It is assumed that an erased region has all bits set to 1. + * + * @param offset Flash offset to check + * @param size Number of bytes to check (word-aligned) + * @return 1 if erased, 0 if not erased + */ +int flash_is_erased(uint32_t offset, int size); /** * Enable write protect for the read-only code. @@ -177,7 +158,7 @@ int flash_get_size(void); * in memory, unless function fails, iwc it is unset. * @return size of flash region available at *ptrp, or -1 on error */ -int flash_dataptr(int offset, int size_req, int align, char **ptrp); +int flash_dataptr(int offset, int size_req, int align, const char **ptrp); /** * Write to flash. |