diff options
| author | Fabio Baltieri <fabiobaltieri@google.com> | 2021-07-01 18:06:36 +0000 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-08-06 10:12:19 +0000 |
| commit | 7437b8552ecc736275bf0e2d8622ec407558902f (patch) | |
| tree | ecdb2369ed0d0e29aacdf0b821f44d1ad5a6a5aa | |
| parent | 53c02958d338f8a4eabd2e5239800d1e7fbac60f (diff) | |
| download | chrome-ec-7437b8552ecc736275bf0e2d8622ec407558902f.tar.gz | |
zephyr: shim: use NPCX_CLK_CTRL_NODE for clock control
Zephyr NPCX drivers has been switched to the link time device
definition, and now NPCX_CLK_CTRL_NODE is available to point to the pcc
node directly. Use that in the EC code as well for the clock API.
BRANCH=none
BUG=none
TEST=build and run on volteer
Cq-Depend: chromium:3000806, chromium:3070703
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Change-Id: I8a5b5426c5e6a9167cd232fc72e50d372958b31c
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3001584
Reviewed-by: Yuval Peress <peress@chromium.org>
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
| -rw-r--r-- | zephyr/drivers/cros_flash/cros_flash_npcx.c | 2 | ||||
| -rw-r--r-- | zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c | 2 | ||||
| -rw-r--r-- | zephyr/drivers/cros_shi/cros_shi_npcx.c | 2 | ||||
| -rw-r--r-- | zephyr/shim/chip/npcx/clock.c | 2 |
4 files changed, 4 insertions, 4 deletions
diff --git a/zephyr/drivers/cros_flash/cros_flash_npcx.c b/zephyr/drivers/cros_flash/cros_flash_npcx.c index 6f6d75230a..bb1bd12d89 100644 --- a/zephyr/drivers/cros_flash/cros_flash_npcx.c +++ b/zephyr/drivers/cros_flash/cros_flash_npcx.c @@ -789,7 +789,7 @@ static const struct cros_flash_driver_api cros_flash_npcx_driver_api = { static int flash_npcx_init(const struct device *dev) { const struct cros_flash_npcx_config *const config = DRV_CONFIG(dev); - const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(pcc)); + const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); int ret; diff --git a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c index c704e45738..69d71e096b 100644 --- a/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c +++ b/zephyr/drivers/cros_kb_raw/cros_kb_raw_npcx.c @@ -71,7 +71,7 @@ static void kb_raw_npcx_init_ksi_wui_callback( static int kb_raw_npcx_init(const struct device *dev) { const struct cros_kb_raw_npcx_config *const config = DRV_CONFIG(dev); - const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(pcc)); + const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); int ret; /* Turn on device clock first and get source clock freq. */ diff --git a/zephyr/drivers/cros_shi/cros_shi_npcx.c b/zephyr/drivers/cros_shi/cros_shi_npcx.c index 5027d0eeaf..ebfa29c3e9 100644 --- a/zephyr/drivers/cros_shi/cros_shi_npcx.c +++ b/zephyr/drivers/cros_shi/cros_shi_npcx.c @@ -804,7 +804,7 @@ static int shi_npcx_init(const struct device *dev) int ret; const struct cros_shi_npcx_config *const config = DRV_CONFIG(dev); struct shi_reg *const inst = HAL_INSTANCE(dev); - const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(pcc)); + const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); /* Turn on shi device clock first */ ret = clock_control_on(clk_dev, diff --git a/zephyr/shim/chip/npcx/clock.c b/zephyr/shim/chip/npcx/clock.c index cd483682b8..8c8bad5596 100644 --- a/zephyr/shim/chip/npcx/clock.c +++ b/zephyr/shim/chip/npcx/clock.c @@ -22,7 +22,7 @@ LOG_MODULE_REGISTER(shim_clock, LOG_LEVEL_ERR); int clock_get_freq(void) { - const struct device *clk_dev = DEVICE_DT_GET(DT_NODELABEL(pcc)); + const struct device *clk_dev = DEVICE_DT_GET(NPCX_CLK_CTRL_NODE); const struct npcx_clk_cfg clk_cfg = { .bus = NPCX_CLOCK_BUS_CORE, }; |