Skyrim: GPIOs and Power Sequencing

Break out any differing GPIOs into the board .dts files, and change the
main gpio_map.h and power_signals.c files to reflect what skyrim needs
for interrupts and power sequencing.

BRANCH=None
BUG=b:208515128
TEST=zmake testall

Signed-off-by: Diana Z <dzigterman@chromium.org>
Change-Id: If007bf77dc3d52616f97894d193af7b0e5cea4c2
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3352540
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Keith Short <keithshort@chromium.org>

7 files changed, 237 insertions, 120 deletions

diff --git a/zephyr/projects/skyrim/adc.dts b/zephyr/projects/skyrim/adc.dts
index c6becb1a0b..fa9db4ece8 100644
--- a/zephyr/projects/skyrim/adc.dts
+++ b/zephyr/projects/skyrim/adc.dts
@@ -9,11 +9,6 @@
 	named-adc-channels {
 		compatible = "named-adc-channels";
 
-		adc_temp_soc: temp-soc {
-			label = "SOC";
-			enum-name = "ADC_TEMP_SENSOR_SOC";
-			channel = <0>;
-		};
 		adc_temp_charger: temp-charger {
 			label = "CHARGER";
 			enum-name = "ADC_TEMP_SENSOR_CHARGER";
diff --git a/zephyr/projects/skyrim/gpio.dts b/zephyr/projects/skyrim/gpio.dts
index 142560d6e2..c1d25e8229 100644
--- a/zephyr/projects/skyrim/gpio.dts
+++ b/zephyr/projects/skyrim/gpio.dts
@@ -1,11 +1,13 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
 / {
+	/* GPIOs shared by all boards */
 	named-gpios {
 		compatible = "named-gpios";
 
-		ec_wp_l {
-			gpios = <&gpio5 0 GPIO_INPUT>;
-			enum-name = "GPIO_WP_L";
-		};
 		ccd_mode_odl {
 			gpios = <&gpioc 6 GPIO_ODR_HIGH>;
 		};
@@ -16,10 +18,6 @@
 			gpios = <&gpiod 2 GPIO_INPUT>;
 			enum-name = "GPIO_POWER_BUTTON_L";
 		};
-		ec_pwr_btn_odl {
-			gpios = <&gpio0 1 GPIO_INPUT>;
-			enum-name = "GPIO_EC_PWR_BTN_ODL";
-		};
 		slp_s3_l {
 			gpios = <&gpio6 1 GPIO_INPUT>;
 			enum-name = "GPIO_PCH_SLP_S3_L";
@@ -28,10 +26,6 @@
 			gpios = <&gpio7 2 GPIO_INPUT>;
 			enum-name = "GPIO_PCH_SLP_S5_L";
 		};
-		slp_s3_s0i3_l {
-			gpios = <&gpio7 4 GPIO_INPUT>;
-			enum-name = "GPIO_PCH_SLP_S0_L";
-		};
 		pg_pwr_s5 {
 			gpios = <&gpioc 0 GPIO_INPUT>;
 			enum-name = "GPIO_S5_PGOOD";
@@ -44,18 +38,6 @@
 			gpios = <&gpio0 0 GPIO_INPUT>;
 			enum-name = "GPIO_AC_PRESENT";
 		};
-		ec_pcore_int_odl {
-			gpios = <&gpiof 0 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_EC_PCORE_INT_ODL";
-		};
-		pg_groupc_s0_od {
-			gpios = <&gpioa 3 GPIO_INPUT>;
-			enum-name = "GPIO_PG_GROUPC_S0_OD";
-		};
-		pg_lpddr4x_s3_od {
-			gpios = <&gpio9 5 GPIO_INPUT>;
-			enum-name = "GPIO_PG_LPDDR4X_S3_OD";
-		};
 		en_pwr_s5 {
 			gpios = <&gpiob 7 GPIO_OUT_LOW>;
 			enum-name = "GPIO_EN_PWR_A";
@@ -68,10 +50,6 @@
 			gpios = <&gpioe 1 GPIO_OUT_LOW>;
 			enum-name = "GPIO_EN_PWR_PCORE_S0_R";
 		};
-		ec_entering_rw {
-			gpios = <&gpio6 6 GPIO_OUT_LOW>;
-			enum-name = "GPIO_ENTERING_RW";
-		};
 		ec_sys_rst_l {
 			gpios = <&gpio7 6 GPIO_ODR_HIGH>;
 			enum-name = "GPIO_SYS_RESET_L";
@@ -80,27 +58,10 @@
 			gpios = <&gpioc 5 GPIO_OUT_LOW>;
 			enum-name = "GPIO_PCH_RSMRST_L";
 		};
-		ec_clr_cmos {
-			gpios = <&gpioa 1 GPIO_OUT_LOW>;
-		};
-		ec_mem_event {
-			gpios = <&gpioa 5 GPIO_OUT_LOW>;
-		};
-		ec_soc_pwr_btn_l {
-			gpios = <&gpio6 3 GPIO_OUT_HIGH>;
-			enum-name = "GPIO_PCH_PWRBTN_L";
-		};
-		ec_soc_pwr_good {
-			gpios = <&gpiod 3 GPIO_OUT_LOW>;
-			enum-name = "GPIO_PCH_SYS_PWROK";
-		};
 		ec_soc_wake_l {
 			gpios = <&gpio0 3 GPIO_OUT_HIGH>;
 			enum-name = "GPIO_EC_PCH_WAKE_ODL";
 		};
-		ec_soc_int_l {
-			gpios = <&gpio8 3 GPIO_OUT_HIGH>;
-		};
 		prochot_odl {
 			gpios = <&gpiod 5 GPIO_ODR_HIGH>;
 			enum-name = "GPIO_CPU_PROCHOT";
@@ -108,9 +69,6 @@
 		soc_alert_ec_l {
 			gpios = <&gpioe 2 GPIO_INPUT>;
 		};
-		soc_thermtrip_odl {
-			gpios = <&gpioe 5 GPIO_INPUT>;
-		};
 		usb_c0_tcpc_int_odl {
 			gpios = <&gpioe 0 GPIO_INPUT>;
 			enum-name = "GPIO_USB_C0_TCPC_INT_ODL";
@@ -135,10 +93,6 @@
 			gpios = <&gpio9 6 (GPIO_INPUT | GPIO_PULL_UP)>;
 			enum-name = "GPIO_USB_C1_BC12_INT_ODL";
 		};
-		usb_c0_c1_fault_odl {
-			gpios = <&gpio7 3 GPIO_ODR_HIGH>;
-			enum-name = "GPIO_USB_C0_C1_FAULT_ODL";
-		};
 		usb_c0_tcpc_rst_l {
 			gpios = <&gpio3 4 GPIO_OUT_HIGH>;
 			enum-name = "GPIO_USB_C0_TCPC_RST_L";
@@ -155,21 +109,10 @@
 			gpios = <&gpiof 4 GPIO_OUT_LOW>;
 			enum-name = "GPIO_USB_C1_DP_HPD";
 		};
-		3axis_int_l {
-			gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>;
-		};
 		lid_open {
 			gpios = <&gpio0 2 GPIO_INPUT>;
 			enum-name = "GPIO_LID_OPEN";
 		};
-		voldn_btn_odl {
-			gpios = <&gpioa 7 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_DOWN_L";
-		};
-		volup_btn_odl {
-			gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>;
-			enum-name = "GPIO_VOLUME_UP_L";
-		};
 		ec_batt_pres_odl {
 			gpios = <&gpio9 4 GPIO_INPUT>;
 			enum-name = "GPIO_BATT_PRES_ODL";
@@ -245,30 +188,9 @@
 		ec_gpio56 {
 			gpios = <&gpio5 6 (GPIO_INPUT | GPIO_PULL_UP)>;
 		};
-		ec_ps2_clk {
-			gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
-		ec_ps2_dat {
-			gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
-		ec_ps2_rst {
-			gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
-		ec_gpiob0 {
-			gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
-		ec_gpio81 {
-			gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
 		ec_flprg2 {
 			gpios = <&gpio8 6 (GPIO_INPUT | GPIO_PULL_UP)>;
 		};
-		ec_psl_gpo {
-			gpios = <&gpiod 7 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
-		ec_pwm7 {
-			gpios = <&gpio6 0 (GPIO_INPUT | GPIO_PULL_UP)>;
-		};
 	};
 
 	vsby-psl-in-list {
diff --git a/zephyr/projects/skyrim/guybrush.dts b/zephyr/projects/skyrim/guybrush.dts
index 46072fd703..e9a7f194ea 100644
--- a/zephyr/projects/skyrim/guybrush.dts
+++ b/zephyr/projects/skyrim/guybrush.dts
@@ -5,6 +5,107 @@
 
 / {
 	named-gpios {
-		/* Guybrush-specific GPIO customizations can be made here */
+		/* Guybrush-specific GPIO customizations */
+		ec_wp_l {
+			gpios = <&gpio5 0 GPIO_INPUT>;
+			enum-name = "GPIO_WP_L";
+		};
+		ec_pwr_btn_odl {
+			gpios = <&gpio0 1 GPIO_INPUT>;
+			enum-name = "GPIO_EC_PWR_BTN_ODL";
+		};
+		slp_s3_s0i3_l {
+			gpios = <&gpio7 4 GPIO_INPUT>;
+			enum-name = "GPIO_PCH_SLP_S0_L";
+		};
+		ec_pcore_int_odl {
+			gpios = <&gpiof 0 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_EC_PCORE_INT_ODL";
+		};
+		pg_groupc_s0_od {
+			gpios = <&gpioa 3 GPIO_INPUT>;
+			enum-name = "GPIO_PG_GROUPC_S0_OD";
+		};
+		pg_lpddr4x_s3_od {
+			gpios = <&gpio9 5 GPIO_INPUT>;
+			enum-name = "GPIO_PG_LPDDR4X_S3_OD";
+		};
+		ec_soc_pwr_good {
+			gpios = <&gpiod 3 GPIO_OUT_LOW>;
+			enum-name = "GPIO_PCH_SYS_PWROK";
+		};
+		ec_entering_rw {
+			gpios = <&gpio6 6 GPIO_OUT_LOW>;
+			enum-name = "GPIO_ENTERING_RW";
+		};
+		ec_clr_cmos {
+			gpios = <&gpioa 1 GPIO_OUT_LOW>;
+		};
+		ec_mem_event {
+			gpios = <&gpioa 5 GPIO_OUT_LOW>;
+		};
+		ec_soc_pwr_btn_l {
+			gpios = <&gpio6 3 GPIO_OUT_HIGH>;
+			enum-name = "GPIO_PCH_PWRBTN_L";
+		};
+		ec_soc_int_l {
+			gpios = <&gpio8 3 GPIO_OUT_HIGH>;
+		};
+		soc_thermtrip_odl {
+			gpios = <&gpioe 5 GPIO_INPUT>;
+		};
+		usb_c0_c1_fault_odl {
+			gpios = <&gpio7 3 GPIO_ODR_HIGH>;
+			enum-name = "GPIO_USB_C0_C1_FAULT_ODL";
+		};
+		3axis_int_l {
+			gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_DOWN)>;
+		};
+		voldn_btn_odl {
+			gpios = <&gpioa 7 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_DOWN_L";
+		};
+		volup_btn_odl {
+			gpios = <&gpio9 3 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_UP_L";
+		};
+		ec_ps2_clk {
+			gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_ps2_dat {
+			gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_ps2_rst {
+			gpios = <&gpio6 2 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_gpiob0 {
+			gpios = <&gpiob 0 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_gpio81 {
+			gpios = <&gpio8 1 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_psl_gpo {
+			gpios = <&gpiod 7 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_pwm7 {
+			gpios = <&gpio6 0 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+	};
+
+	def-lvol-io-list {
+		compatible = "nuvoton,npcx-lvolctrl-def";
+
+		/* Low voltage on I2C6_1 */
+		lvol-io-pads = <&lvol_ioe4 &lvol_ioe3>;
+	};
+
+	named-adc-channels {
+		compatible = "named-adc-channels";
+
+		adc_temp_soc: temp-soc {
+			label = "SOC";
+			enum-name = "ADC_TEMP_SENSOR_SOC";
+			channel = <0>;
+		};
 	};
 };
diff --git a/zephyr/projects/skyrim/include/gpio_map.h b/zephyr/projects/skyrim/include/gpio_map.h
index 77abf0919a..89caf99a88 100644
--- a/zephyr/projects/skyrim/include/gpio_map.h
+++ b/zephyr/projects/skyrim/include/gpio_map.h
@@ -11,7 +11,6 @@
 
 /* Power input signals */
 enum power_signal {
-	X86_SLP_S0_N, /* SOC  -> SLP_S3_S0I3_L */
 	X86_SLP_S3_N, /* SOC  -> SLP_S3_L */
 	X86_SLP_S5_N, /* SOC  -> SLP_S5_L */
 
@@ -22,6 +21,9 @@ enum power_signal {
 	POWER_SIGNAL_COUNT,
 };
 
+#define GPIO_ENTERING_RW	GPIO_UNIMPLEMENTED
+#define GPIO_PCH_SYS_PWROK	GPIO_UNIMPLEMENTED
+
 /*
  * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
  *
@@ -42,21 +44,17 @@ enum power_signal {
 	GPIO_INT(GPIO_AC_PRESENT, GPIO_INT_EDGE_BOTH, extpower_interrupt)      \
 	GPIO_INT(GPIO_POWER_BUTTON_L, GPIO_INT_EDGE_BOTH,                      \
 		 power_button_interrupt)                                       \
-	GPIO_INT(GPIO_EC_PWR_BTN_ODL, GPIO_INT_EDGE_BOTH,                      \
-		 power_button_interrupt)                                       \
 	GPIO_INT(GPIO_PCH_SLP_S3_L, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0)   \
 	GPIO_INT(GPIO_PCH_SLP_S5_L, GPIO_INT_EDGE_BOTH,                        \
 		 power_signal_interrupt)                                       \
-	GPIO_INT(GPIO_PCH_SLP_S0_L, GPIO_INT_EDGE_BOTH,                        \
-		 power_signal_interrupt)                                       \
 	GPIO_INT(GPIO_S5_PGOOD, GPIO_INT_EDGE_BOTH, baseboard_en_pwr_s0)       \
 	GPIO_INT(GPIO_S0_PGOOD, GPIO_INT_EDGE_BOTH, power_signal_interrupt)    \
-	GPIO_INT(GPIO_EC_PCORE_INT_ODL, GPIO_INT_EDGE_BOTH,                    \
-		 power_signal_interrupt)                                       \
 	GPIO_INT(GPIO_PG_GROUPC_S0_OD, GPIO_INT_EDGE_BOTH,                     \
-		 baseboard_en_pwr_pcore_s0)                                    \
-	GPIO_INT(GPIO_PG_LPDDR4X_S3_OD, GPIO_INT_EDGE_BOTH,                    \
-		 baseboard_en_pwr_pcore_s0)                                    \
+		 baseboard_set_en_pwr_pcore)                                   \
+	GPIO_INT(GPIO_PG_LPDDR5_S3_OD, GPIO_INT_EDGE_BOTH,                     \
+		 baseboard_set_en_pwr_pcore)                                   \
+	GPIO_INT(GPIO_PG_LPDDR5_S0_OD, GPIO_INT_EDGE_BOTH,                     \
+		 baseboard_set_soc_pwr_pgood)				       \
 	GPIO_INT(GPIO_VOLUME_UP_L, GPIO_INT_EDGE_BOTH, button_interrupt)       \
 	GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL, GPIO_INT_EDGE_FALLING,              \
 		 tcpc_alert_event)					       \
diff --git a/zephyr/projects/skyrim/power_signals.c b/zephyr/projects/skyrim/power_signals.c
index eb27ea6c14..9f39edf505 100644
--- a/zephyr/projects/skyrim/power_signals.c
+++ b/zephyr/projects/skyrim/power_signals.c
@@ -10,21 +10,8 @@
 #include "power.h"
 #include "timer.h"
 
-/* Wake Sources */
-const enum gpio_signal hibernate_wake_pins[] = {
-	GPIO_LID_OPEN,
-	GPIO_AC_PRESENT,
-	GPIO_POWER_BUTTON_L,
-};
-const int hibernate_wake_pins_used =  ARRAY_SIZE(hibernate_wake_pins);
-
 /* Power Signal Input List */
 const struct power_signal_info power_signal_list[] = {
-	[X86_SLP_S0_N] = {
-		.gpio = GPIO_PCH_SLP_S0_L,
-		.flags = POWER_SIGNAL_ACTIVE_HIGH,
-		.name = "SLP_S0_DEASSERTED",
-	},
 	[X86_SLP_S3_N] = {
 		.gpio = GPIO_PCH_SLP_S3_L,
 		.flags = POWER_SIGNAL_ACTIVE_HIGH,
@@ -52,7 +39,8 @@ static void baseboard_interrupt_init(void)
 {
 	/* Enable Power Group interrupts. */
 	gpio_enable_interrupt(GPIO_PG_GROUPC_S0_OD);
-	gpio_enable_interrupt(GPIO_PG_LPDDR4X_S3_OD);
+	gpio_enable_interrupt(GPIO_PG_LPDDR5_S0_OD);
+	gpio_enable_interrupt(GPIO_PG_LPDDR5_S3_OD);
 }
 DECLARE_HOOK(HOOK_INIT, baseboard_interrupt_init, HOOK_PRIO_INIT_I2C + 1);
 
@@ -82,13 +70,28 @@ void board_pwrbtn_to_pch(int level)
 	gpio_set_level(GPIO_PCH_PWRBTN_L, level);
 }
 
-void baseboard_en_pwr_pcore_s0(enum gpio_signal signal)
+/* Note: signal parameter unused */
+void baseboard_set_soc_pwr_pgood(enum gpio_signal unused)
 {
+	gpio_set_level(GPIO_EC_SOC_PWR_GOOD,
+				gpio_get_level(GPIO_EN_PWR_PCORE_S0_R) &&
+				gpio_get_level(GPIO_PG_LPDDR5_S0_OD));
+}
 
-	/* EC must AND signals PG_LPDDR4X_S3_OD and PG_GROUPC_S0_OD */
+/* Note: signal parameter unused */
+void baseboard_set_en_pwr_pcore(enum gpio_signal unused)
+{
+	/*
+	 * EC must AND signals PG_LPDDR5_S3_OD, PG_GROUPC_S0_OD, and
+	 * EN_PWR_S0_R
+	 */
 	gpio_set_level(GPIO_EN_PWR_PCORE_S0_R,
-		       gpio_get_level(GPIO_PG_LPDDR4X_S3_OD) &&
-		       gpio_get_level(GPIO_PG_GROUPC_S0_OD));
+					gpio_get_level(GPIO_PG_LPDDR5_S3_OD) &&
+					gpio_get_level(GPIO_PG_GROUPC_S0_OD) &&
+					gpio_get_level(GPIO_EN_PWR_S0_R));
+
+	/* Update EC_SOC_PWR_GOOD based on our results */
+	baseboard_set_soc_pwr_pgood(unused);
 }
 
 void baseboard_en_pwr_s0(enum gpio_signal signal)
@@ -99,6 +102,9 @@ void baseboard_en_pwr_s0(enum gpio_signal signal)
 		       gpio_get_level(GPIO_PCH_SLP_S3_L) &&
 		       gpio_get_level(GPIO_S5_PGOOD));
 
+	/* Change EN_PWR_PCORE_S0_R if needed*/
+	baseboard_set_en_pwr_pcore(signal);
+
 	/* Now chain off to the normal power signal interrupt handler. */
 	power_signal_interrupt(signal);
 }
diff --git a/zephyr/projects/skyrim/skyrim.dts b/zephyr/projects/skyrim/skyrim.dts
index 2f4d483900..44abbad3ac 100644
--- a/zephyr/projects/skyrim/skyrim.dts
+++ b/zephyr/projects/skyrim/skyrim.dts
@@ -5,9 +5,101 @@
 
 / {
 	named-gpios {
+		/* Skyrim-specific GPIO customizations */
+		usb_fault_odl {
+			gpios = <&gpio5 0 GPIO_ODR_HIGH>;
+			enum-name = "GPIO_USB_FAULT_ODL";
+		};
+		en_pwr_s3 {
+			gpios = <&gpio7 4 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EN_PWR_S3";
+		};
+		pg_groupc_s0_od {
+			gpios = <&gpiof 0 GPIO_INPUT>;
+			enum-name = "GPIO_PG_GROUPC_S0_OD";
+		};
+		/* TODO: Add interrupt handler */
+		ec_i2c_usbc_pd_int {
+			gpios = <&gpioa 3 GPIO_INPUT>;
+			enum-name = "GPIO_EC_I2C_USBC_PD_INT";
+		};
+		/* TODO: Add interrupt handler */
+		soc_thermtrip_odl {
+			gpios = <&gpio9 5 GPIO_INPUT>;
+			enum-name = "GPIO_SOC_THERMTRIP_ODL";
+		};
+		hub_rst {
+			gpios = <&gpio6 6 GPIO_OUT_LOW>;
+			enum-name = "GPIO_HUB_RST";
+		};
+		ec_soc_int_l {
+			gpios = <&gpioa 1 GPIO_OUT_HIGH>;
+			enum-name = "GPIO_EC_INT_L";
+		};
+		ec_soc_pwr_good {
+			gpios = <&gpiod 3 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EC_SOC_PWR_GOOD";
+		};
+		/* TODO: Add interrupt handler to shut down */
+		pcore_ocp_r_l {
+			gpios = <&gpioa 5 GPIO_INPUT>;
+			enum-name = "GPIO_PCORE_OCP_L";
+		};
+		/* TODO: Add interrupt handler */
+		sc_0_int_l {
+			gpios = <&gpio6 3 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_SC_0_INT_L";
+		};
+		/* TODO: Add interrupt handler */
+		usb_hub_fault_q_odl {
+			gpios = <&gpioe 5 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_USB_HUB_FAULT_ODL";
+		};
+		pg_lpddr5_s3_od {
+			gpios = <&gpio7 3 GPIO_INPUT>;
+			enum-name = "GPIO_PG_LPDDR5_S3_OD";
+		};
+		3axis_int_l {
+			gpios = <&gpioa 2 (GPIO_INPUT | GPIO_PULL_UP)>;
+		};
+		ec_soc_pwr_btn_l {
+			gpios = <&gpioa 7 GPIO_OUT_HIGH>;
+			enum-name = "GPIO_PCH_PWRBTN_L";
+		};
+		volup_btn_odl {
+			gpios = <&gpio6 7 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_UP_L";
+		};
+		voldn_btn_odl {
+			gpios = <&gpio7 0 (GPIO_INPUT | GPIO_PULL_UP)>;
+			enum-name = "GPIO_VOLUME_DOWN_L";
+		};
+		ec_sc_rst {
+			gpios = <&gpiob 0 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EC_SC_RST";
+		};
+		/* TODO: Add CBI_WP feature config */
+		ec_cbi_wp {
+			gpios = <&gpio8 1 GPIO_OUT_LOW>;
+			enum-name = "GPIO_EC_CBI_WP";
+		};
+		ec_wp_l {
+			gpios = <&gpiod 7 GPIO_INPUT>;
+			enum-name = "GPIO_WP_L";
+		};
+		pg_lpddr5_s0_od {
+			gpios = <&gpio6 0 GPIO_INPUT>;
+			enum-name = "GPIO_PG_LPDDR5_S0_OD";
+		};
+	};
+
+	def-lvol-io-list {
+		compatible = "nuvoton,npcx-lvolctrl-def";
+
 		/*
-		 * Skyrim reference-board-specific GPIO customizations
-		 * can be made here.
+		 * Low voltage on I2C2_0, I2C6_1, I2C7_0, USB_FAUT_ODL
 		 */
+		lvol-io-pads = <&lvol_io92 &lvol_io91 &lvol_ioe4 &lvol_ioe3
+				&lvol_iob3 &lvol_iob2 &lvol_io50>;
 	};
 };
diff --git a/zephyr/projects/skyrim/usbc_config.c b/zephyr/projects/skyrim/usbc_config.c
index 43484d6751..6e6d429fb2 100644
--- a/zephyr/projects/skyrim/usbc_config.c
+++ b/zephyr/projects/skyrim/usbc_config.c
@@ -624,6 +624,8 @@ void baseboard_a1_retimer_setup(void)
 }
 DECLARE_DEFERRED(baseboard_a1_retimer_setup);
 
+/* TODO: Remove when guybrush is no longer supported */
+#ifdef CONFIG_BOARD_GUYBRUSH
 void board_overcurrent_event(int port, int is_overcurrented)
 {
 	switch (port) {
@@ -636,3 +638,4 @@ void board_overcurrent_event(int port, int is_overcurrented)
 		break;
 	}
 }
+#endif