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| author | Dino Li <Dino.Li@ite.com.tw> | 2020-03-23 13:38:12 +0800 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2020-03-24 15:57:03 +0000 |
| commit | ced7886d72de35f761d4e4e731aaae9efba98b90 (patch) | |
| tree | e5adc05d031201b1f2a482969943914ccf61fdf8 | |
| parent | 5b7ba935f2d192c524be8ec6932e25ee9668d0d6 (diff) | |
| download | chrome-ec-ced7886d72de35f761d4e4e731aaae9efba98b90.tar.gz | |
it8xxx2: wake up CPU if an interrupt is pending in idle task
BUG=b:142029177
BRANCH=none
TEST=In idle task, EC does not get stuck.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Change-Id: I9f3c0e3b58e68d60b1218338603a5f2a4bc5eb5d
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2100055
Reviewed-by: Jett Rink <jettrink@chromium.org>
| -rw-r--r-- | chip/it83xx/clock.c | 12 | ||||
| -rw-r--r-- | chip/it83xx/config_chip_it8xxx2.h | 2 | ||||
| -rw-r--r-- | chip/it83xx/registers.h | 1 | ||||
| -rw-r--r-- | chip/it83xx/system.c | 7 |
4 files changed, 17 insertions, 5 deletions
diff --git a/chip/it83xx/clock.c b/chip/it83xx/clock.c index 7684c48457..b0f3b09d01 100644 --- a/chip/it83xx/clock.c +++ b/chip/it83xx/clock.c @@ -459,11 +459,13 @@ void clock_cpu_standby(void) if (IS_ENABLED(CHIP_CORE_NDS32)) { asm("standby wake_grant"); } else if (IS_ENABLED(CHIP_CORE_RISCV)) { - /* - * TODO(b:142029177): we have to enable interrupts before - * standby instruction on IT8xxx2 series. - */ - interrupt_enable(); + if (!IS_ENABLED(IT83XX_RISCV_WAKEUP_CPU_WITHOUT_INT_ENABLED)) + /* + * we have to enable interrupts before + * standby instruction on IT83202 bx version. + */ + interrupt_enable(); + asm("wfi"); } } diff --git a/chip/it83xx/config_chip_it8xxx2.h b/chip/it83xx/config_chip_it8xxx2.h index ae6388e8c4..fe9914d4aa 100644 --- a/chip/it83xx/config_chip_it8xxx2.h +++ b/chip/it83xx/config_chip_it8xxx2.h @@ -107,6 +107,8 @@ #define IT83XX_GPIO_INT_FLEXIBLE /* Enable detect type-c plug in interrupt. */ #define IT83XX_INTC_PLUG_IN_SUPPORT +/* Wake up CPU from low power mode even if interrupts are disabled */ +#define IT83XX_RISCV_WAKEUP_CPU_WITHOUT_INT_ENABLED /* Chip actually has TCPC physical port count. */ #define IT83XX_USBPD_PHY_PORT_COUNT 2 #else diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 2df14c9441..8eb7d20cb8 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -973,6 +973,7 @@ enum clock_gate_offsets { #define IT83XX_GCTRL_MCCR2 REG8(IT83XX_GCTRL_BASE+0x44) #define IT83XX_GCTRL_SSCR REG8(IT83XX_GCTRL_BASE+0x4A) #define IT83XX_GCTRL_ETWDUARTCR REG8(IT83XX_GCTRL_BASE+0x4B) +#define IT83XX_GCTRL_WMCR REG8(IT83XX_GCTRL_BASE+0x4C) /* bit[0] = 0 or 1 : disable or enable ETWD hardware reset */ #define ETWD_HW_RST_EN BIT(0) #define IT83XX_GCTRL_RVILMCR0 REG8(IT83XX_GCTRL_BASE+0x5D) diff --git a/chip/it83xx/system.c b/chip/it83xx/system.c index 537455d4b9..e56837955c 100644 --- a/chip/it83xx/system.c +++ b/chip/it83xx/system.c @@ -123,6 +123,13 @@ void chip_pre_init(void) if (IS_ENABLED(IT83XX_ETWD_HW_RESET_SUPPORT)) /* System triggers a soft reset by default (command: reboot). */ IT83XX_GCTRL_ETWDUARTCR &= ~ETWD_HW_RST_EN; + + if (IS_ENABLED(IT83XX_RISCV_WAKEUP_CPU_WITHOUT_INT_ENABLED)) + /* + * bit7: wake up CPU if it is in low power mode and + * an interrupt is pending. + */ + IT83XX_GCTRL_WMCR |= BIT(7); } #define BRAM_VALID_MAGIC 0x4252414D /* "BRAM" */ |