tree: Replace asm for disabling interrupts with function

Most of the code is already using interrupt_enable/disable, so this
makes it consistent.

Commands used:

git grep --name-only 'cpsid i' |\
  xargs sed -i 's#asm volatile("cpsid i");#interrupt_disable();#g'
git grep --name-only 'cpsie i' |\
  xargs sed -i 's#asm volatile("cpsie i");#interrupt_enable();#g'
git checkout core/cortex-m/task.c core/cortex-m0/task.c

BRANCH=none
BUG=b:213601206
TEST=make buildall -j

Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Change-Id: Ic9fc4d5adaf7254f7432685dea68611d9d535b9a
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3373621
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>

8 files changed, 17 insertions, 17 deletions

diff --git a/board/zinger/board.c b/board/zinger/board.c
index 38b0227bdf..f1249d6917 100644
--- a/board/zinger/board.c
+++ b/board/zinger/board.c
@@ -38,7 +38,7 @@ static void jump_to_rw(void)
 
 	debug_printf("Jump to RW\n");
 	/* Disable interrupts */
-	asm volatile("cpsid i");
+	interrupt_disable();
 	/* Call RW firmware reset vector */
 	jump_rw_rst();
 }
diff --git a/board/zinger/hardware.c b/board/zinger/hardware.c
index c19e6f0f6b..7e6e1f8f4c 100644
--- a/board/zinger/hardware.c
+++ b/board/zinger/hardware.c
@@ -464,7 +464,7 @@ void flash_physical_permanent_protect(void)
 	/* Set RDP to level 1 to prevent disabling the protection */
 	write_optb(0, 0x11);
 	/* Reset by using OBL_LAUNCH to take changes into account */
-	asm volatile("cpsid i");
+	interrupt_disable();
 	STM32_FLASH_CR |= FLASH_CR_OBL_LAUNCH;
 	/* Spin and wait for reboot; should never return */
 	while (1)
diff --git a/board/zinger/runtime.c b/board/zinger/runtime.c
index 9d27181032..7665e3b55c 100644
--- a/board/zinger/runtime.c
+++ b/board/zinger/runtime.c
@@ -149,7 +149,7 @@ uint32_t task_wait_event(int timeout_us)
 
 	t1.val = get_time().val + timeout_us;
 
-	asm volatile("cpsid i");
+	interrupt_disable();
 	/* the event already happened */
 	if (last_event || !timeout_us) {
 		evt = last_event;
@@ -196,7 +196,7 @@ uint32_t task_wait_event(int timeout_us)
 
 		asm volatile("cpsie i ; isb");
 		/* note: interrupt that woke us up will run here */
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		t0 = get_time();
 		/* check for timeout if timeout was set */
@@ -239,7 +239,7 @@ noreturn
 void __keep cpu_reset(void)
 {
 	/* Disable interrupts */
-	asm volatile("cpsid i");
+	interrupt_disable();
 	/* reboot the CPU */
 	CPU_NVIC_APINT = 0x05fa0004;
 	/* Spin and wait for reboot; should never return */
diff --git a/chip/lm4/clock.c b/chip/lm4/clock.c
index a54a6a88f0..31ace04ce5 100644
--- a/chip/lm4/clock.c
+++ b/chip/lm4/clock.c
@@ -449,7 +449,7 @@ static int command_sleep(int argc, char **argv)
 		void (*rom_clock_set)(uint32_t rcc) = func_table[23];
 
 		/* Disable interrupts. */
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		switch (clock) {
 		case 1: /* 16MHz IOSC */
@@ -486,7 +486,7 @@ static int command_sleep(int argc, char **argv)
 			/* Enable the port. */
 			LM4_UART_CTL(0) |= 0x0001;
 		}
-		asm volatile("cpsie i");
+		interrupt_enable();
 	}
 
 	if (uartfbrd) {
@@ -495,7 +495,7 @@ static int command_sleep(int argc, char **argv)
 	}
 
 	/* Enable interrupts. */
-	asm volatile("cpsid i");
+	interrupt_disable();
 
 	/* gate peripheral clocks */
 	if (level & 1) {
diff --git a/chip/stm32/clock-stm32f0.c b/chip/stm32/clock-stm32f0.c
index 0f63bdd394..d791d63df3 100644
--- a/chip/stm32/clock-stm32f0.c
+++ b/chip/stm32/clock-stm32f0.c
@@ -259,7 +259,7 @@ void __enter_hibernate(uint32_t seconds, uint32_t microseconds)
 		set_rtc_alarm(seconds, microseconds, &rtc, 0);
 
 	/* interrupts off now */
-	asm volatile("cpsid i");
+	interrupt_disable();
 
 #ifdef CONFIG_HIBERNATE_WAKEUP_PINS
 	/* enable the wake up pins */
@@ -298,7 +298,7 @@ void __idle(void)
 	struct rtc_time_reg rtc0, rtc1;
 
 	while (1) {
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		t0 = get_time();
 		next_delay = __hw_clock_event_get() - t0.le.lo;
@@ -376,7 +376,7 @@ void __idle(void)
 #ifdef CONFIG_LOW_POWER_IDLE_LIMITED
 en_int:
 #endif
-		asm volatile("cpsie i");
+		interrupt_enable();
 	}
 }
 #endif /* CONFIG_LOW_POWER_IDLE */
diff --git a/chip/stm32/clock-stm32f4.c b/chip/stm32/clock-stm32f4.c
index d6427fffc7..83a7b0a84e 100644
--- a/chip/stm32/clock-stm32f4.c
+++ b/chip/stm32/clock-stm32f4.c
@@ -462,7 +462,7 @@ void __idle(void)
 	struct rtc_time_reg rtc0, rtc1;
 
 	while (1) {
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		t0 = get_time();
 		next_delay = __hw_clock_event_get() - t0.le.lo;
@@ -537,7 +537,7 @@ void __idle(void)
 			/* Normal idle : only CPU clock stopped */
 			asm("wfi");
 		}
-		asm volatile("cpsie i");
+		interrupt_enable();
 	}
 }
 
diff --git a/chip/stm32/clock-stm32h7.c b/chip/stm32/clock-stm32h7.c
index 696105b4f1..ae60d596f1 100644
--- a/chip/stm32/clock-stm32h7.c
+++ b/chip/stm32/clock-stm32h7.c
@@ -471,7 +471,7 @@ void __idle(void)
 	uint16_t lptim0;
 
 	while (1) {
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		t0 = get_time();
 		next_delay = __hw_clock_event_get() - t0.le.lo;
@@ -538,7 +538,7 @@ void __idle(void)
 			/* normal idle : only CPU clock stopped */
 			asm("wfi");
 		}
-		asm volatile("cpsie i");
+		interrupt_enable();
 	}
 }
 
diff --git a/chip/stm32/clock-stm32l4.c b/chip/stm32/clock-stm32l4.c
index b07b5fb2d4..730f5d6bb9 100644
--- a/chip/stm32/clock-stm32l4.c
+++ b/chip/stm32/clock-stm32l4.c
@@ -1039,7 +1039,7 @@ void __idle(void)
 	struct rtc_time_reg rtc0, rtc1;
 
 	while (1) {
-		asm volatile("cpsid i");
+		interrupt_disable();
 
 		t0 = get_time();
 		next_delay = __hw_clock_event_get() - t0.le.lo;
@@ -1103,7 +1103,7 @@ void __idle(void)
 			/* Normal idle : only CPU clock stopped */
 			asm("wfi");
 		}
-		asm volatile("cpsie i");
+		interrupt_enable();
 	}
 }