summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorDouglas Anderson <dianders@chromium.org>2021-12-16 16:17:38 -0800
committerCommit Bot <commit-bot@chromium.org>2022-01-18 22:08:50 +0000
commit60afc59dcb156eb64efab40eae005b60b663e197 (patch)
treee7d5feae477009241cd2f60f09beb2d32a2b5b54
parentf2d37deda42d023574fbf4778aa7c578f91129d8 (diff)
downloadchrome-ec-60afc59dcb156eb64efab40eae005b60b663e197.tar.gz
flash_fp_mcu: Update for herobrine-rev1
herobrine-rev1 has things hooked up totally differently than -rev0. We don't really care about -rev0 anymore and we can't autodetect the SPI bus because of b/179533783, so this will effectively kill -rev0 support in this script, but nobody should mind. BRANCH=None BUG=None TEST=flash_fp_mcu on Herobrine -rev1 Change-Id: Id71ae1010566075fe310d86a1e34a59a889f1658 Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3344724 Reviewed-by: Stephen Boyd <swboyd@chromium.org> Commit-Queue: Stephen Boyd <swboyd@chromium.org>
-rw-r--r--util/flash_fp_mcu24
1 files changed, 16 insertions, 8 deletions
diff --git a/util/flash_fp_mcu b/util/flash_fp_mcu
index d39feedeec..426e824180 100644
--- a/util/flash_fp_mcu
+++ b/util/flash_fp_mcu
@@ -494,17 +494,25 @@ config_hatch() {
config_herobrine() {
readonly TRANSPORT="SPI"
- readonly DEVICE="/dev/spidev11.0"
+ readonly DEVICE="/dev/spidev9.0"
# TODO(b/179533783): Fix this script to look for non-ACPI modalias
- readonly DEVICEID="spi11.0"
+ readonly DEVICEID="spi9.0"
+
+ local dev_path="*/platform/soc@0/f100000.pinctrl/gpio/*"
+ local gpiobase
+ if ! gpiobase=$(get_sysfs_gpiochip_base "${dev_path}"); then
+ echo "Unable to find gpio chip base"
+ return "${EXIT_PRECONDITION}"
+ fi
+
+ readonly GPIO_CHIP="gpiochip${gpiobase}"
+ # FPMCU RST_ODL is $(gpiofind FP_RST_L) is gpiochip0 22
+ readonly GPIO_NRST=$((${gpiobase} + $(gpiofind FP_RST_L|cut -f2 -d" ")))
+ # FPMCU BOOT0 is $(gpiofind FPMCU_BOOT0) is gpiochip0 10
+ readonly GPIO_BOOT0=$((${gpiobase} + $(gpiofind FPMCU_BOOT0|cut -f2 -d" ")))
- readonly GPIO_CHIP="gpiochip336"
- # FPMCU RST_ODL is $(gpiofind FP_RST_L) is gpiochip0 78
- readonly GPIO_NRST=$((336 + $(gpiofind FP_RST_L|cut -f2 -d" ")))
- # FPMCU BOOT0 is $(gpiofind FPMCU_BOOT0) is gpiochip0 77
- readonly GPIO_BOOT0=$((336 + $(gpiofind FPMCU_BOOT0|cut -f2 -d" ")))
# EN FP RAILS is $(gpiofind EN_FP_RAILS) is gpiochip0 42
- readonly GPIO_PWREN=$((336 + $(gpiofind EN_FP_RAILS|cut -f2 -d" ")))
+ readonly GPIO_PWREN=$((${gpiobase} + $(gpiofind EN_FP_RAILS|cut -f2 -d" ")))
}
config_nami() {