Fix compilation with coreboot-sdk

Signed-off-by: Stefan Reinauer <reinauer@google.com>
BRANCH=none
BUG=none
TEST=The following sequence passes
	sudo emerge coreboot-sdk
	export CROSS_COMPILE_arm=/opt/coreboot-sdk/bin/arm-eabi-
	export CROSS_COMPILE_i386=/opt/coreboot-sdk/bin/i386-elf-
	export CROSS_COMPILE_nds=/opt/coreboot-sdk/bin/nds32le-elf-
	make buildall -j

Change-Id: I4cafbcd70efd6bdf102f848f1cca4772b4ccd10e
Reviewed-on: https://chromium-review.googlesource.com/595207
Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
Tested-by: Stefan Reinauer <reinauer@chromium.org>
Reviewed-by: Nick Sanders <nsanders@chromium.org>

6 files changed, 10 insertions, 18 deletions

diff --git a/board/servo_micro/board.c b/board/servo_micro/board.c
index 71b780917d..644d8ce293 100644
--- a/board/servo_micro/board.c
+++ b/board/servo_micro/board.c
@@ -130,7 +130,7 @@ USB_STREAM_CONFIG_USART_IFACE(usart4_usb,
  */
 static int command_uart_parity(int argc, char **argv)
 {
-	int parity, newparity;
+	int parity = 0, newparity;
 	struct usart_config const *usart;
 	char *e;
 
diff --git a/chip/g/dcrypto/x509.c b/chip/g/dcrypto/x509.c
index 77a996eb67..b733f91b5e 100644
--- a/chip/g/dcrypto/x509.c
+++ b/chip/g/dcrypto/x509.c
@@ -58,7 +58,6 @@ static const uint8_t OID_SHA256_WITH_RSA_ENCRYPTION[13] = {
 	0x01, 0x01, 0x0b, 0x05, 0x00
 };
 static const uint8_t OID_commonName[3] = {0x55, 0x04, 0x03};
-static const uint8_t OID_orgName[3] = {0x55, 0x04, 0x0a};
 static const uint8_t OID_ecdsa_with_SHA256[8] = {0x2A, 0x86, 0x48, 0xCE,
 						 0x3D, 0x04, 0x03, 0x02};
 static const uint8_t OID_id_ecPublicKey[7] = {0x2A, 0x86, 0x48, 0xCE, 0x3D,
diff --git a/chip/stm32/i2c-stm32f4.c b/chip/stm32/i2c-stm32f4.c
index 7c9414e444..d9c331237c 100644
--- a/chip/stm32/i2c-stm32f4.c
+++ b/chip/stm32/i2c-stm32f4.c
@@ -43,8 +43,7 @@
  */
 #define STM32F4_FMPI2C_PORT	3
 
-
-static const struct dma_option dma_tx_option[I2C_PORT_COUNT] = {
+static const __unused struct dma_option dma_tx_option[I2C_PORT_COUNT] = {
 	{STM32_DMAC_I2C1_TX, (void *)&STM32_I2C_DR(STM32_I2C1_PORT),
 	 STM32_DMA_CCR_MSIZE_8_BIT | STM32_DMA_CCR_PSIZE_8_BIT |
 	 STM32_DMA_CCR_CHANNEL(STM32_I2C1_TX_REQ_CH)},
diff --git a/chip/stm32/usb_dwc.c b/chip/stm32/usb_dwc.c
index 4d5a1db506..6c504b2ae9 100644
--- a/chip/stm32/usb_dwc.c
+++ b/chip/stm32/usb_dwc.c
@@ -96,19 +96,6 @@ const struct usb_config_descriptor USB_CONF_DESC(conf) = {
 	.bMaxPower = (CONFIG_USB_MAXPOWER_MA / 2),
 };
 
-/* Qualifier Descriptor */
-static const struct usb_qualifier_descriptor qualifier_desc = {
-	.bLength = USB_DT_QUALIFIER_SIZE,
-	.bDescriptorType = USB_DT_DEVICE_QUALIFIER,
-	.bcdUSB = USB_DEV_BCDUSB,
-	.bDeviceClass  = USB_DEV_CLASS,
-	.bDeviceSubClass = 0x00,
-	.bDeviceProtocol = 0x00,
-	.bMaxPacketSize0 = USB_MAX_PACKET_SIZE,
-	.bNumConfigurations = 1,
-	.bReserved = 0,
-};
-
 const uint8_t usb_string_desc[] = {
 	4,					/* Descriptor size */
 	USB_DT_STRING,
diff --git a/common/usb_pd_protocol.c b/common/usb_pd_protocol.c
index 054ea56d8f..80ae429d52 100644
--- a/common/usb_pd_protocol.c
+++ b/common/usb_pd_protocol.c
@@ -3891,7 +3891,7 @@ static int pd_control(struct host_cmd_handler_args *args)
 {
 	static int pd_control_disabled;
 	const struct ec_params_pd_control *cmd = args->params;
-	int enable;
+	int enable = 0;
 
 	if (cmd->chip >= CONFIG_USB_PD_PORT_COUNT)
 		return EC_RES_INVALID_PARAM;
diff --git a/include/common.h b/include/common.h
index a98fce3ca2..6f6b964c5f 100644
--- a/include/common.h
+++ b/include/common.h
@@ -59,6 +59,13 @@
 #endif
 
 /*
+ * Define __unused in the same manner.
+ */
+#ifndef __unused
+#define __unused __attribute__((unused))
+#endif
+
+/*
  * Force the toolchain to keep a symbol even with Link Time Optimization
  * activated.
  *