flash_fp_mcu: add option (-r) to read from FPMCU

This is useful for debugging and will also be used in the automated
tests to validate RDP1.

BRANCH=nocturne,nami
BUG=chromium:890059
TEST=dut-control fw_wp_state:force_off
     flash_fp_mcu /opt/google/biod/fw/nocturne_fp_v2.2.110-b936c0a3c.bin
     ectool --name=cros_fp version
     flash_fp_mcu -r rb.bin
     diff rb.in /opt/google/biod/fw/nocturne_fp_v2.2.110-b936c0a3c.bin
CQ-DEPEND=Iaf56d202828d58e855e567d3cd859f02a1996e09

Change-Id: Ieeb60e97df72093bec01b240782b902d8d0674d6
Signed-off-by: Tom Hughes <tomhughes@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1443857
Reviewed-by: Nicolas Norvez <norvez@chromium.org>

3 files changed, 138 insertions, 136 deletions

diff --git a/board/nami_fp/flash_fp_mcu b/board/nami_fp/flash_fp_mcu
index e7adeb017e..8beff69460 100755
--- a/board/nami_fp/flash_fp_mcu
+++ b/board/nami_fp/flash_fp_mcu
@@ -3,86 +3,33 @@
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
+. /usr/share/flash_fp_mcu/flash_fp_mcu_common.sh
+
 # Kabylake PCH GPIOs
-KBL_GPIOCHIP="gpiochip360"
+readonly KBL_GPIOCHIP="gpiochip360"
 
 if [[ -e "/sys/class/gpio/${KBL_GPIOCHIP}" ]]; then
   # Ekko configuration
   echo "NOTE: For use with updating FP MCU on NAMI boards only"
-  SPIDEV="/dev/spidev32765.0"
+  readonly SPIDEV="/dev/spidev32765.0"
   # GSPI1 ACPI device for FP MCU
-  SPIID="spi-PRP0001:02"
+  readonly SPIID="spi-PRP0001:02"
   # FPMCU RST_ODL is on GPP_C9 = 360 + 57 = 417
-  GPIO_NRST=417
+  readonly GPIO_NRST=417
   # FPMCU BOOT0 is on GPP_D5 = 360 + 77 = 437
-  GPIO_BOOT0=437
+  readonly GPIO_BOOT0=437
   # FP_PWR_EN is on GPP_B11 = 360 + 35 = 395
-  GPIO_PWREN=395
+  readonly GPIO_PWREN=395
 else
   echo "Cannot find a known GPIO chip."
   exit 1
 fi
 
-if [[ ! -f "$1" ]]; then
-  echo "Invalid image file: $1"
-  echo "Usage: $0 ec.bin"
-  exit 1
-fi
-
-if ectool gpioget EC_WP_L | grep -q '= 0'; then
-  echo "Please make sure WP is deasserted."
-  exit 1
-fi
-
-# Ensure the ACPI is not cutting power when unloading cros-ec-spi
-echo ${GPIO_PWREN} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_PWREN}/direction
-echo 1 > /sys/class/gpio/gpio${GPIO_PWREN}/value
-
-# Remove cros_fp if present
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/unbind
-
-# Configure the MCU Boot0 and NRST GPIOs
-echo ${GPIO_BOOT0} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_BOOT0}/direction
-echo ${GPIO_NRST} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-
-# Reset sequence to enter bootloader mode
-echo 1 > /sys/class/gpio/gpio${GPIO_BOOT0}/value
-echo 0 > /sys/class/gpio/gpio${GPIO_NRST}/value
-sleep 0.001
-
-# load spidev (fail on cros-ec-spi first to change modalias)
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/bind 2>/dev/null
-echo "${SPIID}" > /sys/bus/spi/drivers/spidev/bind
-
-# Release reset as the SPI bus is now ready
-echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value
-echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-
-stm32mon -U -u -p -s ${SPIDEV} -e -w $1
-
-# unload spidev
-echo "${SPIID}" > /sys/bus/spi/drivers/spidev/unbind
-
-# Go back to normal mode
-echo "out" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-echo 0 > /sys/class/gpio/gpio${GPIO_BOOT0}/value
-echo 0 > /sys/class/gpio/gpio${GPIO_NRST}/value
-echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value
-
-# Give up GPIO control
-echo "in" > /sys/class/gpio/gpio${GPIO_BOOT0}/direction
-echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-echo ${GPIO_BOOT0} > /sys/class/gpio/unexport
-echo ${GPIO_NRST} > /sys/class/gpio/unexport
+flash_fp_mcu_stm32 \
+  "${SPIDEV}"      \
+  "${SPIID}"       \
+  "${GPIO_NRST}"   \
+  "${GPIO_BOOT0}"  \
+  "${GPIO_PWREN}"  \
+  "${1}"
 
-# wait for FP MCU to come back up (including RWSIG delay)
-sleep 2
-# Put back cros_fp driver
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/bind
-# Kernel driver is back, we are no longer controlling power
-echo ${GPIO_PWREN} > /sys/class/gpio/unexport
-# Test it
-ectool --name=cros_fp version
diff --git a/board/nocturne_fp/flash_fp_mcu b/board/nocturne_fp/flash_fp_mcu
index 09a364bc65..f531e399df 100755
--- a/board/nocturne_fp/flash_fp_mcu
+++ b/board/nocturne_fp/flash_fp_mcu
@@ -3,86 +3,33 @@
 # Use of this source code is governed by a BSD-style license that can be
 # found in the LICENSE file.
 
+. /usr/share/flash_fp_mcu/flash_fp_mcu_common.sh
+
 # Kabylake PCH GPIOs
-KBL_GPIOCHIP="gpiochip360"
+readonly KBL_GPIOCHIP="gpiochip360"
 
 if [[ -e "/sys/class/gpio/${KBL_GPIOCHIP}" ]]; then
   # Nocturne configuration
 
-  SPIDEV="/dev/spidev32765.0"
+  readonly SPIDEV="/dev/spidev32765.0"
   # GSPI1 ACPI device for FP MCU
-  SPIID="spi-PRP0001:02"
+  readonly SPIID="spi-PRP0001:02"
   # FPMCU RST_ODL is on GPP_C10 = 360 + 58 = 418
-  GPIO_NRST=418
+  readonly GPIO_NRST=418
   # FPMCU BOOT0 is on GPP_C8 = 360 + 56 = 416
-  GPIO_BOOT0=416
+  readonly GPIO_BOOT0=416
   # FP_PWR_EN is on GPP_A11 = 360 + 11 = 371
-  GPIO_PWREN=371
+  readonly GPIO_PWREN=371
 else
   echo "Cannot find a known GPIO chip."
   exit 1
 fi
 
-if [[ ! -f "$1" ]]; then
-  echo "Invalid image file: $1"
-  echo "Usage: $0 ec.bin"
-  exit 1
-fi
-
-if ectool gpioget EC_WP_L | grep -q '= 0'; then
-  echo "Please make sure WP is deasserted."
-  exit 1
-fi
-
-# Ensure the ACPI is not cutting power when unloading cros-ec-spi
-echo ${GPIO_PWREN} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_PWREN}/direction
-echo 1 > /sys/class/gpio/gpio${GPIO_PWREN}/value
-
-# Remove cros_fp if present
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/unbind
-
-# Configure the MCU Boot0 and NRST GPIOs
-echo ${GPIO_BOOT0} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_BOOT0}/direction
-echo ${GPIO_NRST} > /sys/class/gpio/export
-echo "out" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-
-# Reset sequence to enter bootloader mode
-echo 1 > /sys/class/gpio/gpio${GPIO_BOOT0}/value
-echo 0 > /sys/class/gpio/gpio${GPIO_NRST}/value
-sleep 0.001
-
-# load spidev (fail on cros-ec-spi first to change modalias)
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/bind 2>/dev/null
-echo "${SPIID}" > /sys/bus/spi/drivers/spidev/bind
-
-# Release reset as the SPI bus is now ready
-echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value
-echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-
-stm32mon -U -u -p -s ${SPIDEV} -e -w $1
-
-# unload spidev
-echo "${SPIID}" > /sys/bus/spi/drivers/spidev/unbind
-
-# Go back to normal mode
-echo "out" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-echo 0 > /sys/class/gpio/gpio${GPIO_BOOT0}/value
-echo 0 > /sys/class/gpio/gpio${GPIO_NRST}/value
-echo 1 > /sys/class/gpio/gpio${GPIO_NRST}/value
-
-# Give up GPIO control
-echo "in" > /sys/class/gpio/gpio${GPIO_BOOT0}/direction
-echo "in" > /sys/class/gpio/gpio${GPIO_NRST}/direction
-echo ${GPIO_BOOT0} > /sys/class/gpio/unexport
-echo ${GPIO_NRST} > /sys/class/gpio/unexport
+flash_fp_mcu_stm32 \
+  "${SPIDEV}"      \
+  "${SPIID}"       \
+  "${GPIO_NRST}"   \
+  "${GPIO_BOOT0}"  \
+  "${GPIO_PWREN}"  \
+  "${1}"
 
-# wait for FP MCU to come back up (including RWSIG delay)
-sleep 2
-# Put back cros_fp driver
-echo "${SPIID}" > /sys/bus/spi/drivers/cros-ec-spi/bind
-# Kernel driver is back, we are no longer controlling power
-echo ${GPIO_PWREN} > /sys/class/gpio/unexport
-# Test it
-ectool --name=cros_fp version
diff --git a/util/flash_fp_mcu_common.sh b/util/flash_fp_mcu_common.sh
new file mode 100644
index 0000000000..e0e8ff3b50
--- /dev/null
+++ b/util/flash_fp_mcu_common.sh
@@ -0,0 +1,108 @@
+#!/bin/bash
+# Copyright 2019 The Chromium OS Authors. All rights reserved.
+# Use of this source code is governed by a BSD-style license that can be
+# found in the LICENSE file.
+
+. /usr/share/misc/shflags
+
+DEFINE_boolean 'read' "${FLAGS_FALSE}" 'Read instead of write' 'r'
+FLAGS_HELP="Usage: ${0} [flags] ec.bin"
+
+# Process commandline flags
+FLAGS "${@}" || exit 1
+eval set -- "${FLAGS_ARGV}"
+
+if [[ "$#" -eq 0 ]]; then
+  echo "Missing filename"
+  flags_help
+  exit 1
+fi
+
+check_hardware_write_protect_disabled() {
+  if ectool gpioget EC_WP_L | grep -q '= 0'; then
+    echo "Please make sure WP is deasserted."
+    exit 1
+  fi
+}
+
+flash_fp_mcu_stm32() {
+  local spidev="${1}"
+  local spiid="${2}"
+  local gpio_nrst="${3}"
+  local gpio_boot0="${4}"
+  local gpio_pwren="${5}"
+  local file="${6}"
+
+  local STM32MON_READ_FLAGS=" -U -u -p -s ${spidev} -r"
+  local STM32MON_WRITE_FLAGS="-U -u -p -s ${spidev} -e -w"
+  local stm32mon_flags=""
+
+  if [[ "${FLAGS_read}" -eq "${FLAGS_TRUE}" ]]; then
+    if [[ -e "${file}" ]]; then
+      echo "Output file already exists: ${file}"
+      exit 1
+    fi
+    stm32mon_flags="${STM32MON_READ_FLAGS}"
+  else
+    if [[ ! -f "${file}" ]]; then
+      echo "Invalid image file: ${file}"
+      exit 1
+    fi
+    stm32mon_flags="${STM32MON_WRITE_FLAGS}"
+  fi
+
+  check_hardware_write_protect_disabled
+
+  # Ensure the ACPI is not cutting power when unloading cros-ec-spi
+  echo "${gpio_pwren}" > /sys/class/gpio/export
+  echo "out" > "/sys/class/gpio/gpio${gpio_pwren}/direction"
+  echo 1 > "/sys/class/gpio/gpio${gpio_pwren}/value"
+
+  # Remove cros_fp if present
+  echo "${spiid}" > /sys/bus/spi/drivers/cros-ec-spi/unbind
+
+  # Configure the MCU Boot0 and NRST GPIOs
+  echo "${gpio_boot0}" > /sys/class/gpio/export
+  echo "out" > "/sys/class/gpio/gpio${gpio_boot0}/direction"
+  echo "${gpio_nrst}" > /sys/class/gpio/export
+  echo "out" > "/sys/class/gpio/gpio${gpio_nrst}/direction"
+
+  # Reset sequence to enter bootloader mode
+  echo 1 > "/sys/class/gpio/gpio${gpio_boot0}/value"
+  echo 0 > "/sys/class/gpio/gpio${gpio_nrst}/value"
+  sleep 0.001
+
+  # load spidev (fail on cros-ec-spi first to change modalias)
+  echo "${spiid}" > /sys/bus/spi/drivers/cros-ec-spi/bind 2>/dev/null
+  echo "${spiid}" > /sys/bus/spi/drivers/spidev/bind
+
+  # Release reset as the SPI bus is now ready
+  echo 1 > "/sys/class/gpio/gpio${gpio_nrst}/value"
+  echo "in" > "/sys/class/gpio/gpio${gpio_nrst}/direction"
+
+  stm32mon ${stm32mon_flags} "${file}"
+
+  # unload spidev
+  echo "${spiid}" > /sys/bus/spi/drivers/spidev/unbind
+
+  # Go back to normal mode
+  echo "out" > "/sys/class/gpio/gpio${gpio_nrst}/direction"
+  echo 0 > "/sys/class/gpio/gpio${gpio_boot0}/value"
+  echo 0 > "/sys/class/gpio/gpio${gpio_nrst}/value"
+  echo 1 > "/sys/class/gpio/gpio${gpio_nrst}/value"
+
+  # Give up GPIO control
+  echo "in" > "/sys/class/gpio/gpio${gpio_boot0}/direction"
+  echo "in" > "/sys/class/gpio/gpio${gpio_nrst}/direction"
+  echo "${gpio_boot0}" > /sys/class/gpio/unexport
+  echo "${gpio_nrst}" > /sys/class/gpio/unexport
+
+  # wait for FP MCU to come back up (including RWSIG delay)
+  sleep 2
+  # Put back cros_fp driver
+  echo "${spiid}" > /sys/bus/spi/drivers/cros-ec-spi/bind
+  # Kernel driver is back, we are no longer controlling power
+  echo "${gpio_pwren}" > /sys/class/gpio/unexport
+  # Test it
+  ectool --name=cros_fp version
+}