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authorPatryk Duda <pdk@semihalf.com>2022-01-17 20:20:52 +0100
committerCommit Bot <commit-bot@chromium.org>2022-01-19 17:57:54 +0000
commit8bf27ea4b8c4ffc245f227e9a94d756f9d32649f (patch)
tree1da4a24d63a43096ab8a6861d09b2db299eebb21
parent8e2f1ed611679ae42779748596e5f6482bd9f6b6 (diff)
downloadchrome-ec-8bf27ea4b8c4ffc245f227e9a94d756f9d32649f.tar.gz
stm32/hwtimer32: Check if interrupts are disabled when setting timestamp
CL:3347658 introduces disabling interrupts when setting new timestamp to the timer. To make sure that __hw_clock_source_set() won't be used with enabled interrupts let's add ASSERT which will check that. This patch also adds explaination, why clearing all status bits in the timer is correct. BUG=b:200828093 BRANCH=none TEST=Compile EC with CONFIG_CMD_FORCETIME enabled. Use 'forcetime' command to set time, then use 'timerinfo' to check if correct time is set. Signed-off-by: Patryk Duda <pdk@semihalf.com> Change-Id: I2945edbe71e4e9991b4e8eaa462d8c1d08a22d23 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3395878 Reviewed-by: Tom Hughes <tomhughes@chromium.org>
-rw-r--r--chip/stm32/hwtimer32.c20
1 files changed, 15 insertions, 5 deletions
diff --git a/chip/stm32/hwtimer32.c b/chip/stm32/hwtimer32.c
index aeaa0c9ad1..f4c1fe598f 100644
--- a/chip/stm32/hwtimer32.c
+++ b/chip/stm32/hwtimer32.c
@@ -46,6 +46,8 @@ uint32_t __hw_clock_source_read(void)
void __hw_clock_source_set(uint32_t ts)
{
+ ASSERT(!is_interrupt_enabled());
+
/*
* Stop counter to avoid race between setting counter value
* and clearing status.
@@ -55,7 +57,16 @@ void __hw_clock_source_set(uint32_t ts)
/* Set counter value */
STM32_TIM32_CNT(TIM_CLOCK32) = ts;
- /* Clear status */
+ /*
+ * Clear status. We may clear information other than timer overflow
+ * (eg. event timestamp was matched) but:
+ * - Bits other than overflow are unused (see __hw_clock_source_irq())
+ * - After setting timestamp software will trigger timer interrupt using
+ * task_trigger_irq() (see force_time() in common/timer.c).
+ * process_timers() is called from timer interrupt, so if "match" bit
+ * was present in status (think: some task timers are expired)
+ * process_timers() will handle that correctly.
+ */
STM32_TIM_SR(TIM_CLOCK32) = 0;
/* Start counting */
@@ -239,13 +250,12 @@ int __hw_clock_source_init(uint32_t start_t)
/* Set up the overflow interrupt */
STM32_TIM_DIER(TIM_CLOCK32) = 0x0001;
+ /* Override the count with the start value */
+ STM32_TIM32_CNT(TIM_CLOCK32) = start_t;
+
/* Start counting */
STM32_TIM_CR1(TIM_CLOCK32) |= 1;
- /* Override the count with the start value now that counting has
- * started. */
- __hw_clock_source_set(start_t);
-
/* Enable timer interrupts */
task_enable_irq(IRQ_TIM(TIM_CLOCK32));