zephyr: kingler: configure USBC

This CL configures USB-C and charger drivers:
 - TCPC C0: RT1718S, C1: ANX3447
 - PPC  C0/C1: NX20P3483
 - Charger ISL9238C
 - ChargeManager

BUG=b:203739613
TEST=Battery can be charged. C0/C1 can act as SNK and SRC.
BRANCH=none

Change-Id: I83c87c0059fbe3d9880fdd2a9d214782cfa12a31
Signed-off-by: Eric Yilun Lin <yllin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3306759
Reviewed-by: Ting Shen <phoenixshen@chromium.org>
Commit-Queue: Eric Yilun Lin <yllin@google.com>
Tested-by: Eric Yilun Lin <yllin@google.com>

9 files changed, 441 insertions, 14 deletions

diff --git a/zephyr/projects/corsola/CMakeLists.txt b/zephyr/projects/corsola/CMakeLists.txt
index 3e9cac9f83..1f905a7445 100644
--- a/zephyr/projects/corsola/CMakeLists.txt
+++ b/zephyr/projects/corsola/CMakeLists.txt
@@ -31,5 +31,9 @@ if(DEFINED CONFIG_BOARD_KRABBY)
 				     "src/krabby/usbc_config.c")
 elseif(DEFINED CONFIG_BOARD_KINGLER)
 	project(kingler)
+	zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC
+				     "src/kingler/usb_pd_policy.c")
+	zephyr_library_sources_ifdef(CONFIG_PLATFORM_EC_USBC
+				     "src/kingler/usbc_config.c")
 endif()
 
diff --git a/zephyr/projects/corsola/include/baseboard_usbc_config.h b/zephyr/projects/corsola/include/baseboard_usbc_config.h
index 8fa0ff5cd6..60f61e72f3 100644
--- a/zephyr/projects/corsola/include/baseboard_usbc_config.h
+++ b/zephyr/projects/corsola/include/baseboard_usbc_config.h
@@ -10,6 +10,22 @@
 
 #include "gpio.h"
 
+void bc12_interrupt(enum gpio_signal signal);
 void ppc_interrupt(enum gpio_signal signal);
+void tcpc_alert_event(enum gpio_signal signal);
+
+/* USB-A ports */
+enum usba_port {
+	USBA_PORT_A0 = 0,
+	USBA_PORT_COUNT
+};
+
+/* USB-C ports */
+enum usbc_port {
+	USBC_PORT_C0 = 0,
+	USBC_PORT_C1,
+	USBC_PORT_COUNT
+};
+BUILD_ASSERT(USBC_PORT_COUNT == CONFIG_USB_PD_PORT_MAX_COUNT);
 
 #endif /* __CROS_EC_BASEBOARD_USBC_CONFIG_H */
diff --git a/zephyr/projects/corsola/include/gpio_map.h b/zephyr/projects/corsola/include/gpio_map.h
index ca26199b35..a07d30c970 100644
--- a/zephyr/projects/corsola/include/gpio_map.h
+++ b/zephyr/projects/corsola/include/gpio_map.h
@@ -41,9 +41,21 @@
 	#define AP_SPI_INT()        GPIO_INT(GPIO_SPI0_CS,                     \
 					     GPIO_INT_EDGE_BOTH,               \
 					     spi_event)
+	#define TCPC_C0_INT()
+	#define TCPC_C1_INT()
+	#define PPC_C0_INT()
 #elif defined(CONFIG_SOC_NPCX9M3F)
 	/* The interrupt is configured by dts */
 	#define AP_SPI_INT()
+	#define TCPC_C0_INT()       GPIO_INT(GPIO_USB_C0_TCPC_INT_ODL,         \
+					     GPIO_INT_EDGE_FALLING,            \
+					     tcpc_alert_event)
+	#define TCPC_C1_INT()       GPIO_INT(GPIO_USB_C1_TCPC_INT_ODL,         \
+					     GPIO_INT_EDGE_FALLING,            \
+					     tcpc_alert_event)
+	#define PPC_C0_INT()        GPIO_INT(GPIO_USB_C0_PPC_INT_ODL,          \
+					     GPIO_INT_EDGE_FALLING,            \
+					     ppc_interrupt)
 #endif
 
 #ifdef CONFIG_PLATFORM_EC_TABLET_MODE
@@ -137,6 +149,12 @@
 	#define BASE_IMU_INT()
 #endif
 
+#ifdef CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S
+#define GPIO_EN_USB_C1_SINK         RT1718S_GPIO1
+#define GPIO_EN_USB_C1_SOURCE       RT1718S_GPIO2
+#define GPIO_EN_USB_C1_FRS          RT1718S_GPIO3
+#endif
+
 /*
  * Set EC_CROS_GPIO_INTERRUPTS to a space-separated list of GPIO_INT items.
  *
@@ -168,6 +186,9 @@
 	EXTPWR_INT()							\
 	SWITCH_INT()							\
 	AP_SPI_INT()							\
+	TCPC_C0_INT()							\
+	TCPC_C1_INT()							\
+	PPC_C0_INT()							\
 	X_EC_GPIO2_INT()
 
 #endif /* __ZEPHYR_GPIO_MAP_H */
diff --git a/zephyr/projects/corsola/prj_kingler.conf b/zephyr/projects/corsola/prj_kingler.conf
index 290e2a6d9e..48bd1338a1 100644
--- a/zephyr/projects/corsola/prj_kingler.conf
+++ b/zephyr/projects/corsola/prj_kingler.conf
@@ -30,10 +30,28 @@ CONFIG_PLATFORM_EC_VBOOT_EFS2=n
 CONFIG_ADC=y
 CONFIG_PLATFORM_EC_ADC=y
 
+# Battery
+CONFIG_PLATFORM_EC_BATTERY=y
+CONFIG_PLATFORM_EC_BATTERY_CUT_OFF=y
+CONFIG_PLATFORM_EC_BATTERY_SMART=y
+CONFIG_PLATFORM_EC_BATTERY_FUEL_GAUGE=y
+CONFIG_PLATFORM_EC_BATTERY_PRESENT_GPIO=y
+
 # CBI
 CONFIG_PLATFORM_EC_CBI_EEPROM=y
 CONFIG_PLATFORM_EC_BOARD_VERSION_CBI=y
 
+# Charger
+CONFIG_PLATFORM_EC_CHARGER=y
+CONFIG_PLATFORM_EC_CHARGER_ISL9238C=y
+CONFIG_PLATFORM_EC_CHARGER_PSYS=y
+CONFIG_PLATFORM_EC_CHARGER_PSYS_READ=y
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR=10
+CONFIG_PLATFORM_EC_CHARGER_SENSE_RESISTOR_AC=20
+CONFIG_PLATFORM_EC_CHARGE_MANAGER=y
+CONFIG_PLATFORM_EC_CONSOLE_CMD_CHARGER_ADC_AMON_BMON=y
+CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
+
 # Host command
 CONFIG_PLATFORM_EC_HOSTCMD=y
 
@@ -41,6 +59,9 @@ CONFIG_PLATFORM_EC_HOSTCMD=y
 CONFIG_I2C=y
 CONFIG_PLATFORM_EC_I2C=y
 
+# Math
+CONFIG_PLATFORM_EC_MATH_UTIL=y
+
 # Power sequencing
 CONFIG_AP=y
 CONFIG_AP_ARM_MTK_MT8186=y
@@ -60,6 +81,28 @@ CONFIG_PLATFORM_EC_VOLUME_BUTTONS=y
 # Sensors
 CONFIG_PLATFORM_EC_LID_SWITCH=y
 
+# USBA
+CONFIG_PLATFORM_EC_USB_A_PORT_COUNT=1
+
+# USBC
+CONFIG_PLATFORM_EC_USBC=y
+CONFIG_PLATFORM_EC_USBC_PPC=y
+CONFIG_PLATFORM_EC_USBC_PPC_NX20P3483=y
+CONFIG_PLATFORM_EC_USBC_PPC_RT1718S=y
+CONFIG_PLATFORM_EC_USB_PD_DISCHARGE_PPC=y
+CONFIG_PLATFORM_EC_USB_PD_FRS=y
+CONFIG_PLATFORM_EC_USB_PD_FRS_TCPC=y
+CONFIG_PLATFORM_EC_USB_PD_LOGGING=y
+CONFIG_PLATFORM_EC_USB_PD_DEBUG_LEVEL=3
+CONFIG_PLATFORM_EC_USB_PD_DEBUG_FIXED_LEVEL=y
+CONFIG_PLATFORM_EC_USB_PD_PORT_MAX_COUNT=2
+CONFIG_PLATFORM_EC_USB_PD_TCPM_ANX7447=y
+CONFIG_PLATFORM_EC_USB_PD_TCPM_RT1718S=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_DETECT_TCPC=y
+CONFIG_PLATFORM_EC_USB_PD_VBUS_MEASURE_NOT_PRESENT=y
+# TODO(b:214325274): assign a USB PID
+CONFIG_PLATFORM_EC_USB_PID=0x5566
+
 # External power
 CONFIG_PLATFORM_EC_BACKLIGHT_LID=n
 CONFIG_PLATFORM_EC_EXTPOWER_GPIO=y
@@ -70,7 +113,4 @@ CONFIG_CROS_KB_RAW_NPCX=n
 
 CONFIG_SYSCON=y
 
-CONFIG_PLATFORM_EC_CHARGER=n
-CONFIG_PLATFORM_EC_USBC=n
-
 CONFIG_PLATFORM_EC_BOARD_VERSION_GPIO=n
diff --git a/zephyr/projects/corsola/src/kingler/usb_pd_policy.c b/zephyr/projects/corsola/src/kingler/usb_pd_policy.c
new file mode 100644
index 0000000000..b2c8b2ca37
--- /dev/null
+++ b/zephyr/projects/corsola/src/kingler/usb_pd_policy.c
@@ -0,0 +1,71 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#include "charge_manager.h"
+#include "console.h"
+#include "driver/ppc/rt1718s.h"
+#include "gpio.h"
+#include "system.h"
+#include "usb_mux.h"
+#include "usb_pd.h"
+#include "usbc_ppc.h"
+#include "util.h"
+
+#include "baseboard_usbc_config.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args)
+
+void pd_power_supply_reset(int port)
+{
+	int prev_en;
+
+	prev_en = ppc_is_sourcing_vbus(port);
+
+	if (port == USBC_PORT_C1)
+		rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_SOURCE, 0);
+
+	/* Disable VBUS. */
+	ppc_vbus_source_enable(port, 0);
+
+	/* Enable discharge if we were previously sourcing 5V */
+	if (prev_en)
+		pd_set_vbus_discharge(port, 1);
+
+	/* Notify host of power info change. */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+}
+
+
+int pd_set_power_supply_ready(int port)
+{
+	int rv;
+
+	/* Disable charging. */
+	rv = board_vbus_sink_enable(port, 0);
+	if (rv)
+		return rv;
+
+	pd_set_vbus_discharge(port, 0);
+
+	/* Provide Vbus. */
+	if (port == USBC_PORT_C1)
+		rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_SOURCE, 1);
+
+	rv = ppc_vbus_source_enable(port, 1);
+	if (rv)
+		return rv;
+
+	/* Notify host of power info change. */
+	pd_send_host_event(PD_EVENT_POWER_CHANGE);
+
+	return EC_SUCCESS;
+}
+
+int pd_snk_is_vbus_provided(int port)
+{
+	/* TODO: use ADC? */
+	return tcpm_check_vbus_level(port, VBUS_PRESENT);
+}
diff --git a/zephyr/projects/corsola/src/kingler/usbc_config.c b/zephyr/projects/corsola/src/kingler/usbc_config.c
new file mode 100644
index 0000000000..4b487ded8a
--- /dev/null
+++ b/zephyr/projects/corsola/src/kingler/usbc_config.c
@@ -0,0 +1,278 @@
+/* Copyright 2022 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Kingler board-specific USB-C configuration */
+
+#include "charger.h"
+#include "console.h"
+#include "driver/charger/isl923x_public.h"
+#include "driver/ppc/nx20p348x.h"
+#include "driver/ppc/rt1718s.h"
+#include "driver/tcpm/anx7447.h"
+#include "driver/tcpm/rt1718s.h"
+#include "hooks.h"
+#include "timer.h"
+#include "usb_charge.h"
+#include "usb_mux.h"
+#include "usb_pd_tcpm.h"
+#include "usbc_ppc.h"
+
+#include "baseboard_usbc_config.h"
+#include "variant_db_detection.h"
+
+#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
+#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
+
+struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	[USBC_PORT_C0] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C0,
+			.addr_flags = AN7447_TCPC0_I2C_ADDR_FLAGS,
+		},
+		.drv = &anx7447_tcpm_drv,
+		/* Alert is active-low, push-pull */
+		.flags = 0,
+	},
+	[USBC_PORT_C1] = {
+		.bus_type = EC_BUS_TYPE_I2C,
+		.i2c_info = {
+			.port = I2C_PORT_USB_C1,
+			.addr_flags = RT1718S_I2C_ADDR2_FLAGS,
+		},
+		.drv = &rt1718s_tcpm_drv,
+	}
+};
+
+
+struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+	[USBC_PORT_C0] = {
+		.i2c_port = I2C_PORT_USB_C0,
+		.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
+		.drv = &nx20p348x_drv
+	},
+	[USBC_PORT_C1] = {
+		.i2c_port = I2C_PORT_USB_C1,
+		.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
+		.drv = &nx20p348x_drv
+	}
+};
+unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
+
+const struct charger_config_t chg_chips[] = {
+	{
+		.i2c_port = I2C_PORT_POWER,
+		.i2c_addr_flags = ISL923X_ADDR_FLAGS,
+		.drv = &isl923x_drv,
+	}
+};
+
+struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = {};
+
+struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = {
+};
+
+void board_tcpc_init(void)
+{
+	/* Only reset TCPC if not sysjump */
+	if (!system_jumped_late()) {
+		/* TODO(crosbug.com/p/61098): How long do we need to wait? */
+		board_reset_pd_mcu();
+	}
+
+	/* Enable PPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
+	if (corsola_get_db_type() == CORSOLA_DB_TYPEC)
+		gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
+
+	/* Enable TCPC interrupts */
+	gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
+	if (corsola_get_db_type() == CORSOLA_DB_TYPEC)
+		gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
+
+	/*
+	 * Initialize HPD to low; after sysjump SOC needs to see
+	 * HPD pulse to enable video path
+	 */
+	for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port)
+		usb_mux_hpd_update(port, USB_PD_MUX_HPD_LVL_DEASSERTED |
+					 USB_PD_MUX_HPD_IRQ_DEASSERTED);
+}
+DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+
+__override int board_rt1718s_init(int port)
+{
+	static bool gpio_initialized;
+
+	if (!system_jumped_late() && !gpio_initialized) {
+		/* set GPIO 1~3 as push pull, as output, output low. */
+		rt1718s_gpio_set_flags(port, RT1718S_GPIO1, GPIO_OUT_LOW);
+		rt1718s_gpio_set_flags(port, RT1718S_GPIO2, GPIO_OUT_LOW);
+		rt1718s_gpio_set_flags(port, RT1718S_GPIO3, GPIO_OUT_LOW);
+		gpio_initialized = true;
+	}
+
+	/* gpio 1/2 output high when receiving frs signal */
+	RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO1_VBUS_CTRL,
+			RT1718S_GPIO1_VBUS_CTRL_FRS_RX_VBUS, 0xFF));
+	RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_GPIO2_VBUS_CTRL,
+			RT1718S_GPIO2_VBUS_CTRL_FRS_RX_VBUS, 0xFF));
+
+	/* Turn on SBU switch */
+	RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_RT2_SBU_CTRL_01,
+				RT1718S_RT2_SBU_CTRL_01_SBU_VIEN |
+				RT1718S_RT2_SBU_CTRL_01_SBU2_SWEN |
+				RT1718S_RT2_SBU_CTRL_01_SBU1_SWEN,
+				0xFF));
+	/* Trigger GPIO 1/2 change when FRS signal received */
+	RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL3,
+			RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 |
+			RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1,
+			RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO2 |
+			RT1718S_FRS_CTRL3_FRS_RX_WAIT_GPIO1));
+	/* Set FRS signal detect time to 46.875us */
+	RETURN_ERROR(rt1718s_update_bits8(port, RT1718S_FRS_CTRL1,
+			RT1718S_FRS_CTRL1_FRSWAPRX_MASK,
+			0xFF));
+
+	return EC_SUCCESS;
+}
+
+void board_reset_pd_mcu(void)
+{
+
+	/* reset C0 ANX3447 */
+	/* Assert reset */
+	gpio_set_level(GPIO_USB_C0_TCPC_RST, 1);
+	msleep(1);
+	gpio_set_level(GPIO_USB_C0_TCPC_RST, 0);
+	/* After TEST_R release, anx7447/3447 needs 2ms to finish eFuse
+	 * loading.
+	 */
+	msleep(2);
+
+	/* reset C1 RT1718s */
+	rt1718s_sw_reset(USBC_PORT_C1);
+}
+
+/* Used by Vbus discharge common code with CONFIG_USB_PD_DISCHARGE */
+int board_vbus_source_enabled(int port)
+{
+	return tcpm_get_src_ctrl(port);
+}
+
+/* Used by USB charger task with CONFIG_USB_PD_5V_EN_CUSTOM */
+int board_is_sourcing_vbus(int port)
+{
+	return board_vbus_source_enabled(port);
+}
+
+int board_vbus_sink_enable(int port, int enable)
+{
+	if (port == USBC_PORT_C1)
+		rt1718s_gpio_set_level(port, GPIO_EN_USB_C1_SINK, enable);
+
+	return ppc_vbus_sink_enable(port, enable);
+}
+
+int board_set_active_charge_port(int port)
+{
+	int i;
+	bool is_valid_port =
+		(port >= 0 && port < board_get_usb_pd_port_count());
+
+	if (!is_valid_port && port != CHARGE_PORT_NONE)
+		return EC_ERROR_INVAL;
+
+	if (port == CHARGE_PORT_NONE) {
+		CPRINTS("Disabling all charger ports");
+
+		/* Disable all ports. */
+		for (i = 0; i < board_get_usb_pd_port_count(); i++) {
+			/*
+			 * Do not return early if one fails otherwise we can
+			 * get into a boot loop assertion failure.
+			 */
+			if (board_vbus_sink_enable(i, 0))
+				CPRINTS("Disabling C%d as sink failed.", i);
+		}
+
+		return EC_SUCCESS;
+	}
+
+	/* Check if the port is sourcing VBUS. */
+	if (ppc_is_sourcing_vbus(port)) {
+		CPRINTS("Skip enable C%d", port);
+		return EC_ERROR_INVAL;
+	}
+
+	CPRINTS("New charge port: C%d", port);
+
+	/*
+	 * Turn off the other ports' sink path FETs, before enabling the
+	 * requested charge port.
+	 */
+	for (i = 0; i < board_get_usb_pd_port_count(); i++) {
+		if (i == port)
+			continue;
+
+		if (board_vbus_sink_enable(i, 0))
+			CPRINTS("C%d: sink path disable failed.", i);
+	}
+
+	/* Enable requested charge port. */
+	if (board_vbus_sink_enable(port, 1)) {
+		CPRINTS("C%d: sink path enable failed.", port);
+		return EC_ERROR_UNKNOWN;
+	}
+
+	return EC_SUCCESS;
+}
+
+uint16_t tcpc_get_alert_status(void)
+{
+	uint16_t status = 0;
+
+	if (!gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL)) {
+		if (!gpio_get_level(GPIO_USB_C0_TCPC_RST))
+			status |= PD_STATUS_TCPC_ALERT_0;
+	}
+
+	if (!gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL))
+		return status |= PD_STATUS_TCPC_ALERT_1;
+	return status;
+}
+
+void tcpc_alert_event(enum gpio_signal signal)
+{
+	int port;
+
+	switch (signal) {
+	case GPIO_USB_C0_TCPC_INT_ODL:
+		port = 0;
+		break;
+	case GPIO_USB_C1_TCPC_INT_ODL:
+		port = 1;
+		break;
+	default:
+		return;
+	}
+
+	schedule_deferred_pd_interrupt(port);
+}
+
+void ppc_interrupt(enum gpio_signal signal)
+{
+	switch (signal) {
+	case GPIO_USB_C0_PPC_INT_ODL:
+		ppc_chips[0].drv->interrupt(0);
+		break;
+	case GPIO_USB_C1_PPC_INT_ODL:
+		ppc_chips[1].drv->interrupt(1);
+		break;
+	default:
+		break;
+	}
+}
diff --git a/zephyr/projects/corsola/src/krabby/usb_pd_policy.c b/zephyr/projects/corsola/src/krabby/usb_pd_policy.c
index 8d28364664..fbdeda89bc 100644
--- a/zephyr/projects/corsola/src/krabby/usb_pd_policy.c
+++ b/zephyr/projects/corsola/src/krabby/usb_pd_policy.c
@@ -55,12 +55,6 @@ void pd_power_supply_reset(int port)
 	pd_send_host_event(PD_EVENT_POWER_CHANGE);
 }
 
-int pd_check_vconn_swap(int port)
-{
-	/* Allow Vconn swap if AP is on. */
-	return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON);
-}
-
 int pd_set_power_supply_ready(int port)
 {
 	int rv;
diff --git a/zephyr/projects/corsola/src/usb_pd_policy.c b/zephyr/projects/corsola/src/usb_pd_policy.c
index 0331e90c1a..bfaa6f0c55 100644
--- a/zephyr/projects/corsola/src/usb_pd_policy.c
+++ b/zephyr/projects/corsola/src/usb_pd_policy.c
@@ -18,6 +18,12 @@
 #define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args)
 #define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args)
 
+int pd_check_vconn_swap(int port)
+{
+	/* Allow Vconn swap if AP is on. */
+	return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON);
+}
+
 int svdm_get_hpd_gpio(int port)
 {
 	/* HPD is low active, inverse the result */
diff --git a/zephyr/projects/corsola/src/usbc_config.c b/zephyr/projects/corsola/src/usbc_config.c
index c4917b252d..ed1da07c1a 100644
--- a/zephyr/projects/corsola/src/usbc_config.c
+++ b/zephyr/projects/corsola/src/usbc_config.c
@@ -42,17 +42,14 @@ static void baseboard_init(void)
 }
 DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1);
 
-static void board_tcpc_init(void)
+static void baseboard_tcpc_init(void)
 {
-	/* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */
-	gpio_enable_interrupt(GPIO_X_EC_GPIO2);
-
 	/* If this is not a Type-C subboard, disable the task. */
 	if (corsola_get_db_type() != CORSOLA_DB_TYPEC)
 		task_disable_task(TASK_ID_PD_C1);
 }
 /* Must be done after I2C and subboard */
-DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
+DECLARE_HOOK(HOOK_INIT, baseboard_tcpc_init, HOOK_PRIO_INIT_I2C + 1);
 
 __override uint8_t board_get_usb_pd_port_count(void)
 {