zephyr: drivers: Increase ticks per second in tests

Increase ticks per second to 10000 (10 ticks per ms) from 100. This
allows to meassure delays of 1 ms and simulate time related behaviour
better.

PS8815 test is extended to check if delay of 1 ms is applied when role
control register is written. This is workaround for some PS8815 HW
revisions (b/171430855).

BUG=b:203858808
BRANCH=none
TEST=zmake configure --test zephyr/test/drivers

Signed-off-by: Tomasz Michalec <tm@semihalf.com>
Change-Id: Ib8b4b38c5994b4040b12225f28b628edf1278049
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3398505
Tested-by: Tomasz Michalec <tmichalec@google.com>
Reviewed-by: Sam Hurst <shurst@google.com>
Commit-Queue: Tomasz Michalec <tmichalec@google.com>

3 files changed, 66 insertions, 8 deletions

diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c
index ea76b64d6f..ef6f37263a 100644
--- a/driver/tcpm/ps8xxx.c
+++ b/driver/tcpm/ps8xxx.c
@@ -764,6 +764,7 @@ __maybe_unused static int ps8815_transmit_buffer_workaround_check(int port)
 		ps8xxx_role_control_delay_ms[port] = 1;
 		break;
 	default:
+		ps8xxx_role_control_delay_ms[port] = 0;
 		break;
 	}
 
diff --git a/zephyr/test/drivers/prj.conf b/zephyr/test/drivers/prj.conf
index 33a70dd251..2d0ed94594 100644
--- a/zephyr/test/drivers/prj.conf
+++ b/zephyr/test/drivers/prj.conf
@@ -11,6 +11,9 @@ CONFIG_ZTEST_ASSERT_VERBOSE=1
 CONFIG_ZTEST_MOCKING=y
 CONFIG_ZTEST_PARAMETER_COUNT=24
 
+# Simulate 10 ticks per ms
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=10000
+
 # Enable exception stack traces for better errors
 CONFIG_EXCEPTION_STACK_TRACE=y
 
@@ -118,4 +121,4 @@ CONFIG_PLATFORM_EC_POWERSEQ_HOST_SLEEP=y
 
 CONFIG_PLATFORM_EC_LID_SWITCH=y
 CONFIG_PLATFORM_EC_POWER_BUTTON=y
-CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=y
\ No newline at end of file
+CONFIG_PLATFORM_EC_HOST_INTERFACE_ESPI=y
diff --git a/zephyr/test/drivers/src/ps8xxx.c b/zephyr/test/drivers/src/ps8xxx.c
index b6c3b5198b..16e1a01763 100644
--- a/zephyr/test/drivers/src/ps8xxx.c
+++ b/zephyr/test/drivers/src/ps8xxx.c
@@ -181,6 +181,8 @@ static void test_ps8815_set_cc(void)
 {
 	const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL);
 	const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul);
+	int64_t start_time;
+	int64_t delay;
 
 	/* Set firmware version <= 0x10 to set "disable rp detect" workaround */
 	tcpci_emul_set_reg(tcpci_emul, PS8XXX_REG_FW_REV, 0x8);
@@ -228,12 +230,12 @@ static void test_ps8815_set_cc(void)
 	ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a00);
 	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL);
 
-	/*
-	 * TODO(b/203858808): Find if it is possible to detect additional 1 ms
-	 *                    delay
-	 */
+	start_time = k_uptime_get();
 	check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0,
 			    "delay on HW rev 0x0a00");
+	delay = k_uptime_delta(&start_time);
+	zassert_true(delay >= 1,
+		     "expected delay on HW rev 0x0a00 (delay %lld)", delay);
 
 	/*
 	 * Set hw revision 0x0a01 to enable workaround for b/171430855 (delay
@@ -241,8 +243,12 @@ static void test_ps8815_set_cc(void)
 	 */
 	ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a01);
 	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL);
+	start_time = k_uptime_get();
 	check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0,
 			    "delay on HW rev 0x0a01");
+	delay = k_uptime_delta(&start_time);
+	zassert_true(delay >= 1,
+		     "expected delay on HW rev 0x0a01 (delay %lld)", delay);
 
 	/*
 	 * Set other hw revision to disable workaround for b/171430855 (delay
@@ -250,8 +256,12 @@ static void test_ps8815_set_cc(void)
 	 */
 	ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a02);
 	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL);
+	start_time = k_uptime_get();
 	check_ps8815_set_cc(TYPEC_RP_1A5, TYPEC_CC_RP, 0,
 			    "no delay on other HW rev");
+	delay = k_uptime_delta(&start_time);
+	zassert_true(delay == 0,
+		     "unexpected delay on HW rev 0x0a02 (delay %lld)", delay);
 }
 
 /** Test PS8xxx set vconn */
@@ -324,12 +334,14 @@ static void test_ps8xxx_transmit(void)
 }
 
 /** Test PS8805 and PS8815 drp toggle */
-static void test_ps88x5_drp_toggle(void)
+static void test_ps88x5_drp_toggle(bool delay_expected)
 {
 	const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL);
 	const struct emul *tcpci_emul = ps8xxx_emul_get_tcpci(ps8xxx_emul);
 	struct i2c_emul *tcpci_i2c_emul = tcpci_emul_get_i2c_emul(tcpci_emul);
 	uint16_t exp_role_ctrl;
+	int64_t start_time;
+	int64_t delay;
 
 	/* Test fail on command write */
 	i2c_common_emul_set_write_fail_reg(tcpci_i2c_emul, TCPC_REG_COMMAND);
@@ -362,8 +374,15 @@ static void test_ps88x5_drp_toggle(void)
 	/* Test drp toggle when CC is snk. Role control CC lines should be RP */
 	exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB,
 					       TYPEC_CC_RP, TYPEC_CC_RP);
+	start_time = k_uptime_get();
 	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1),
 		      NULL);
+	delay = k_uptime_delta(&start_time);
+	if (delay_expected) {
+		zassert_true(delay >= 1, "expected delay (%lld ms)", delay);
+	} else {
+		zassert_true(delay == 0, "unexpected delay (%lld ms)", delay);
+	}
 	check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl);
 	check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND,
 			TCPC_REG_COMMAND_LOOK4CONNECTION);
@@ -376,13 +395,48 @@ static void test_ps88x5_drp_toggle(void)
 	/* Test drp toggle when CC is src. Role control CC lines should be RD */
 	exp_role_ctrl = TCPC_REG_ROLE_CTRL_SET(TYPEC_DRP, TYPEC_RP_USB,
 					       TYPEC_CC_RD, TYPEC_CC_RD);
+	start_time = k_uptime_get();
 	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.drp_toggle(USBC_PORT_C1),
 		      NULL);
+	delay = k_uptime_delta(&start_time);
+	if (delay_expected) {
+		zassert_true(delay >= 1, "expected delay (%lld ms)", delay);
+	} else {
+		zassert_true(delay == 0, "unexpected delay (%lld ms)", delay);
+	}
 	check_tcpci_reg(tcpci_emul, TCPC_REG_ROLE_CTRL, exp_role_ctrl);
 	check_tcpci_reg(tcpci_emul, TCPC_REG_COMMAND,
 			TCPC_REG_COMMAND_LOOK4CONNECTION);
 }
 
+/** Test PS8815 drp toggle */
+static void test_ps8815_drp_toggle(void)
+{
+	const struct emul *ps8xxx_emul = emul_get_binding(PS8XXX_EMUL_LABEL);
+
+	/*
+	 * Set hw revision 0x0a00 to enable workaround for b/171430855 (delay
+	 * 1 ms on role control reg update)
+	 */
+	ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a00);
+	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL);
+	test_ps88x5_drp_toggle(true);
+
+	/*
+	 * Set other hw revision to disable workaround for b/171430855 (delay
+	 * 1 ms on role control reg update)
+	 */
+	ps8xxx_emul_set_hw_rev(ps8xxx_emul, 0x0a02);
+	zassert_equal(EC_SUCCESS, ps8xxx_tcpm_drv.init(USBC_PORT_C1), NULL);
+	test_ps88x5_drp_toggle(false);
+}
+
+/** Test PS8805 drp toggle */
+static void test_ps8805_drp_toggle(void)
+{
+	test_ps88x5_drp_toggle(false);
+}
+
 /** Test PS8xxx get chip info code used by all PS8xxx devices */
 static void test_ps8xxx_get_chip_info(uint16_t current_product_id)
 {
@@ -1020,7 +1074,7 @@ void test_suite_ps8xxx(void)
 				 setup_ps8805, unit_test_noop),
 			 ztest_unit_test_setup_teardown(test_ps8xxx_transmit,
 				 setup_ps8805, unit_test_noop),
-			 ztest_unit_test_setup_teardown(test_ps88x5_drp_toggle,
+			 ztest_unit_test_setup_teardown(test_ps8805_drp_toggle,
 				 setup_ps8805, unit_test_noop),
 			 ztest_unit_test_setup_teardown(
 				 test_ps8805_get_chip_info,
@@ -1083,7 +1137,7 @@ void test_suite_ps8xxx(void)
 				 setup_ps8815, unit_test_noop),
 			 ztest_unit_test_setup_teardown(test_ps8xxx_transmit,
 				 setup_ps8815, unit_test_noop),
-			 ztest_unit_test_setup_teardown(test_ps88x5_drp_toggle,
+			 ztest_unit_test_setup_teardown(test_ps8815_drp_toggle,
 				 setup_ps8815, unit_test_noop),
 			 ztest_unit_test_setup_teardown(
 				 test_ps8815_get_chip_info,