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authorJett Rink <jettrink@chromium.org>2018-05-21 15:05:23 -0600
committerchrome-bot <chrome-bot@chromium.org>2018-07-20 11:41:03 -0700
commit7b504639d9b32bc292288e03143fc0404a6a8ab1 (patch)
tree3ceb65f621cf6521902bcab3482775e645706479
parent5100b4c3d2059de5da41c75fc19347918eec87da (diff)
downloadchrome-ec-7b504639d9b32bc292288e03143fc0404a6a8ab1.tar.gz
ppc: remove EC ability to drive PPC GPIO
We figured out that having the EC drive the EN_SNK input of a PPC will lead to brownout or lockout conditions since the EC will float the GPIO when the EC reset. When the PPC input floats, the power path to the rest of the board is cut. If you mix this scenario with a PPC that hard-codes the over voltage protect of vbus at 6.8V in dead battery mode, you can lock the previously negotiated 20V Vbus out of the system until you physically remove the USBC connection and reinsert it. BRANCH=none BUG=b:78896495,b:78021059,b:111545725 TEST=removing unused code. everything still works. Change-Id: Ie9d51af766bc08e7d9b46b4610c0f84d3d0961f8 Signed-off-by: Jett Rink <jettrink@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/1067712 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-by: Scott Collyer <scollyer@chromium.org>
-rw-r--r--driver/ppc/nx20p3483.c44
-rw-r--r--include/usbc_ppc.h9
2 files changed, 12 insertions, 41 deletions
diff --git a/driver/ppc/nx20p3483.c b/driver/ppc/nx20p3483.c
index 1a6a41bb04..9609be7dcd 100644
--- a/driver/ppc/nx20p3483.c
+++ b/driver/ppc/nx20p3483.c
@@ -134,24 +134,14 @@ static int nx20p3483_vbus_sink_enable(int port, int enable)
NX20P3483_MODE_STANDBY;
enable = !!enable;
+
/*
- * IF PPC_CFG_FLAGS_GPIO_CONTROL is set, then the SNK/SRC switch
- * control is driven by the EC. Otherwise, it's controlled directly by
- * the TCPC and only need to check the status.
+ * We cannot use an EC GPIO for EN_SNK since an EC reset will float the
+ * GPIO thus browning out the board (without a battery).
*/
- if (ppc_chips[port].flags & PPC_CFG_FLAGS_GPIO_CONTROL) {
-
- /* If enable, makes sure that SRC mode is disabled */
- if (enable)
- gpio_set_level(ppc_chips[port].src_gpio, 0);
-
- /* Set SNK mode based on enable */
- gpio_set_level(ppc_chips[port].snk_gpio, enable);
- } else {
- rv = tcpm_set_snk_ctrl(port, enable);
- if (rv)
- return rv;
- }
+ rv = tcpm_set_snk_ctrl(port, enable);
+ if (rv)
+ return rv;
/* Read device status register to get mode */
rv = read_reg(port, NX20P3483_DEVICE_STATUS_REG, &status);
@@ -170,24 +160,14 @@ static int nx20p3483_vbus_source_enable(int port, int enable)
NX20P3483_MODE_STANDBY;
enable = !!enable;
+
/*
- * IF PPC_CFG_FLAGS_GPIO_CONTROL is set, then the SNK/SRC switch
- * control is driven by the EC. Otherwise, it's controlled directly by
- * the TCPC and only need to check the status.
+ * For parity's sake, we should not use an EC GPIO for EN_SRC since we
+ * cannot use it for EN_SNK (for brown out reason listed above).
*/
- if (ppc_chips[port].flags & PPC_CFG_FLAGS_GPIO_CONTROL) {
-
- /* If enable, makes sure that SNK mode is disabled */
- if (enable)
- gpio_set_level(ppc_chips[port].snk_gpio, 0);
-
- /* Set SRC mode based on enable */
- gpio_set_level(ppc_chips[port].src_gpio, enable);
- } else {
- rv = tcpm_set_src_ctrl(port, enable);
- if (rv)
- return rv;
- }
+ rv = tcpm_set_src_ctrl(port, enable);
+ if (rv)
+ return rv;
/* Read device status register to get mode */
rv = read_reg(port, NX20P3483_DEVICE_STATUS_REG, &status);
diff --git a/include/usbc_ppc.h b/include/usbc_ppc.h
index e846a6ecca..d65fa79f0e 100644
--- a/include/usbc_ppc.h
+++ b/include/usbc_ppc.h
@@ -108,18 +108,9 @@ struct ppc_drv {
#endif /* defined(CONFIG_USB_PD_VBUS_DETECT_PPC) */
};
-
-/* PPC SNK/SRC switch control driven by EC GPIO */
-#define PPC_CFG_FLAGS_GPIO_CONTROL (1 << 0)
-
struct ppc_config_t {
- /* Used for PPC_CFG_FLAGS_* defined above */
- uint32_t flags;
int i2c_port;
int i2c_addr;
- /* snk|src_gpio only required if PPC_CFG_FLAGS_GPIO_CONTROL is set */
- enum gpio_signal snk_gpio;
- enum gpio_signal src_gpio;
const struct ppc_drv *drv;
};