diff options
| author | Caveh Jalali <caveh@chromium.org> | 2021-05-21 19:04:40 -0700 |
|---|---|---|
| committer | Commit Bot <commit-bot@chromium.org> | 2021-05-27 00:49:03 +0000 |
| commit | 49fb3c826171b1c2d90ed8aa562e22e1fd818c78 (patch) | |
| tree | ab2c233248889f6f4856f12fa6ca406505f6bd14 | |
| parent | 397e64350dae07e4f391b558538f86be71068785 (diff) | |
| download | chrome-ec-49fb3c826171b1c2d90ed8aa562e22e1fd818c78.tar.gz | |
brya: Board ID 2: Update generated-gpio.inc from spreadsheet
This updates the byra GPIO definitions to match the board ID 2
schematics.
BRANCH=none
BUG=b:183452273
TEST=booted on board ID 1 with following patches
Change-Id: I55f1f926f7adbd113c8e8a4dcdff9ec2ae667ab6
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2914207
Reviewed-by: Boris Mittelberg <bmbm@google.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
| -rw-r--r-- | board/brya/generated-gpio.inc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/board/brya/generated-gpio.inc b/board/brya/generated-gpio.inc index ead239829d..1e3556d5ff 100644 --- a/board/brya/generated-gpio.inc +++ b/board/brya/generated-gpio.inc @@ -36,10 +36,9 @@ GPIO_INT(USB_C2_RT_INT_ODL, PIN(4, 1), GPIO_INT_BOTH, retimer_inter GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) GPIO(CHARGER_VAP_OTG_EN, PIN(7, 3), GPIO_OUT_LOW) GPIO(CPU_C10_GATE_L, PIN(6, 7), GPIO_INPUT) -GPIO(EC_BATT_PRES_ODL, PIN(E, 1), GPIO_INPUT) +GPIO(EC_BATT_PRES_ODL, PIN(A, 3), GPIO_INPUT) GPIO(EC_ENTERING_RW, PIN(0, 3), GPIO_OUT_LOW) GPIO(EC_EN_EDP_BL, PIN(D, 3), GPIO_OUT_HIGH) -GPIO(EC_EN_IMVP91_R, PIN(A, 7), GPIO_OUT_LOW) GPIO(EC_GSC_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) GPIO(EC_I2C_BAT_SCL, PIN(3, 3), GPIO_INPUT) GPIO(EC_I2C_BAT_SDA, PIN(3, 6), GPIO_INPUT) @@ -57,14 +56,14 @@ GPIO(EC_I2C_USB_C1_MIX_SCL, PIN(E, 4), GPIO_INPUT) GPIO(EC_I2C_USB_C1_MIX_SDA, PIN(E, 3), GPIO_INPUT) GPIO(EC_I2C_USB_C1_TCPC_SCL, PIN(F, 3), GPIO_INPUT) GPIO(EC_I2C_USB_C1_TCPC_SDA, PIN(F, 2), GPIO_INPUT) -GPIO(EC_KB_BL_EN, PIN(A, 3), GPIO_OUT_LOW) +GPIO(EC_KB_BL_EN_L, PIN(8, 6), GPIO_OUT_HIGH) GPIO(EC_PCHHOT_ODL, PIN(7, 4), GPIO_INPUT) GPIO(EC_PCH_INT_ODL, PIN(B, 0), GPIO_ODR_HIGH) GPIO(EC_PCH_PWR_BTN_ODL, PIN(C, 1), GPIO_ODR_HIGH) GPIO(EC_PCH_RSMRST_L, PIN(A, 6), GPIO_OUT_LOW) GPIO(EC_PCH_RTCRST, PIN(7, 6), GPIO_OUT_LOW) GPIO(EC_PCH_SYS_PWROK, PIN(3, 7), GPIO_OUT_LOW) -GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_INPUT | GPIO_PULL_UP) +GPIO(EC_PCH_WAKE_R_ODL, PIN(C, 0), GPIO_INPUT) GPIO(EC_PROCHOT_ODL, PIN(6, 3), GPIO_ODR_HIGH) GPIO(EN_PP5000_FAN, PIN(6, 1), GPIO_OUT_HIGH) GPIO(EN_PP5000_USBA_R, PIN(D, 7), GPIO_OUT_LOW) @@ -72,7 +71,7 @@ GPIO(EN_S5_RAILS, PIN(B, 6), GPIO_OUT_LOW) GPIO(IMVP9_VRRDY_OD, PIN(4, 3), GPIO_INPUT) GPIO(PCH_PWROK, PIN(7, 2), GPIO_OUT_LOW) GPIO(SYS_RST_ODL, PIN(C, 5), GPIO_ODR_HIGH) -GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(3, 4), GPIO_ODR_LOW) +GPIO(USB_C0_C2_TCPC_RST_ODL, PIN(A, 7), GPIO_OUT_LOW) GPIO(USB_C1_FRS_EN, PIN(9, 4), GPIO_OUT_LOW) GPIO(USB_C1_RST_ODL, PIN(9, 6), GPIO_ODR_LOW) GPIO(USB_C1_RT_RST_R_ODL, PIN(0, 2), GPIO_ODR_LOW) @@ -99,7 +98,9 @@ ALTERNATE(PIN_MASK(B, 0x80), 0, MODULE_PWM, 0) /* GPIOB7/PWM5 */ ALTERNATE(PIN_MASK(C, 0x1c), 0, MODULE_PWM, 0) /* GPIOC4/PWM2, GPIOC3/PWM0, GPIOC2/PWM1/I2C6_SCL0 */ /* ADC alternate functions */ +ALTERNATE(PIN_MASK(3, 0x10), 0, MODULE_ADC, 0) /* GPIO34/PS2_DAT2/ADC6 */ ALTERNATE(PIN_MASK(4, 0x34), 0, MODULE_ADC, 0) /* GPIO42/ADC3/RI_L, GPIO45/ADC0, GPIO44/ADC1 */ +ALTERNATE(PIN_MASK(E, 0x02), 0, MODULE_ADC, 0) /* GPIOE1/ADC7 */ /* KB alternate functions */ ALTERNATE(PIN_MASK(0, 0xf0), 0, MODULE_KB, GPIO_ODR_HIGH) /* KSO10&P80_CLK/GPIO07, KSO11&P80_DAT/GPIO06, KSO12/GPIO05, KSO13/GPIO04 */ @@ -118,6 +119,5 @@ UNUSED(PIN(D, 6)) /* GPOD6/CR_SOUT3/SHDF_ESPI_L */ UNUSED(PIN(3, 2)) /* GPO32/TRIS_L */ UNUSED(PIN(3, 5)) /* GPO35/CR_SOUT4/TEST_L */ UNUSED(PIN(6, 6)) /* GPO66/ARM_L_x86 */ -UNUSED(PIN(8, 6)) /* GPO86/TXD/CR_SOUT2/FLPRG2_L */ /* Pre-configured PSL balls: J8 K6 */ |