Create public headers for a few PPC/TCPM drivers

At present boards includes the private header of some of the drivers.
This is not ideal but it works. For Zephyr we don't really want to
access headers in private driver directories.

Instead, create public headers for the five drivers needed by the
Zephyr volteer build. For now, include the public header in the
private header (the one included by the EC code), so that fewer code
changes are required.

BUG=b:175434113
BRANCH=none
TEST=make buildall -j30   (way too verbose to see what is happening)
build volteer on zephyr

Change-Id: I5b810f53cdf545a885f3977849f9f2ca1d04d60a
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2607506
Reviewed-by: Jack Rosenthal <jrosenth@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>

10 files changed, 136 insertions, 71 deletions

diff --git a/driver/ppc/sn5s330.h b/driver/ppc/sn5s330.h
index 94d0ab0f1e..f94a3e8e10 100644
--- a/driver/ppc/sn5s330.h
+++ b/driver/ppc/sn5s330.h
@@ -10,6 +10,8 @@
 
 #include "common.h"
 
+#include "driver/ppc/sn5s330_public.h"
+
 struct sn5s330_config {
 	uint8_t i2c_port;
 	uint8_t i2c_addr_flags;
@@ -25,11 +27,6 @@ enum sn5s330_pp_idx {
 	SN5S330_PP_COUNT,
 };
 
-#define SN5S330_ADDR0_FLAGS 0x40
-#define SN5S330_ADDR1_FLAGS 0x41
-#define SN5S330_ADDR2_FLAGS 0x42
-#define SN5S330_ADDR3_FLAGS 0x43
-
 #define SN5S330_FUNC_SET1  0x50
 #define SN5S330_FUNC_SET2  0x51
 #define SN5S330_FUNC_SET3  0x52
@@ -161,17 +158,4 @@ enum sn5s330_pp_idx {
  */
 #define SN5S330_VBUS_GOOD_MASK BIT(0)
 
-extern const struct ppc_drv sn5s330_drv;
-
-/**
- * Interrupt Handler for the SN5S330.
- *
- * By default, the only interrupt sources that are unmasked are overcurrent
- * conditions for PP1, and VBUS_GOOD if PPC is being used to detect VBUS
- * (CONFIG_USB_PD_VBUS_DETECT_PPC).
- *
- * @param port: The Type-C port which triggered the interrupt.
- */
-void sn5s330_interrupt(int port);
-
 #endif /* defined(__CROS_EC_SN5S330_H) */
diff --git a/driver/ppc/syv682x.h b/driver/ppc/syv682x.h
index 3f6d41b512..a2458cf17c 100644
--- a/driver/ppc/syv682x.h
+++ b/driver/ppc/syv682x.h
@@ -8,11 +8,7 @@
 #ifndef __CROS_EC_SYV682X_H
 #define __CROS_EC_SYV682X_H
 
-/* I2C addresses */
-#define SYV682X_ADDR0_FLAGS		0x40
-#define SYV682X_ADDR1_FLAGS		0x41
-#define SYV682X_ADDR2_FLAGS		0x42
-#define SYV682x_ADDR3_FLAGS		0x43
+#include "driver/ppc/syv682x_public.h"
 
 /* SYV682x register addresses */
 #define SYV682X_STATUS_REG		0x00
@@ -97,9 +93,4 @@
 #define SYV682X_CONTROL_4_CC_FRS	BIT(1)
 #define SYV682X_CONTROL_4_INT_MASK	0x0c
 
-struct ppc_drv;
-extern const struct ppc_drv syv682x_drv;
-
-void syv682x_interrupt(int port);
-
 #endif /* defined(__CROS_EC_SYV682X_H) */
diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h
index 6ef1cd9d90..968d1eeaab 100644
--- a/driver/tcpm/ps8xxx.h
+++ b/driver/tcpm/ps8xxx.h
@@ -4,19 +4,13 @@
  */
 #include "usb_mux.h"
 
+#include "driver/tcpm/ps8xxx_public.h"
+
 /* Parade Tech Type-C port controller */
 
 #ifndef __CROS_EC_USB_PD_TCPM_PS8XXX_H
 #define __CROS_EC_USB_PD_TCPM_PS8XXX_H
 
-/* I2C interface */
-#define PS8751_I2C_ADDR1_P1_FLAGS 0x09
-#define PS8751_I2C_ADDR1_P2_FLAGS 0x0A
-#define PS8751_I2C_ADDR1_FLAGS    0x0B	/* P3 */
-#define PS8751_I2C_ADDR2_FLAGS    0x1B
-#define PS8751_I2C_ADDR3_FLAGS    0x2B
-#define PS8751_I2C_ADDR4_FLAGS    0x4B
-
 #define PS8751_P3_TO_P1_FLAGS(p3_flags)	((p3_flags) - 2)
 
 /* Minimum Delay for reset assertion */
@@ -50,7 +44,6 @@
 #define PS8751_BIST_COUNTER_BYTE1 ((PS8751_BIST_COUNTER >> 8) & 0xff)
 #define PS8751_BIST_COUNTER_BYTE2 ((PS8751_BIST_COUNTER >> 16) & 0xff)
 
-#define PS8XXX_VENDOR_ID  0x1DA0
 #define PS8XXX_REG_I2C_DEBUGGING_ENABLE         0xA0
 #define PS8XXX_REG_I2C_DEBUGGING_ENABLE_ON      0x30
 #define PS8XXX_REG_I2C_DEBUGGING_ENABLE_OFF     0x31    /* default */
@@ -92,28 +85,4 @@
 /* Vendor defined registers */
 #define PS8815_P1_REG_HW_REVISION		0xF0
 
-extern const struct tcpm_drv ps8xxx_tcpm_drv;
-
-/**
- * Board specific callback to judge and provide which chip source of PS8XXX
- * series supported by this driver per specific port.
- *
- * If the board supports only one single source then there is no nencessary to
- * provide the __override version.
- *
- * If board supports two sources or above (with CONFIG_USB_PD_TCPM_MULTI_PS8XXX)
- * then the __override version is mandatory.
- *
- * @param port	TCPC port number.
- */
-__override_proto
-uint16_t board_get_ps8xxx_product_id(int port);
-
-void ps8xxx_tcpc_update_hpd_status(const struct usb_mux *me,
-				   int hpd_lvl, int hpd_irq);
-
-#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC
-extern struct i2c_stress_test_dev ps8xxx_i2c_stress_test_dev;
-#endif /* defined(CONFIG_CMD_I2C_STRESS_TEST_TCPC) */
-
 #endif /* defined(__CROS_EC_USB_PD_TCPM_PS8XXX_H) */
diff --git a/driver/tcpm/rt1715.h b/driver/tcpm/rt1715.h
index f9d2395446..dd259b9f70 100644
--- a/driver/tcpm/rt1715.h
+++ b/driver/tcpm/rt1715.h
@@ -8,10 +8,7 @@
 #ifndef __CROS_EC_USB_PD_TCPM_RT1715_H
 #define __CROS_EC_USB_PD_TCPM_RT1715_H
 
-/* I2C interface */
-#define RT1715_I2C_ADDR_FLAGS 0x4E
-
-#define RT1715_VENDOR_ID 0x29CF
+#include "driver/tcpm/rt1715_public.h"
 
 #define RT1715_REG_VENDOR_5 0x9B
 #define RT1715_REG_VENDOR_5_SHUTDOWN_OFF BIT(5)
@@ -20,6 +17,4 @@
 #define RT1715_REG_VENDOR_7 0xA0
 #define RT1715_REG_VENDOR_7_SOFT_RESET BIT(0)
 
-extern const struct tcpm_drv rt1715_tcpm_drv;
-
 #endif /* defined(__CROS_EC_USB_PD_TCPM_RT1715_H) */
diff --git a/driver/tcpm/tusb422.h b/driver/tcpm/tusb422.h
index 54ae0c7e02..3d2006b2c3 100644
--- a/driver/tcpm/tusb422.h
+++ b/driver/tcpm/tusb422.h
@@ -8,8 +8,7 @@
 #ifndef __CROS_EC_USB_PD_TCPM_TUSB422_H
 #define __CROS_EC_USB_PD_TCPM_TUSB422_H
 
-/* I2C interface */
-#define TUSB422_I2C_ADDR_FLAGS 0x20
+#include "driver/tcpm/tusb422_public.h"
 
 #define TUSB422_REG_VENDOR_INTERRUPTS_STATUS 0x90
 #define TUSB422_REG_VENDOR_INTERRUPTS_STATUS_FRS_RX BIT(0)
@@ -23,6 +22,4 @@
 #define TUSB422_REG_PHY_BMC_RX_CTRL 0x96
 #define TUSB422_REG_PHY_BMC_RX_CTRL_FRS_RX_EN BIT(3)
 
-extern const struct tcpm_drv tusb422_tcpm_drv;
-
 #endif /* defined(__CROS_EC_USB_PD_TCPM_TUSB422_H) */
diff --git a/include/driver/ppc/sn5s330_public.h b/include/driver/ppc/sn5s330_public.h
new file mode 100644
index 0000000000..fdd60e54cb
--- /dev/null
+++ b/include/driver/ppc/sn5s330_public.h
@@ -0,0 +1,29 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* TI SN5S330 USB-C Power Path Controller */
+
+#ifndef __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H
+#define __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H
+
+#define SN5S330_ADDR0_FLAGS 0x40
+#define SN5S330_ADDR1_FLAGS 0x41
+#define SN5S330_ADDR2_FLAGS 0x42
+#define SN5S330_ADDR3_FLAGS 0x43
+
+extern const struct ppc_drv sn5s330_drv;
+
+/**
+ * Interrupt Handler for the SN5S330.
+ *
+ * By default, the only interrupt sources that are unmasked are overcurrent
+ * conditions for PP1, and VBUS_GOOD if PPC is being used to detect VBUS
+ * (CONFIG_USB_PD_VBUS_DETECT_PPC).
+ *
+ * @param port: The Type-C port which triggered the interrupt.
+ */
+void sn5s330_interrupt(int port);
+
+#endif /* __CROS_EC_DRIVER_PPC_SN5S330_PUBLIC_H */
diff --git a/include/driver/ppc/syv682x_public.h b/include/driver/ppc/syv682x_public.h
new file mode 100644
index 0000000000..f366da59b3
--- /dev/null
+++ b/include/driver/ppc/syv682x_public.h
@@ -0,0 +1,21 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Silergy SYV682x Type-C Power Path Controller */
+
+#ifndef __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H
+#define __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H
+
+/* I2C addresses */
+#define SYV682X_ADDR0_FLAGS		0x40
+#define SYV682X_ADDR1_FLAGS		0x41
+#define SYV682X_ADDR2_FLAGS		0x42
+#define SYV682x_ADDR3_FLAGS		0x43
+
+extern const struct ppc_drv syv682x_drv;
+
+void syv682x_interrupt(int port);
+
+#endif /* __CROS_EC_DRIVER_PPC_SYV682X_PUBLIC_H */
diff --git a/include/driver/tcpm/ps8xxx_public.h b/include/driver/tcpm/ps8xxx_public.h
new file mode 100644
index 0000000000..95b213bb65
--- /dev/null
+++ b/include/driver/tcpm/ps8xxx_public.h
@@ -0,0 +1,45 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Parade Tech Type-C port controller */
+
+#ifndef __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H
+#define __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H
+
+/* I2C interface */
+#define PS8751_I2C_ADDR1_P1_FLAGS 0x09
+#define PS8751_I2C_ADDR1_P2_FLAGS 0x0A
+#define PS8751_I2C_ADDR1_FLAGS    0x0B	/* P3 */
+#define PS8751_I2C_ADDR2_FLAGS    0x1B
+#define PS8751_I2C_ADDR3_FLAGS    0x2B
+#define PS8751_I2C_ADDR4_FLAGS    0x4B
+
+#define PS8XXX_VENDOR_ID  0x1DA0
+
+extern const struct tcpm_drv ps8xxx_tcpm_drv;
+
+/**
+ * Board-specific callback to judge and provide which chip source of PS8XXX
+ * series supported by this driver per specific port.
+ *
+ * If the board supports only one single source then there is no nencessary to
+ * provide the __override version.
+ *
+ * If board supports two sources or above (with CONFIG_USB_PD_TCPM_MULTI_PS8XXX)
+ * then the __override version is mandatory.
+ *
+ * @param port	TCPC port number.
+ */
+__override_proto
+uint16_t board_get_ps8xxx_product_id(int port);
+
+void ps8xxx_tcpc_update_hpd_status(const struct usb_mux *me,
+				   int hpd_lvl, int hpd_irq);
+
+#ifdef CONFIG_CMD_I2C_STRESS_TEST_TCPC
+extern struct i2c_stress_test_dev ps8xxx_i2c_stress_test_dev;
+#endif /* defined(CONFIG_CMD_I2C_STRESS_TEST_TCPC) */
+
+#endif /* __CROS_EC_DRIVER_TCPM_PS8XXX_PUBLIC_H */
diff --git a/include/driver/tcpm/rt1715_public.h b/include/driver/tcpm/rt1715_public.h
new file mode 100644
index 0000000000..14fa9495e8
--- /dev/null
+++ b/include/driver/tcpm/rt1715_public.h
@@ -0,0 +1,18 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* Richtek RT1715 Type-C port controller */
+
+#ifndef __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H
+#define __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H
+
+/* I2C interface */
+#define RT1715_I2C_ADDR_FLAGS 0x4E
+
+#define RT1715_VENDOR_ID 0x29CF
+
+extern const struct tcpm_drv rt1715_tcpm_drv;
+
+#endif /* __CROS_EC_DRIVER_TCPM_RT1715_PUBLIC_H */
diff --git a/include/driver/tcpm/tusb422_public.h b/include/driver/tcpm/tusb422_public.h
new file mode 100644
index 0000000000..8756d9b362
--- /dev/null
+++ b/include/driver/tcpm/tusb422_public.h
@@ -0,0 +1,16 @@
+/* Copyright 2021 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* TI TUSB422 Type-C port controller */
+
+#ifndef __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H
+#define __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H
+
+/* I2C interface */
+#define TUSB422_I2C_ADDR_FLAGS 0x20
+
+extern const struct tcpm_drv tusb422_tcpm_drv;
+
+#endif /* __CROS_EC_DRIVER_TCPM_TUSB422_PUBLIC_H */