lindar: Remove power sequencing

The board/AP can handle power sequencing without EC intervention. This
support was already disabled by default in configuration.

BUG=b:143375057
TEST=make buildall
BRANCH=none

Signed-off-by: jerry2.huang <jerry2.huang@lcfc.corp-partner.google.com>
Change-Id: Iad0e2041248960e98bf4b8de4e8324850b7bd7f1
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2334431
Reviewed-by: Paul Fagerburg <pfagerburg@chromium.org>
Reviewed-by: Keith Short <keithshort@chromium.org>

4 files changed, 0 insertions, 138 deletions

diff --git a/board/lindar/board.h b/board/lindar/board.h
index ca4699f3ea..4b0774a17a 100644
--- a/board/lindar/board.h
+++ b/board/lindar/board.h
@@ -119,10 +119,6 @@ enum pwm_channel {
 	PWM_CH_COUNT
 };
 
-
-/* TODO: b/143375057 - Remove this code after power on. */
-void c10_gate_change(enum gpio_signal signal);
-
 void board_reset_pd_mcu(void);
 
 #endif /* !__ASSEMBLER__ */
diff --git a/board/lindar/build.mk b/board/lindar/build.mk
index ca046e8d97..279b2e559e 100644
--- a/board/lindar/build.mk
+++ b/board/lindar/build.mk
@@ -11,23 +11,6 @@ CHIP_FAMILY:=npcx7
 CHIP_VARIANT:=npcx7m6fc
 BASEBOARD:=volteer
 
-# TODO: b/143375057 - Remove this code after power on.
-#
-# Temporary for board power on.  Provide a Volteer specific make option
-# to enable the power signal GPIOs that are not stuffed by default.  This
-# is a backup if board logic power sequencing needs to be adjusted.
-#
-# Set the following variable to 'y' to enable the Volteer optional power signals
-VOLTEER_POWER_SEQUENCE=
-ifneq (,$(VOLTEER_POWER_SEQUENCE))
-CFLAGS_BASEBOARD+=-DVOLTEER_POWER_SEQUENCE
-endif
-
-# Force changes to VOLTEER_POWER_SEQUENCE variable to trigger a full build.
-ENV_VARS := VOLTEER_POWER_SEQUENCE
-
-
 board-y=board.o
 board-y+=battery.o
 board-y+=led.o
-board-$(VOLTEER_POWER_SEQUENCE)+=power_sequence.o
diff --git a/board/lindar/gpio.inc b/board/lindar/gpio.inc
index e4de5c64ab..9fa9f377b7 100644
--- a/board/lindar/gpio.inc
+++ b/board/lindar/gpio.inc
@@ -14,11 +14,6 @@ GPIO_INT(EC_WP_L,              PIN(A, 1), GPIO_INT_BOTH, switch_interrupt)
 GPIO_INT(H1_EC_PWR_BTN_ODL,    PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt)
 GPIO_INT(ACOK_OD,              PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, extpower_interrupt)
 
-/* Optional power sequencing interrupts */
-#ifdef VOLTEER_POWER_SEQUENCE
-GPIO_INT(CPU_C10_GATE_L,       PIN(6, 7), GPIO_INT_BOTH, c10_gate_change)
-#endif
-
 /* Power sequencing interrupts */
 GPIO_INT(SLP_S0_L,             PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt)
 #ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_S3
@@ -56,12 +51,6 @@ GPIO(EN_PPVAR_VCCIN,           PIN(4, 3), GPIO_OUT_LOW) /* Enables VCCIN IMPV9 *
 /* The EC does not buffer this signal on Volteer. */
 UNIMPLEMENTED(PCH_DSW_PWROK)
 
-#ifdef VOLTEER_POWER_SEQUENCE
-/* Optional power sequencing signals that are not stuffed by default */
-GPIO(EC_PCH_DSW_PWROK,      PIN(C, 0), GPIO_OUT_LOW)
-GPIO(EN_PP5000_USB_AG,		PIN(A, 7), GPIO_OUT_LOW)
-#endif
-
 /* Other wake sources */
 /*
  * GPIO_INT_BOTH is required for PSL wake from hibernate, but we don't need an
diff --git a/board/lindar/power_sequence.c b/board/lindar/power_sequence.c
deleted file mode 100644
index 5d557dac21..0000000000
--- a/board/lindar/power_sequence.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/* Copyright 2020 The Chromium OS Authors. All rights reserved.
- * Use of this source code is governed by a BSD-style license that can be
- * found in the LICENSE file.
- */
-
-/*
- * Volteer board-specific power sequencing
- * Power sequencing is largely done by the platform automatically.
- * However, if platform power sequencing is buggy or needs tuning,
- * resistors can be stuffed on the board to allow the EC full control over
- * the power sequencing.
- */
-
-#include "assert.h"
-#include "chipset.h"
-#include "console.h"
-#include "gpio.h"
-#include "hooks.h"
-#include "system.h"
-
-#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args)
-#define GPIO_SET_VERBOSE(signal, value) \
-	gpio_set_level_verbose(CC_CHIPSET, signal, value)
-
-static void board_wakeup(void)
-{
-	CPRINTS("%s", __func__);
-	/*
-	 * PP5000_USB_AG - normally enabled automatically by EN_3300_AG which
-	 * is connected to the PSL_OUT of the Nuvoton.
-	 *
-	 * Assert the signal high during wakeup, deassert at hibernate
-	 */
-	GPIO_SET_VERBOSE(GPIO_EN_PP5000_USB_AG, 1);
-}
-DECLARE_HOOK(HOOK_INIT, board_wakeup, HOOK_PRIO_DEFAULT);
-
-__override void board_hibernate_late(void)
-{
-	CPRINTS("%s", __func__);
-	/* Disable PP5000_USB_AG on hibernate */
-	GPIO_SET_VERBOSE(GPIO_EN_PP5000_USB_AG, 0);
-}
-
-/* Called during S5 -> S3 transition */
-static void board_chipset_startup(void)
-{
-	CPRINTS("%s", __func__);
-
-	/*
-	 *
-	 */
-
-	/*
-	 * Power on 1.8V rail,
-	 * tPCH06, minimum 200us from P-P3300_DSW stable to before
-	 * VCCPRIM_1P8 starting up.
-	 *
-	 * The transition to S5 and S3 is gated by SLP_SUS#, which Tiger Lake
-	 * internally delays a minimum of 95 ms from DSW_PWROK. So no delay
-	 * needed here.
-	 */
-	GPIO_SET_VERBOSE(GPIO_EN_PP1800_A, 1);
-
-
-	/*
-	 * Power on bypass rails - must be turned on after VCCIN aux
-	 *
-	 * tPCH34, maximum 50 ms from SLP_SUS# de-assertion to completion of
-	 * primary and bypass rail, no minimum specified.
-	 */
-	GPIO_SET_VERBOSE(GPIO_EN_PP1050_BYPASS, 1);
-
-}
-DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT);
-
-
-/* Called during S3 -> S5 transition */
-static void board_chipset_shutdown(void)
-{
-	CPRINTS("%s", __func__);
-
-	/*
-	 * S0 to G3 sequence (non-Deep Sx)
-	 *  TigerLake Name    Net Name
-	 *  VCCPRIM_3P3       PP3300_A
-	 *  VCCDSW_3P3        VCCDSW_3P3 (PP3300_A)
-	 *  V5.0A             PP5000_A
-	 *  VCCPRIM_1P8       PP1800_A
-	 *  VCCIN_AUX         PPVAR_VCCIN_AUX
-	 *  VNN_BYPASS        PPVAR_VNN_BYPASS
-	 *  V1.05A_BYPASS     PP1050_A_BYPASS
-	 */
-
-	/* Ice Lake shutdown already sequences first 3 rails above. */
-	chipset_force_shutdown(CHIPSET_SHUTDOWN_G3);
-
-	GPIO_SET_VERBOSE(GPIO_EN_PP1800_A, 0);
-	GPIO_SET_VERBOSE(GPIO_EN_PP1050_BYPASS, 0);
-}
-DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT);
-
-
-
-
-