diff options
author | Dino Li <Dino.Li@ite.com.tw> | 2020-09-08 14:56:10 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2020-10-08 06:05:02 +0000 |
commit | 44f69459ded7bd93933a660c1f216f1ad0ae443e (patch) | |
tree | f57dbe0cb389e82316b82faa99c022ab03d58e9a | |
parent | a54cd39627e62e60af73e2d3ef51504f43d1fb0e (diff) | |
download | chrome-ec-44f69459ded7bd93933a660c1f216f1ad0ae443e.tar.gz |
it83xx: enable selecting EC's VCC
The VCC is the power source of EC's GPM0~6, will connect to 1.8v or
3.3v depended on platform design.
This change was made to ensure voltage level setting of GPM0~6 matches
the corresponded VCC level. So we can enable internal pull-up no matter
VCC is connected to 1.8v or 3.3v
BUG=b:168783892
BRANCH=none
TEST=- buildall.
- The level setting is correct on these boards:
asurada, drawcia, and reef_it8320
Change-Id: I4eae368e569987381a0437494262d588436bb011
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2397931
Reviewed-by: Eric Yilun Lin <yllin@chromium.org>
-rw-r--r-- | baseboard/dedede/baseboard.h | 3 | ||||
-rw-r--r-- | baseboard/dragonegg/baseboard.h | 2 | ||||
-rw-r--r-- | baseboard/intelrvp/ite_ec.h | 1 | ||||
-rw-r--r-- | baseboard/ite_evb/baseboard.h | 1 | ||||
-rw-r--r-- | baseboard/octopus/baseboard.h | 2 | ||||
-rw-r--r-- | board/asurada/board.c | 3 | ||||
-rw-r--r-- | board/asurada/board.h | 6 | ||||
-rw-r--r-- | board/glkrvp_ite/board.h | 1 | ||||
-rw-r--r-- | board/reef_it8320/board.h | 1 | ||||
-rw-r--r-- | chip/it83xx/gpio.c | 18 | ||||
-rw-r--r-- | chip/it83xx/registers.h | 1 | ||||
-rw-r--r-- | include/config.h | 7 |
12 files changed, 43 insertions, 3 deletions
diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h index 42fad27e71..96e46ad319 100644 --- a/baseboard/dedede/baseboard.h +++ b/baseboard/dedede/baseboard.h @@ -32,6 +32,9 @@ #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ #elif defined(VARIANT_DEDEDE_EC_IT8320) + /* IT83XX config */ + #define CONFIG_IT83XX_VCC_1P8V + /* I2C Bus Configuration */ #define I2C_PORT_EEPROM IT83XX_I2C_CH_A #define I2C_PORT_BATTERY IT83XX_I2C_CH_B #define I2C_PORT_SENSOR IT83XX_I2C_CH_C diff --git a/baseboard/dragonegg/baseboard.h b/baseboard/dragonegg/baseboard.h index dccabccbde..5b095ce08f 100644 --- a/baseboard/dragonegg/baseboard.h +++ b/baseboard/dragonegg/baseboard.h @@ -127,6 +127,8 @@ #define PD_MAX_CURRENT_MA 3000 #define PD_MAX_VOLTAGE_MV 20000 +/* IT83XX config */ +#define CONFIG_IT83XX_VCC_1P8V /* I2C Bus Configuration */ #define CONFIG_I2C #define CONFIG_I2C_MASTER diff --git a/baseboard/intelrvp/ite_ec.h b/baseboard/intelrvp/ite_ec.h index 2857f8efdf..4c98354a62 100644 --- a/baseboard/intelrvp/ite_ec.h +++ b/baseboard/intelrvp/ite_ec.h @@ -10,6 +10,7 @@ /* Optional feature - used by ITE */ #define CONFIG_IT83XX_FLASH_CLOCK_48MHZ +#define CONFIG_IT83XX_VCC_1P8V /* ADC channels */ #define ADC_TEMP_SNS_AMBIENT_CHANNEL CHIP_ADC_CH13 diff --git a/baseboard/ite_evb/baseboard.h b/baseboard/ite_evb/baseboard.h index 34c4fee278..6f4f4810a3 100644 --- a/baseboard/ite_evb/baseboard.h +++ b/baseboard/ite_evb/baseboard.h @@ -16,6 +16,7 @@ #define CONFIG_I2C_MASTER #define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE #define CONFIG_IT83XX_SMCLK2_ON_GPC7 +#define CONFIG_IT83XX_VCC_3P3V #define CONFIG_KEYBOARD_BOARD_CONFIG #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_LOW_POWER_IDLE diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index c8e4b24e56..c67c963c4f 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -58,6 +58,8 @@ /* Allow the EC to enter deep sleep in S0 */ #define CONFIG_LOW_POWER_S0 #elif defined(VARIANT_OCTOPUS_EC_ITE8320) + /* IT83XX config */ + #define CONFIG_IT83XX_VCC_1P8V /* I2C Bus Configuration */ #define I2C_PORT_BATTERY IT83XX_I2C_CH_A /* Shared bus */ #define I2C_PORT_CHARGER IT83XX_I2C_CH_A /* Shared bus */ diff --git a/board/asurada/board.c b/board/asurada/board.c index 712a89289e..35b3aff3e5 100644 --- a/board/asurada/board.c +++ b/board/asurada/board.c @@ -141,9 +141,6 @@ static enum board_sub_board board_get_sub_board(void); /* Initialize board. */ static void board_init(void) { - /* For Rev0 only. Set GPM0~6 1.8V input. */ - IT83XX_GPIO_GCR30 |= BIT(4); - gpio_enable_interrupt(GPIO_AC_PRESENT); gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); diff --git a/board/asurada/board.h b/board/asurada/board.h index 26e74ae78f..b25a24fc30 100644 --- a/board/asurada/board.h +++ b/board/asurada/board.h @@ -19,6 +19,12 @@ #define CONFIG_SYSTEM_UNLOCKED #define CONFIG_BOARD_VERSION_CUSTOM #define CONFIG_EXTPOWER_GPIO +#ifdef BOARD_ASURADA +/* For Rev0 only */ +#define CONFIG_IT83XX_VCC_1P8V +#else +#define CONFIG_IT83XX_VCC_3P3V +#endif /* * TODO: Remove this option once the VBAT no longer keeps high when * system's power isn't presented. diff --git a/board/glkrvp_ite/board.h b/board/glkrvp_ite/board.h index b131ac42c4..1ae3089508 100644 --- a/board/glkrvp_ite/board.h +++ b/board/glkrvp_ite/board.h @@ -104,6 +104,7 @@ /* Optional feature - used by ITE */ #define CONFIG_IT83XX_ENABLE_MOUSE_DEVICE #define CONFIG_IT83XX_FLASH_CLOCK_48MHZ +#define CONFIG_IT83XX_VCC_1P8V /* I2C ports */ #define CONFIG_I2C diff --git a/board/reef_it8320/board.h b/board/reef_it8320/board.h index fb26e2ff57..da2c9a5c4f 100644 --- a/board/reef_it8320/board.h +++ b/board/reef_it8320/board.h @@ -116,6 +116,7 @@ #define CONFIG_EXTPOWER_DEBOUNCE_MS 1000 #define CONFIG_I2C #define CONFIG_I2C_MASTER +#define CONFIG_IT83XX_VCC_3P3V #define CONFIG_KEYBOARD_BOARD_CONFIG #define CONFIG_KEYBOARD_PROTOCOL_8042 #define CONFIG_KEYBOARD_COL2_INVERTED diff --git a/chip/it83xx/gpio.c b/chip/it83xx/gpio.c index 3dd6d16268..90d8b717b7 100644 --- a/chip/it83xx/gpio.c +++ b/chip/it83xx/gpio.c @@ -667,6 +667,24 @@ void gpio_pre_init(void) IT83XX_GPIO_GCR = 0x06; +#if !defined(CONFIG_IT83XX_VCC_1P8V) && !defined(CONFIG_IT83XX_VCC_3P3V) +#error Please select voltage level of VCC for EC. +#endif + +#if defined(CONFIG_IT83XX_VCC_1P8V) && defined(CONFIG_IT83XX_VCC_3P3V) +#error Must select only one voltage level of VCC for EC. +#endif + /* The power level of GPM6 follows VCC */ + IT83XX_GPIO_GCR29 |= BIT(0); + + /* The power level (VCC) of GPM0~6 is 1.8V */ + if (IS_ENABLED(CONFIG_IT83XX_VCC_1P8V)) + IT83XX_GPIO_GCR30 |= BIT(4); + + /* The power level (VCC) of GPM0~6 is 3.3V */ + if (IS_ENABLED(CONFIG_IT83XX_VCC_3P3V)) + IT83XX_GPIO_GCR30 &= ~BIT(4); + #if IT83XX_USBPD_PHY_PORT_COUNT < CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT #error "ITE pd active port count should be less than physical port count !" #endif diff --git a/chip/it83xx/registers.h b/chip/it83xx/registers.h index 7f70724864..f8e73f8887 100644 --- a/chip/it83xx/registers.h +++ b/chip/it83xx/registers.h @@ -773,6 +773,7 @@ #define IT83XX_GPIO_GCR26 REG8(IT83XX_GPIO_BASE+0xD2) #define IT83XX_GPIO_GCR27 REG8(IT83XX_GPIO_BASE+0xD3) #define IT83XX_GPIO_GCR28 REG8(IT83XX_GPIO_BASE+0xD4) +#define IT83XX_GPIO_GCR29 REG8(IT83XX_GPIO_BASE+0xEE) #define IT83XX_GPIO_GCR30 REG8(IT83XX_GPIO_BASE+0xED) #define IT83XX_GPIO_GCR31 REG8(IT83XX_GPIO_BASE+0xD5) #define IT83XX_GPIO_GCR32 REG8(IT83XX_GPIO_BASE+0xD6) diff --git a/include/config.h b/include/config.h index 02709510ab..1921828c70 100644 --- a/include/config.h +++ b/include/config.h @@ -2488,6 +2488,13 @@ #undef CONFIG_IT83XX_SMCLK2_ON_GPC7 /* + * Enable the corresponding config option, according to EC's VCC is connected + * to 1.8V or 3.3V + */ +#undef CONFIG_IT83XX_VCC_1P8V +#undef CONFIG_IT83XX_VCC_3P3V + +/* * If this is not defined, the firmware will revert the JTAG selection * triggered by the hardware strap pin. * Un-define this flag by default for all real platforms. see (b/129908668) |