diff options
author | Jack Rosenthal <jrosenth@chromium.org> | 2022-04-28 14:17:28 -0600 |
---|---|---|
committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-04-29 19:11:27 +0000 |
commit | 90aa0fa4ae504b2b17bfb19ea90803be9c8495af (patch) | |
tree | 97c0fbe7c3e7ebbfbf431c210fd42a70eaafead0 | |
parent | 2dd94c6b793eaec5ed36b2d3f645f23c9837566c (diff) | |
download | chrome-ec-90aa0fa4ae504b2b17bfb19ea90803be9c8495af.tar.gz |
power: Add new chipset_power_on API
This is a simple API for subsystems to request the chipset to power
on. It's required so that the chargesplash state machine can request
a chipset power on upon AC connection.
Right now it's only implemented for x86 and Qualcomm as an example.
Support for other platforms can be added as required.
BUG=b:228370390
BRANCH=none
TEST=with follow-on CL, chargesplash can power on
Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
Change-Id: I73a0fa21d5aea6bc46ad23eed2b8d908d217fe0e
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3615483
Reviewed-by: caveh jalali <caveh@chromium.org>
Reviewed-by: Wai-Hong Tam <waihong@google.com>
-rw-r--r-- | common/power_button_x86.c | 14 | ||||
-rw-r--r-- | include/chipset.h | 7 | ||||
-rw-r--r-- | power/qcom.c | 8 |
3 files changed, 26 insertions, 3 deletions
diff --git a/common/power_button_x86.c b/common/power_button_x86.c index ba972ca876..fd24f7a75b 100644 --- a/common/power_button_x86.c +++ b/common/power_button_x86.c @@ -459,6 +459,14 @@ static void powerbtn_x86_init(void) } DECLARE_HOOK(HOOK_INIT, powerbtn_x86_init, HOOK_PRIO_DEFAULT); +void chipset_power_on(void) +{ + if (chipset_in_state(CHIPSET_STATE_ANY_OFF) && + pwrbtn_state != PWRBTN_STATE_INIT_ON) { + power_button_pch_pulse(); + } +} + #ifdef CONFIG_LID_SWITCH /** * Handle switch changes based on lid event. @@ -466,9 +474,9 @@ DECLARE_HOOK(HOOK_INIT, powerbtn_x86_init, HOOK_PRIO_DEFAULT); static void powerbtn_x86_lid_change(void) { /* If chipset is off, pulse the power button on lid open to wake it. */ - if (lid_is_open() && chipset_in_state(CHIPSET_STATE_ANY_OFF) - && pwrbtn_state != PWRBTN_STATE_INIT_ON) - power_button_pch_pulse(); + if (lid_is_open()) { + chipset_power_on(); + } } DECLARE_HOOK(HOOK_LID_CHANGE, powerbtn_x86_lid_change, HOOK_PRIO_DEFAULT); #endif diff --git a/include/chipset.h b/include/chipset.h index 48c65374a2..51a9018dfb 100644 --- a/include/chipset.h +++ b/include/chipset.h @@ -94,6 +94,13 @@ void chipset_throttle_cpu(int throttle); void chipset_force_shutdown(enum chipset_shutdown_reason reason); /** + * Attempt to power on the chipset if it's in S4/S5/G3. + * + * This does nothing if in S3/S0ix/S0. + */ +void chipset_power_on(void); + +/** * Reset the CPU and/or chipset. */ void chipset_reset(enum chipset_shutdown_reason reason); diff --git a/power/qcom.c b/power/qcom.c index d931e6bb29..107bdcb04d 100644 --- a/power/qcom.c +++ b/power/qcom.c @@ -824,6 +824,14 @@ void chipset_force_shutdown(enum chipset_shutdown_reason reason) task_wake(TASK_ID_CHIPSET); } +void chipset_power_on(void) +{ + if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) { + power_request = POWER_REQ_ON; + task_wake(TASK_ID_CHIPSET); + } +} + /** * Warm reset the AP * |