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author | Ting Shen <phoenixshen@google.com> | 2021-05-04 17:24:13 +0800 |
---|---|---|
committer | Commit Bot <commit-bot@chromium.org> | 2021-05-12 06:06:58 +0000 |
commit | 34250aff259c509af0b4d9ff58c09835084eac53 (patch) | |
tree | 8ec6737c8c73a070041e0ec216a9bad8e11a4094 | |
parent | c006d7837d47811d948523f90a9867144cd8348a (diff) | |
download | chrome-ec-34250aff259c509af0b4d9ff58c09835084eac53.tar.gz |
anx3443: fix incorrect set_mux implementation
Current driver code sets 0xF8 bit [1:0] to 0b00 when USB_PD_MUX_NONE.
However, according to the programming guide (b/181282482#comment3).
0b00 means "power-off", not "disable both paths".
This is not what we want because power-off mode blocks all subsequent
i2c transactions.
Since this mux does not have a "none" state, this CL maps
USB_PD_MUX_NONE to USB enabled instead.
BUG=b:181282482
TEST=Boot Cherry, verify that error messages like
"mux config:0, port:1, rv:1" disappeared
BRANCH=main
Signed-off-by: Ting Shen <phoenixshen@google.com>
Change-Id: I2c87c839242fa61e4ba0e1dfca54ebe5bb3beb37
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2870537
Reviewed-by: Eric Yilun Lin <yllin@google.com>
Commit-Queue: Ting Shen <phoenixshen@chromium.org>
Tested-by: Ting Shen <phoenixshen@chromium.org>
-rw-r--r-- | driver/usb_mux/anx3443.c | 18 |
1 files changed, 13 insertions, 5 deletions
diff --git a/driver/usb_mux/anx3443.c b/driver/usb_mux/anx3443.c index 232f6e70c7..27eb731ce6 100644 --- a/driver/usb_mux/anx3443.c +++ b/driver/usb_mux/anx3443.c @@ -35,10 +35,18 @@ static int anx3443_set_mux(const struct usb_mux *me, mux_state_t mux_state) /* ULP_CFG_MODE_EN overrides pin control. Always set it */ reg = ANX3443_ULP_CFG_MODE_EN; - if (mux_state & USB_PD_MUX_USB_ENABLED) - reg |= ANX3443_ULP_CFG_MODE_USB_EN; - if (mux_state & USB_PD_MUX_DP_ENABLED) + + /* + * NOTE: This mux does not have a "none" state, so USB_PD_MUX_NONE + * is mapped to ANX3443_ULP_CFG_MODE_USB_EN here. + */ + if ((mux_state & USB_PD_MUX_DOCK) == USB_PD_MUX_DOCK) + reg |= ANX3443_ULP_CFG_MODE_USB_EN | ANX3443_ULP_CFG_MODE_DP_EN; + else if (mux_state & USB_PD_MUX_DP_ENABLED) reg |= ANX3443_ULP_CFG_MODE_DP_EN; + else + reg |= ANX3443_ULP_CFG_MODE_USB_EN; + if (mux_state & USB_PD_MUX_POLARITY_INVERTED) reg |= ANX3443_ULP_CFG_MODE_FLIP; @@ -78,8 +86,8 @@ static int anx3443_init(const struct usb_mux *me) RETURN_ERROR(anx3443_write(me, ANX3443_REG_ULTRA_LOW_POWER, ANX3443_ULTRA_LOW_POWER_DIS)); - /* Start mux in safe mode */ - RETURN_ERROR(anx3443_set_mux(me, USB_PD_MUX_NONE)); + /* Default to USB mode */ + RETURN_ERROR(anx3443_set_mux(me, USB_PD_MUX_USB_ENABLED)); return EC_SUCCESS; } |