diff options
| author | Leila Lin <leilacy_lin@compal.corp-partner.google.com> | 2022-06-09 16:39:18 +0800 |
|---|---|---|
| committer | Chromeos LUCI <chromeos-scoped@luci-project-accounts.iam.gserviceaccount.com> | 2022-06-16 03:50:14 +0000 |
| commit | edc4ea8a39eb982096867b0508ffd52278d872f1 (patch) | |
| tree | 4c3370d1f7c47d002282278ed5379242ee836439 | |
| parent | 02ad89b28808d815561d0413e41acbeaa79df2eb (diff) | |
| download | chrome-ec-edc4ea8a39eb982096867b0508ffd52278d872f1.tar.gz | |
Felwinter: Move RT_RST to different pin
Felwinter moves the USB_C2_RT_RST_ODL pin from GPIO02 to GPIO07 of
the nct3807. When a debug accessory is connected, GPIO02 becomes
uncontrollable and causes FAFT setup test errors. So move RT_RST
to different pin.
BRANCH=brya
BUG=b:234560670
TEST=build pass and run FAFT setup test pass.
Signed-off-by: Leila Lin <leilacy_lin@compal.corp-partner.google.com>
Change-Id: I5206b66a424aab7756b0e077f3b972d0c18756bd
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3697270
Commit-Queue: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
Tested-by: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
Reviewed-by: Ricky Chang <rickytlchang@chromium.org>
Reviewed-by: caveh jalali <caveh@chromium.org>
Auto-Submit: LeilaCY Lin <leilacy_lin@compal.corp-partner.google.com.test-google-a.com>
Reviewed-by: Ko Ko <ko_ko@compal.corp-partner.google.com>
Reviewed-by: Elmo Lan <elmo_lan@compal.corp-partner.google.com>
| -rw-r--r-- | board/felwinter/gpio.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/board/felwinter/gpio.inc b/board/felwinter/gpio.inc index 86f71a9ea3..112047c35f 100644 --- a/board/felwinter/gpio.inc +++ b/board/felwinter/gpio.inc @@ -148,7 +148,7 @@ IOEX(USB_C1_RT_RST_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 2), GPIO_ODR_LOW) IOEX(USB_C1_OC_ODL, EXPIN(IOEX_C1_NCT38XX, 0, 4), GPIO_ODR_HIGH) IOEX(USB_C1_FRS_EN, EXPIN(IOEX_C1_NCT38XX, 0, 6), GPIO_LOW) -IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 2), GPIO_ODR_LOW) +IOEX(USB_C2_RT_RST_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 7), GPIO_ODR_LOW) IOEX(USB_C2_OC_ODL, EXPIN(IOEX_C2_NCT38XX, 0, 4), GPIO_ODR_HIGH) IOEX(USB_C2_FRS_EN, EXPIN(IOEX_C2_NCT38XX, 0, 6), GPIO_LOW) /* GPIO07_P2 to PU */ |