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| author | Mary Ruthven <mruthven@chromium.org> | 2017-03-07 17:01:31 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2017-03-07 21:55:29 -0800 |
| commit | 6987e3184b55a2de9aa6d2999dac7ba39cd30089 (patch) | |
| tree | 8e7810054645761d4a7f0f8f9194e626e65873e7 | |
| parent | 3e30782912d080ead3a50deaf475b3880f7d2c91 (diff) | |
| download | chrome-ec-6987e3184b55a2de9aa6d2999dac7ba39cd30089.tar.gz | |
cr50: make sys_rst_l wake on low
The issue is with how we have the sys_rst_l wake pin setup. How it is
now, the gpio controller never sees that sys_rst_l is asserted, so it
can't tell when there is a rising edge.
sys_rst_l is a rising edge wake pin. Cr50 would enter sleep with
sys_rst_l high. While cr50 was asleep sys_rst_l would be asserted and
then deasserted. The rising edge would wake cr50 up, and when cr50 woke
up the gpio controller would see that sys_rst_l is still high, so it
wouldn't think there was an edge and it wouldn't trigger the tpm reset
interrupt.
This change makes sys_rst_l wake low instead of wake rising. This means
that cr50 will remain awake whenever sys_rst_l is asserted and it will
be awake to see the rising edge on sys_rst_l.
BUG=b:35774896
BRANCH=cr50
TEST=Turn off bob. Wait until cr50 enters regular sleep. Turn the device
back on and make sure it doesn't boot to recovery.
Change-Id: Ibee6c8112d32b3abb8953aa71d68e1f510932286
Signed-off-by: Mary Ruthven <mruthven@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/450874
Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
| -rw-r--r-- | board/cr50/board.c | 19 |
1 files changed, 12 insertions, 7 deletions
diff --git a/board/cr50/board.c b/board/cr50/board.c index 9db8f1a8ce..fa308ac4ca 100644 --- a/board/cr50/board.c +++ b/board/cr50/board.c @@ -410,12 +410,17 @@ void board_configure_deep_sleep_wakepins(void) GWRITE_FIELD(PINMUX, EXITINV0, DIOA3, 0); /* wake on high */ GWRITE_FIELD(PINMUX, EXITEN0, DIOA3, 1); - /* Configure cr50 to resume on the rising edge of sys_rst_l */ + /* + * Configure cr50 to wake when sys_rst_l is asserted. It is + * wake on low to make sure that Cr50 is awake to detect the + * rising edge of sys_rst_l. This will keep Cr50 awake the + * entire time sys_rst_l is asserted. + */ /* Disable sys_rst_l as a wake pin */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 0); /* Reconfigure and reenable it. */ - GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 1); /* edge sensitive */ - GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 0); /* wake on high */ + GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 0); /* level sensitive */ + GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 1); /* wake on low */ /* enable powerdown exit */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1); } @@ -488,10 +493,10 @@ static void configure_board_specific_gpios(void) /* Enbale the input */ GWRITE_FIELD(PINMUX, DIOA3_CTL, IE, 1); - /* Set to be edge sensitive */ - GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 1); - /* Select rising edge polarity */ - GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 0); + /* Set to be level sensitive */ + GWRITE_FIELD(PINMUX, EXITEDGE0, DIOM0, 0); + /* wake on low */ + GWRITE_FIELD(PINMUX, EXITINV0, DIOM0, 1); /* Enable powerdown exit on DIOM0 */ GWRITE_FIELD(PINMUX, EXITEN0, DIOM0, 1); } |